Threading Dislocation Density Research Articles

Epitaxy of >7 μm Thick GaN Drift Layers on 150 mm Si(111) Substrates Realizing Vertical PN Diodes with 1200 V Breakdown Voltage

Metal‐organic chemical vapor deposition growth of vertical GaN PN structures on 6″ Si(111) substrates enabling a 1200 V breakdown voltage is demonstrated. Thanks to an optimized buffer structure utilizing island growth in an AlN/Al0.1Ga0.9N superlattice, the threading dislocation density is drastically reduced, and sufficient compressive stress is incorporated in active GaN layers to compensate for the thermal mismatch. Crack‐free PN structures with drift layer thicknesses up to 7.4 μm are realized with a threading dislocation density of ≈5 × 108 cm−2 and an absolute wafer bow <50 μm. Quasi‐vertical PN diodes reveal a linear increase in the breakdown voltage with the drift layer thickness with an average breakdown field of ≈1.6 MV cm−1. Additionally, the leakage current is shown to decrease monotonically as the drift layer thickness increases. For a 7.4 μm thick drift layer with a net ionized donor concentration of 0.9 × 1016 cm−3, a high breakdown voltage of 1200 V, a low specific on‐resistance of 0.4 mΩ cm−2, and a low leakage current of 10−4 A cm−2 (at a reverse bias of 650 V) are obtained. These results demonstrate the great potential of cost‐effective vertical GaN‐on‐Si power devices operating in the kilovolt range.

Effective InAsP dislocation filtering layers for InP heteroepitaxy on CMOS-standard (001) silicon

In this work, we report InAsP-based dislocation filter layers (DFLs) for InP heteroepitaxy on CMOS-standard (001) Si substrates, demonstrating a threading dislocation density of 3.7 × 107 cm−2. The strain introduced by InAsP induces dislocation bending at the InAsP/InP interface, thereby facilitating the reaction and annihilation of dislocations during their lateral glide. Concurrently, the InP spacer exhibits tensile strain, leading to the formation of stacking faults (SFs). With a comprehensive analysis utilizing x-ray diffraction, electron channeling contrast imaging, and transmission electron microscopy, the effects of DFL-induced strain on dislocations and SFs are investigated. Fine-tuning the strain conditions allowed low-dislocation-density while SF-suppressed, anti-phase boundary free InP on Si. This work, therefore, provides a useful buffer engineering scheme for monolithic integration of InP-based electronic and photonic devices onto the industry-standard silicon platform.

Enhanced Optical Gain of c-plane InGaN Laser Diodes via a Strain Relaxed Template with reduced Threading Dislocation Density

Enhanced Optical Gain of c-plane InGaN Laser Diodes via a Strain Relaxed Template with reduced Threading Dislocation Density

Ultra-low-defect homoepitaxial micro-LEDs with enhanced efficiency and monochromaticity for high-PPI AR/MR displays

The issue of brightness in strong ambient light conditions is one of the critical obstacles restricting the application of augmented reality (AR) and mixed reality (MR). Gallium nitride (GaN)-based micro-LEDs, renowned for their exceptional brightness and stability, are considered the foremost contenders for AR applications. Nevertheless, conventional heteroepitaxial growth micro-LED devices confront formidable challenges, including substantial wavelength shifts and efficiency droop. In this paper, we firstly demonstrated the high-quality homoepitaxial GaN-on-GaN micro-LEDs micro-display, and thoroughly analyzed the possible benefits for free-standing GaN substrate from the material-level characterization to device optoelectronic properties and micro-display application compared with sapphire substrate. The GaN-on-GaN structure exhibits a superior crystal quality with ultra-low threading dislocation densities (TDDs) of ~ 105 cm−2, which is three orders of magnitude lower than that of GaN-on-Sapphire. Through an in-depth size-dependent optoelectronic analysis of blue/green emission GaN-on-GaN/ Sapphire micro-LEDs from 100 × 100 shrink to 3 × 3 μm2, real that a lower forward voltage and series resistance, a consistent emission wavelength (1.21 nm for blue and 4.79 nm for green @ 500 A/cm2), coupled with a notable reduction in efficiency droop ratios (15.6% for blue and 28.5% for green @ 500 A/cm2) and expanded color gamut (103.57% over Rec. 2020) within GaN-on-GaN 10 μm micro-LEDs. Last but not least, the GaN-on-GaN micro-display with 3000 pixels per inch (PPI) showcased enhanced display uniformity and higher luminance in comparison to its GaN-on-Sapphire counterpart, demonstrating significant potentials for high-brightness AR/MR applications under strong ambient light.

Exploring Inorganic Flexible Electronics: III‐Nitride Light‐Emitting Diode Epilayers on Wafer‐Scale Exfoliable Mica Substrate

AbstractMica is a promising substrate for flexible photonic applications because it can be fabricated using wafer‐scale multiple exfoliations. However, the large lattice mismatch between mica and III‐nitrides hinders their application in III‐nitride semiconductor devices. In this study, two types of light‐emitting diode (LED) epilayers, blue and green, are epitaxially fabricated on 2‐inch exfoliated mica substrates using sputtered AlN as a buffer layer to address the lattice mismatch. The LED epilayers on mica substrate exhibit excellent single‐crystalline quality with a low threading dislocation density of 2.07 × 109 cm−2 in the GaN region and smooth surface morphology with a root mean square (RMS) roughness of 0.58 nm in a 5 × 5 µm2 scanned area, demonstrating that mica is an excellent platform for III‐nitride semiconductors. Moreover, the structures are reproduced stably on multiple exfoliated mica at the wafer scale, which verified the reusability and reproducibility of III‐nitride/mica in terms of crystallinity, surface morphology, and transparency. Strong electroluminescence of the LED epilayers confirmed the potential of mica in electrically driven flexible opto‐electronics. Therefore, this results demonstrated the potential of mica substrates in III‐nitride semiconductors and provide a novel pathway for revolutionizing the fabrication of III‐nitride‐based flexible devices.

Geometrically Controlled Microscale Patterning and Epitaxial Lateral Overgrowth of Nitrogen-Polar GaN.

In this Letter, we report on a novel two-step epitaxial growth technique that enables a significant improvement of the crystal quality of nitrogen-polar GaN. The starting material is grown on 4° vicinal sapphire substrates by metal-organic vapor-phase epitaxy, with an initial high-temperature sapphire nitridation to control polarity. The material is then converted to a regular array of hexagonal pyramids by wet-etching in a KOH solution and subsequently regrown to coalesce the pyramids back into a smooth layer of improved crystal quality. The key points that enable this technique are the control of the array geometry, obtained by exploiting the anisotropic behavior of the wet-etch step, and the use of regrowth conditions that preserve the orientation of the pyramids' sidewalls. In contrast, growth conditions that cause an excessive expansion of the residual (0001̅) facets on the pyramids' tops cause the onset of a very rough surface morphology upon full coalescence. An X-ray diffraction study confirms the reduction of the threading dislocation density as the regrowth step develops. The analysis of the relative position of the 0002̅ GaN peak, with respect to the 0006 sapphire peak, reveals a macroscopic tilt of the pyramids, probably induced by the large off-axis substrate orientation. This tilt correlates very well with an anomalous broadening of the 0002̅ diffraction peaks at the beginning of the regrowth step.

Dislocation half-loop control for optimal V-defect density in GaN-based light emitting diodes

V-defects are morphological defects that typically form on threading dislocations during epitaxial growth of (0001)-oriented GaN layers. A V-defect is a hexagonal pyramid-shaped depression with six {101¯1}-oriented sidewalls. These semipolar sidewalls have a lower polarization barrier than the polarization barriers present between the polar c-plane quantum wells and quantum barriers and can laterally inject carriers directly into quantum wells in GaN-based light emitting diodes (LEDs). This is especially important, as the high polarization field in c-plane GaN is a significant factor in the high forward voltage of GaN LEDs. The optimal V-defect density for efficient lateral carrier injection in a GaN LED (∼109 cm−2) is typically an order of magnitude higher than the threading dislocation density of GaN grown on patterned sapphire substrates (∼108 cm−2). Pure-edge dislocation loops have been known to exist in GaN, and their formation into large V-defects via low-temperature growth with high Si-doping has recently been studied. Here, we develop a method for pure-edge threading dislocation half-loop formation and density control via disilane flow, growth temperature, and thickness of the half-loop generation layer. We also develop a method of forming the threading dislocation half-loops into V-defects of comparable size to those originating from substrate threading dislocations.

Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates

Distributed Bragg reflectors (DBRs) based on alternating layers of porous and non-porous GaN have previously been fabricated at the wafer-scale in heteroepitaxial GaN layers grown on sapphire substrates. Porosification is achieved via the electrochemical etching of highly Si-doped layers, and the etchant accesses the n+-GaN layers through nanoscale channels arising at threading dislocations that are ubiquitous in the heteroepitaxial growth process. Here, we show that the same process applies to GaN multilayer structures grown on silicon substrates. The reflectance of the resulting DBRs depends on the voltage at which the porosification process is carried out. Etching at higher voltages yields higher porosities. However, while an increase in porosity is theoretically expected to lead to peak reflectance, in practice, the highest reflectance is achieved at a moderate etching voltage because etching at higher voltages leads to pore formation in the nominally non-porous layers, pore coarsening in the porous layers, and in the worst cases layer collapse. We also find that at the high threading dislocation densities present in these samples, not all dislocations participate in the etching process at low and moderate etching voltages. However, the number of dislocations involved in the process increases with etching voltage.

Structural characterization of threading dislocation in α-Ga2O3 thin films on c- and m-plane sapphire substrates

We discuss the structure of threading dislocations in α-Ga2O3 thin films grown on c- and m-plane sapphire substrates. The thickness-dependent threading dislocation density in both films directly affects the electrical properties of the films including carrier concentration and mobility. Two distinct types of threading dislocations are identified for each of the c- and m-plane α-Ga2O3 thin films. The c-plane α-Ga2O3 thin film shows Burgers vectors of 1/3[11¯01] and 1/3[112¯0], while the m-plane α-Ga2O3 thin film displays Burgers vectors of 1/3[21¯1¯0] and 1/3[11¯01]. This paper presents a detailed structure of the threading dislocations in α-Ga2O3, which has been little disclosed thus far mainly due to the difficulty in synthesizing the metastable α-Ga2O3.

Development of aspect ratio trapping growth of GeSn on Si for midwave infrared applications

The development of all-group IV GeSn materials on Si substrates is of interest for monolithic midwave infrared (MWIR) silicon photonics. Despite their great potential, the growth of high crystalline quality materials is still challenging. The conventional growth of GeSn films on Si displays high densities of dislocations and, hence, large dark currents. We have examined a state-of-the-art lithographically defined aspect ratio trapping (ART) growth approach for threading dislocations (TDs) filtering in GeSn and demonstrated the selective growth in the holes embedded in the SiO2/Si(001) template. While an exceptionally low density of TDs was confirmed by transmission electron microscopy imaging, we find that Sn incorporation is strongly suppressed in the ART-grown structures. Nonetheless, these results provide a solid basis for further efforts to enhance the Sn fraction of the GeSn ART growth.

Interband cascade light-emitting diodes grown on silicon substrates using GaSb buffer layer

Interband cascade light-emitting diodes (ICLEDs) offer attractive advantages for infrared applications, which would greatly expand if high-quality growth on silicon substrates could be achieved. This work describes the formation of threading dislocations in ICLEDs grown monolithically on GaSb-on-Silicon wafers. The epitaxial growth is done in two stages: the GaSb-on-Silicon buffer is grown first, followed by the ICLED growth. The buffer growth involves the nucleation of a 10-nm-thick AlSb buffer layer on the silicon surface, followed by the GaSb growth. The AlSb nucleation layer promotes the formation of 90° and 60° interfacial misfit dislocations, resulting in a highly planar morphology for subsequent GaSb growth that is almost 100% relaxed. The resulting GaSb buffer for growth of the ICLED has a threading dislocation density of ∼107/cm2 after ∼3 μm of growth. The fabricated LEDs showed variations in device performance, with some devices demonstrating comparable light–current–voltage curves to those for devices grown on GaSb substrates, while other devices showed somewhat reduced relative performance. Cross-sectional transmission electron microscopy observations of the inferior diodes indicated that the multiplication of threading dislocations in the active region had most likely caused the increased leakage current and lower output power. Enhanced defect filter layers on the GaSb/Si substrates should provide more consistent diode performance and a viable future growth approach for antimonide-based ICLEDs and other infrared devices.

Silicon‐Based 850 nm GaAs/GaAsP‐Strained Quantum Well Lasers with Active Region Dislocation Blocking Layers

A silicon‐based room temperature (RT) continuous wave (CW) operation quantum well (QW) laser emitting at 850 nm is reported in this article. By applying the dislocation filter superlattice, the threading dislocation density of the GaAs pseudosubstrate on Si is reduced to 1.8 × 107 cm−2. The metal‐organic chemical vapor deposition‐grown laser structure with GaAs/GaAsP QW and InAlAs active region dislocation blocking layer are fabricated into broad‐stripe Fabry–Perot laser diodes. A typical threshold current and threshold current density of 286 mA and 715 Acm−2 are obtained with 2 mm cavity length and 20 um stripe width samples. A 94.2 mW single‐facet output power lasing around 854 nm and a 0.314 WA−1 slope efficiency is measured under RT CW operation. After a 10‐min aging process, the tested laser can operate stably under continuous operation conditions at RT and the lifetime can be approximated using an exponential fitting curve, indicating a good life reliability of this QW laser.

Reduction of GaAs Buffer Thickness and Its Impact on Epitaxially Integrated III-V Quantum Dot Lasers on a Si Substrate.

Monolithic integration of III-V quantum dot (QD) lasers onto a Si substrate is a scalable and reliable approach for obtaining highly efficient light sources for Si photonics. Recently, a combination of optimized GaAs buffers and QD gain materials resulted in monolithically integrated butt-coupled lasers on Si. However, the use of thick GaAs buffers up to 3 μm not only hinders accurate vertical alignment to the Si optical waveguide but also imposes considerable growth costs and time constraints. Here, for the first time, we demonstrate InAs QD lasers epitaxially grown on a 700 nm thick GaAs/Si template, which is approximately four times thinner than the conventional III-V buffers on Si. The optimized 700 nm GaAs buffer yields a remarkably smooth surface and low threading dislocation density of 4 × 108 cm-2, which is sufficient for QD laser growth. The InAs QD lasers fabricated on these ultrathin templates still lase at room temperature with a threshold current density of 661 A/cm2 and a characteristic temperature of 50 K. We believe that these results are important for the monolithically integrated III-V QD lasers for Si photonics applications.

Effect of GaAs Substrate Micropatterning on Threading Dislocation Density in Solution-Deposited Lead Sulfide Thin Films

Effect of GaAs Substrate Micropatterning on Threading Dislocation Density in Solution-Deposited Lead Sulfide Thin Films

Optimizing misfit dislocation glide kinetics for enhanced threading dislocation density reduction in Si1−xGex/Si(001) layers through dynamic growth rate control

Relaxed Si1−xGex layers on Si(001) serve as virtual substrates for strained Si or Ge layers. However, plastically relaxed layers inevitably contain misfit and threading dislocations, negatively affecting devices. Deposition of a SiGe layer on the backside of the substrate introduces a dislocation reservoir at the wafer edge that can reduce the threading dislocation density (TDD) of Si0.98Ge0.02/Si layers, as these preexisting dislocations start gliding toward the wafer center upon reaching the critical thickness. Here, we show that this low-strain system can be used effectively to study dislocation glide kinetics. In agreement with the literature, dislocation glide is a thermally activated process with an activation energy of 2.12–2.16 eV. Near the critical thickness, relaxation is sluggish and inefficient due to the linear dependence of the glide velocity on excess stress. At lower growth rates, dislocations from the edge reservoir are activated in a lower density due to the increase in the critical thickness through partial strain relaxation by already activated dislocations. Contrary to common models, here, the lowest possible growth rate is not essential for minimizing the TDD. Instead, a careful balance between low and high growth rates is beneficial. Overcoming the initial sluggish and inefficient relaxation phase is critical while also avoiding accumulation of strain energy, and, therefore, the activation of dislocation sources. Only in a later stage of buffer growth, the growth rate should be reduced to a minimum. With this method, the TDD of strain relaxed Si0.84Ge0.16 layers is reduced to 7 × 104 cm−2.

Crystal Quality and Efficiency Engineering of InGaN‐Based Red Light‐Emitting Diodes

This article is aimed at understanding of the complex design of metalorganic chemical vapour deposition ‐grown InGaN‐based red light‐emitting diode (LED) structure. The contribution of different elements of red LED structure to the stress distribution and threading dislocation density (TDD) evolution is theoretically investigated. For this purpose a self‐consistent modeling of the structure growth process is used, taking into account stress‐modulated indium incorporation, mismatch stress relaxation by threading dislocations and V‐pits, and nucleation of new threading dislocations. The simulation results, consisting of composition, stress, and TDD profiles, are then utilized for modeling of device operation, which allows to analyze contribution of different elements to the heterostructure operation.

Characterization of a filamentary discharge ignited in a gliding arc plasmatron operated in nitrogen flow

A gliding arc plasmatron (GAP) is a promising warm plasma source for the use in gas conversion applications but lacks an understanding of the plasma dynamics. In this paper, the gliding arc plasma conditions of a GAP operated with nitrogen flow (10 slm) are characterized using optical emission spectroscopy (OES) and numerical simulation. A simultaneously two-wavelength OES method and Abel inversion of the measured images with a spatial resolution of 19.6 μm are applied. The collisional radiative model used in this study includes Coulomb collisions of electrons. An iterative method of plasma parameter determination is applied. The determined values of the electric field up to 49 Td and electron density up to 2.5∙1015 cm−3 fit well to the plasma parameters received with different diagnostics methods in comparable plasma sources. Additionally, the electric current, which is calculated using the determined reduced electric field and electron density, is compared with the measured one.

Well Number Dependence of Internal Quantum Efficiency in AlGaN Quantum Wells on Low‐Dislocation Sputtered AlN Templates

The internal quantum efficiency (IQE) and cathodoluminescence intensity line profile of AlGaN multiple quantum well (MQW) structures on low‐dislocation face‐to‐face annealed sputtered AlN (FFA Sp‐AlN) and on conventional metalorganic vapor‐phase epitaxy‐grown AlN (MOVPE‐AlN) templates are evaluated and the effect of the number of quantum wells (QWs) on the IQE is discussed. The higher IQE in the FFA samples is probably due to the lower threading dislocation (TD) density; however, the IQE also increases with the number of QWs although the TD density remains constant. Effective diffusion length increases with the number of QWs, indicating that the AlGaN MQW layer helps to suppress point defect diffusion, resulting in IQE increase. Furthermore, the segregation of point defects into the TDs and point defect diffusion via the TDs may explain the difference in the IQE improvement rate between the MQWs on the FFA Sp‐AlN and MOVPE‐AlN templates.

Growth of InGaSb/AlInGaSb quantum cascade laser structures on GaSb substrates by molecular beam epitaxy

An InGaSb/AlInGaSb terahertz quantum cascade laser (THz-QCL) structure was grown by molecular beam epitaxy (MBE) on a GaSb substrate with introducing an InGaSb composition graded buffer layer. It was found that the occurrence of inverted pyramid-shaped defects with a size of several micrometers is related to oxygen. The lattice matching condition between InGaSb and AlInGaSb was investigated. We grew a 3 μm-thick In0.19Ga0.81Sb/Al0.19In0.16Ga0.65Sb THz-QCL active region with a threading dislocation density of ∼ 1 × 107 cm−2. The threading dislocation density remained nearly unchanged after a several-micrometer-thick QCL region. The density of defects of several micrometers in size was ∼ 6 × 103 cm−2.

Novel 3D reciprocal space visualization of strain relaxation in InSb on GaAs substrates

This study introduces the reciprocal space polar visualization (RSPV) method, a novel approach for visualizing x-ray diffraction-based reciprocal space data. RSPV allows for the precise separation of tilt and strain, facilitating their individual analysis. InSb was grown by molecular beam epitaxy on two (001) GaAs substrates—one with no misorientation (sample A) and one with 2° surface misorientation from the (001) planes (sample B). There is a substantial lattice mismatch with the substrate, and this results in the generation of defects within the InSb layer during growth. To demonstrate RSPV’s effectiveness, a comprehensive comparison of surface morphology, dislocation density, strain, and tilt was conducted. RSPV revealed previously unobserved features of the 004 InSb Bragg peak, partially explained by the presence of threading dislocations and oriented abrupt steps. Surface morphologies examined by an atomic force microscope revealed that sample B had significantly lower root mean square roughness. Independent estimates of threading dislocation density (TDD) using x-ray diffraction (XRD) and electron channelling contrast imaging confirmed that sample B exhibited a significantly lower TDD than sample A. XRD methods further revealed unequal amounts of α- and β-type threading dislocations in both samples, contributing to an anisotropic Bragg peak. RSPV is shown to be a robust method for exploring 3D reciprocal space in any crystal, demonstrating that growing InSb on misoriented GaAs produced a higher-quality crystal compared to an on-orientation substrate.