Thin Silicon Wafers Research Articles

Residual stress control in TiN/Si coatings deposited by unbalanced magnetron sputtering

TiN coatings deposited by unbalanced magnetron sputtering were used in a case study to determine the relationship between some deposition parameters, such as substrate bias and working gas pressure, and residual stress magnitude in the coatings. The test coatings, ranging in thickness from 1 to 12 μm, were deposited on thin silicon wafers and evaluated for residual stress magnitude and anisotropy, as well as nanohardness. It was found that the properties of TiN coatings could be linked to the stress level, which in turn was strongly affected by the deposition process conditions. The stress–temperature correlations were investigated by subjecting the coatings to a temperature cycle from room temperature to about 100 °C above the maximum deposition temperature. Stress–temperature plots were used to characterize residual stress relaxation in the coatings during post-deposition heat treatment.

Thin crystalline silicon solar cell bonded to sintered substrate with aluminum paste

Abstract Making thinner wafers is a simple way to reduce the production cost of silicon solar cells. However, thin wafers need to be supported mechanically in order to avoid the problem of breakage. Among the several possible supporting materials, silicon substrate made from the sintering of silicon powder, which is produced during the slicing process is the most favorable one because of its abundance and its similar thermal expansion coefficient with silicon wafers. For the bonding of the substrate and thin silicon wafers, aluminum paste is selected because of its compatibility with silicon and the possible BSF effect. Silicon solar cells of 150 μm with the sintered substrate on the back show 5.42% in solar cell conversion efficiency. Compared to commercial silicon cells, lower J sc is obtained. This might be due to the poor conduction in the back layer of aluminum, which is absorbed into the supporting substrate during the annealing process.

Transmission bender for polarizing neutrons

A system of a polarizing solid state bender and a collimator was built and tested. The bender consists of a stack of thin silicon wafers coated with polarizing FeCo–Si supermirrors. The stack is deflected in the middle by one wafer thickness. Inserted in an unpolarized neutron beam this device works as a spin splitter by transmitting the spin down component without any change in its flight path and reflecting the spin up component. With a collimator behind the bender it can be selected which one of the spin components is transmitted. In this way a transmission polarizer for neutrons with wavelengths above 4 Å was built which has a total length of less than 10 cm.

Air-gap type film bulk acoustic resonator using flexible thin substrate

This paper addresses the utilization of an ultra thin silicon wafer with thickness of 50 μm to fabricate film bulk wave acoustic resonator (FBAR) generating resonant motion at 2.5 GHz which can be applied to more flexible and accumulated microsystems. As the information and communication technology starts to improve, smaller and lighter systems are needed to be flexible in a worldwide market. To accomplish this many ideas on making the heavy and rigid pieces, such as RF filter or duplexer, thin FBAR using microelectromechanical systems technology is presented in this paper. As we fabricate the FBAR using thin silicon wafer with thickness of 50 μm, it is possible to realize integrated flexible microsystems and acquire properties better than the existing devices. The resonance characteristics of thin FBAR are predicted through MATLAB simulation and then thickness of electrode and piezoelectric thin film optimized are acquired. A parallel resonance frequency is measured at 2.487 GHz. The insertion loss, Q-factor, and K eff 2 are also 1.368 dB, 996.68, and 3.91%, respectively.

Fabrication of PIN diode detectors on thinned silicon wafers

Thin substrates are one of the possible choices to provide radiation hard detectors for future high-energy physics experiments. Among the advantages of thin detectors are the low full depletion voltage, even after high particle fluences, the improvement of the tracking precision and momentum resolution and the reduced material budget. In the framework of the CERN RD50 Collaboration, we have developed p–n diode detectors on membranes obtained by locally thinning the silicon substrate by means of tetra-methyl ammonium hydroxide etching from the wafer backside. Diodes of different shapes and sizes have been fabricated on 57 and 99 μm thick membranes. They have been tested, showing a very low leakage current (<0.4 nA/cm 2) and, as expected, a very low depletion voltage (<1 V for the 57 μm membrane). The paper describes the technological approach used for devices fabrication and reports selected results from the electrical characterization.

Solid state and conventional neutron optical elements

Neutron optical elements are needed to prepare neutron beams with the phase space volume required for an experiment. In the last years solid state neutron optical devices have been developed in Berlin, especially polarizers and collimators where the neutrons move in channels formed by thin silicon wafers. Such devices are smaller and lighter than their conventional counterparts, have well-defined channels and their lengths are below 10 cm. Solid state straight and radial benders for the spin polarization or analysis of neutrons and straight and radial collimators were built and tested at HMI. Their performance is compared to conventional benders and cavities. Finally, some general aspects of solid state elements are summarized.

Solid state and conventional neutron optical elements

Neutron optical elements are needed to prepare neutron beams with the phase space volume required for an experiment. In the last years solid state neutron optical devices have been developed in Berlin, especially polarizers and collimators where the neutrons move in channels formed by thin silicon wafers. Such devices are smaller and lighter than their conventional counterparts, have well-defined channels and their lengths are below 10 cm. Solid state straight and radial benders for the spin polarization or analysis of neutrons and straight and radial collimators were built and tested at HMI. Their performance is compared to conventional benders and cavities. Finally, some general aspects of solid state elements are summarized.

Time reversed wave propagation experiments in chaotic micro-structured cavities

The elastic wave propagation in strongly scattering solid-state cavity consisting of a thin micro-patterned silicon wafer is studied experimentally. The chaotic behavior is induced by the irregular boundary of the cavity and/or by fabricating patterns of small holes in the wafer by laser machining. The pattern and hole size are designed with length scales matching the wavelength ⩽1 MHz and induce multiple scattering within the wafer bounds. Regular patterns of holes add phononic band like dispersion properties to the system. Elastic waves obey under very general conditions time reversal and reciprocity symmetry. In the cavity system the strong mode mixing in the wafer between shear and compression waves, the strong anisotropy of silicon, and even small dissipation is not destroying the time reversal and reciprocity symmetry in the system. We present a systematic study of the quality of the time-reversal signal as function of the chosen time interval and the position in the recorded signal. Also the influence of time dilatation, i.e. stretching and compressing the time scale of the re-emitted signal, is studied.

Dicing Process for Thin Silicon Wafer by Using Femtosecond-laser

Thin semiconductor wafer is more required for portable devices due to its mechanical flexibility or space gain. In dicing process for this thin wafer, suppression of micro-cracks is indispensable, which result in starting point of substrate breakage. In this research, laser cutting was performed for thin silicon wafer as a new dicing technique to conventional diamond blade dicing. Nano-, pico- and femtosecond laser were used to cut substrates in order to investigate the dependence of the flexural strength on the pulse width and the irradiated laser energy. As a result of that, the average strength of the diced wafer with the femtosecond laser was about three times larger than that with the nanosecond laser. In the case using the femtosecond laser, moreover, the minimum strength was about three times as large as that of the conventional blade dicer.

Fabrication of the SCUBA-2 detector arrays

We describe the techniques used to fabricate SCUBA-2, the first large-format, filled array of bolometers for sub-millimeter astronomy. With two monolithic arrays of ∼10,000 bolometers, SCUBA-2 is made possible by a unique combination of advanced technologies. The detectors are made from thermally bonded and thinned silicon wafers whose surface is ion-implanted to match the impedance of free space. SCUBA-2s pixels are suspended on a 500nm silicon nitride membrane with low tensile stress. Deep-etch micromachining to 100μm by the Bosch process isolates each pixel thermally. Proximity effect transition edge sensors formed from Mo/Cu bilayers (Nucl. Instr. and Meth. A, these proceedings) are the temperature sensing elements for the bolometers. To read out such a large number of pixels, SCUBA-2 uses a superconducting quantum interference device readout for time domain multiplexing (Nucl. Instr. and Meth. A, these proceedings). The detector wafer is flip-chip bonded to the multiplexer wafer by indium bumps which provide electrical and thermal connections. The technologies that make SCUBA-2 possible have applications for large-format arrays from the submillimeter through the X-ray spectral regions.

Light detector development for CRESST II

CRESST-II detector modules rely on the ability to actively discriminate electron recoils from nuclear recoils via simultaneous measurement of phonons and scintillation light. The scintillation light produced in each target crystal is detected via an associated calorimeter consisting of a thin silicon wafer read out by a tungsten phase transition thermometer deposited on its surface. About 1% of the energy deposited in CaWO4 is detected as scintillation light; therefore, the sensitivity of the light detector is crucial for the discrimination of electron recoils from nuclear recoils at energies relevant for WIMP searches. We report the detector performance obtained using a thermometer geometry characterized by phonon collectors and a thin film thermal coupling to the heat sink (Fig. 1). This concept allows a high sensitivity by decoupling the area required for the collection of non-thermal phonons and the heat capacity of the sensor. With a 30×30×0.45mm3 light detector, energy thresholds below 5keV referred to energy deposition in CaWO4 have been obtained. Results achieved will be presented and an overview on further possibilities of development will be given.

Ultra Thin 실리콘 웨이퍼를 이용한 RF-MEMS 소자의 웨이퍼 레벨 패키징

In this paper, we report a novel RF-MEMS packaging technology with lightweight, small size, and short electric path length. To achieve this goal, we used the ultra thin silicon substrate as a packaging substrate. The via holes lot vortical feed-through were fabricated on the thin silicon wafer by wet chemical processing. Then, via holes were filled and micro-bumps were fabricated by electroplating. The packaged RF device has a reflection loss under 22 〔㏈〕 and a insertion loss of -0.04∼-0.08 〔㏈〕. These measurements show that we could package the RF device without loss and interference by using the vertical feed-through. Specially, with the ultra thin silicon wafer we can realize of a device package that has low-cost, lightweight and small size. Also, we can extend a 3-D packaging structure by stacking assembled thin packages.

Measurement of the Minority Carrier Diffusion Length in Thin Wafers of Semiconductor Crystals

A method for the measurement of the minority carrier diffusion length and the estimation of the surface recombination rate in thin silicon wafers is described. The method is based on the measurement of the photocurrent flowing through a wafer with identical shallow-lying p–n junctions occupying a sufficiently large area on both sides of the wafer (a phototransistor with a disrupted base). Measurements are performed at two polarities of the bias voltage and two diameters of the radiation beam. Practical recommendations concerning the implementation of this method are given.

2916 ELID 研削によるシリコンウエハの超薄厚加工

For grinding the ultra thin wafer, an ELID-grinder for substrates had developed. In this study, the authors thus attempted the mirror surface grinding of thin silicon wafer by the electrolytic in-process dressing (ELID) grinding method, which has been successfully used to obtain efficient and high quality ground surfaces of brittle materials. In the experiments, #2000 and #4000 cast bonded diamond wheels were used to investigate the ELID grinding characteristics of silicon. The results of the experiments showed that the ground surface roughness improves as the abrasive diameter becomes smaller, and a high quality-grinding surface of 7.0 nm Ra can be achieved with the #4000 wheel, and good surface flatness can be obtain.

フェムト秒レーザアブレーションにおけるレーザ発振条件の加工特性に及ぼす影響

Femtosecond laser can minimize the undesirable thermal effected zone, and hence is suitable for the processing of brittle materials. Taking advantage of this method, some glassy materials can be cut without any micro-cracks on the surface. This paper presents the drilling of ultra thin silicon wafers irradiated with femtosecond laser. In order to understand fundamental characteristics of the ablation using femtosecond laser, influence of laser parameters such as pulse energy, pulse separation time, etc. is investigated. As the pulse energy increased, the distribution of the air breakdown grew only to the side of the focusing lens and the ablation depth was saturated by the breakdown plasma which causes scattering of the laser. Therefore the highest processing rate was obtained with the maximum pulse energy not to generate the breakdown plasma. Double pulse method was useful for restraint of the swelling around the ablation crater. The swelling height was within 0.5μm with the most suitable pulse separation time (10ps-20ps).

Charged particle detection using a CMOS active pixel sensor

Active pixel sensor (APS) is a promising technology for next-generation vertex detectors. This paper discusses the design and testing of two generations of APS chips. Both are arrays of 128 by 128 pixels, each 20 by 20 /spl mu/m. Each array is divided into subarrays in which different sensor structures (4 in the first version and 16 in the second) and/or readout circuits are employed. Measurements of several of these structures under Fe/sup 55/ exposure are reported. The sensors have also been irradiated by 55 MeV protons to test for radiation damage. The radiation increases the noise and reduces the signal. The noise can be explained by shot noise from the increased leakage current, and the reduction in signal is due to charge being trapped in the epi layer. Nevertheless, the radiation effect is small for the expected exposures at RHIC and RHIC II. Finally, we describe our conception for mechanically supporting a thin silicon wafer in an actual detector.

SOI-based fabrication processes of the scanning mirror having vertical comb fingers

A 1500 μm ×1200 μm scanning mirror having vertical comb fingers has been fabricated by using silicon-on-insulator (SOI)-based fabrication processes. It is a vertically driven electrostatic scanner and composed of two structures having vertical comb fingers. The comb fingers are etched by deep inductively coupled plasma reactive ion etching (ICPRIE) and assembled by the flip chip aligner bonder. The buried oxide layer is used as an etch stop to acquire the uniform thickness of torsion bars of the upper structure. Using an oxide mask process, we acquired the uniform comb fingers at the lower structure without the planarization process. The handling difficulty of a thin silicon wafer is improved by using an anodic bonding and following mechanical polishing. This scanning mirror showed a linear actuating performance. It can be used for laser display as a galvanometric vertical scanner.

Study of Stresses in Thin Silicon Wafers with Near-infraredphase Stepping Photoelasticity

This paper reports on a study of stress in thin silicon plates sectioned from wafers by a near-infrared transmission technique. Phase stepping was incorporated to determine the magnitude and orientation of stress from fractional birefringence fringe images. The anisotropic relative optic-stress coefficient of (100) silicon was determined and the limitation of the stress orientation measurement is discussed.

Full-field optical measurement of curvatures in ultra-thin-film–substrate systems in the range of geometrically nonlinear deformations

This article describes coherent gradient sensing (CGS) as an optical, full-field, real-time, nonintrusive, and noncontact technique for the measurement of curvatures and nonuniform curvature changes in film–substrate systems. The technique is applied to the study of curvature fields in thin Al films (6 μm) deposited on thin circular silicon wafers (105 μm) of “large” in-plane dimensions (50.8 mm in diameter) subjected to thermal loading histories. The loading and geometry is such that the system experiences deformations that are clearly within the nonlinear range. The discussion is focused on investigating the limits of the range of the linear relationship between the thermally induced mismatch strain and the substrate curvature, on the degree to which the substrate curvature becomes spatially nonuniform in the range of geometrically nonlinear deformation, and finally, on the bifurcation of deformation mode from axial symmetry to asymmetry with increasing mismatch strain. Results obtained on the basis of both simple models and more-detailed finite-element simulations are compared with the full-field CGS measurements with the purpose of validating the analytical and numerical models.

The engineering of intrinsic point defects in silicon wafers and crystals

Using new techniques which manage intrinsic point defect concentrations during the growth of silicon crystals and subsequent processing of silicon wafers, it is possible to achieve two highly desirable results. First, using techniques which maintain crystals sufficiently close to equilibrium during growth such that it is possible to grow large diameter CZ silicon crystals which are completely free of agglomerates of vacancies (voids) or self interstitials (dislocation loops). Secondly, through the control of quenched-in vacancy concentration profiles in thin silicon wafers during rapid thermal annealing processes, it is possible to obtain ideal oxygen precipitation behavior in silicon wafers. Such vacancy concentration engineered wafers are effectively programmed to produce robust defect distributions suitable for internal gettering (IG) applications. The performance of such wafers is independent of all parameters previously important to engineering of IG structures: oxygen concentration, crystal growth method and even the application in which the wafer is used. These two new types of material represent important simplifications to the successful defect engineering of silicon wafers in advanced IC applications. It is shown that, taken together, results from both crystal growth and wafer processing studies place a large number of constraints on the parameter set used to describe the properties of the vacancies and self interstitials in silicon. A model for the oxygen precipitation enhancement in the MDZ process is given.