Thin-film Transistor Technology Research Articles

Revolutionizing electronics with oxide thin-film transistor technology

Revolutionizing electronics with oxide thin-film transistor technology

Multi-project wafers for flexible thin-film electronics by independent foundries

Flexible and large-area electronics rely on thin-film transistors (TFTs) to make displays1–3, large-area image sensors4–6, microprocessors7–11, wearable healthcare patches12–15, digital microfluidics16,17 and more. Although silicon-based complementary metal–oxide–semiconductor (CMOS) chips are manufactured using several dies on a single wafer and the multi-project wafer concept enables the aggregation of various CMOS chip designs within the same die, TFT fabrication is currently lacking a fully verified, universal design approach. This increases the cost and complexity of manufacturing TFT-based flexible electronics, slowing down their integration into more mature applications and limiting the design complexity achievable by foundries. Here we show a stable and high-yield TFT platform for the fabless manufacturing of two mainstream TFT technologies, wafer-based amorphous indium–gallium–zinc oxide and panel-based low-temperature polycrystalline silicon, two key TFT technologies applicable to flexible substrates. We have designed the iconic 6502 microprocessor in both technologies as a use case to demonstrate and expand the multi-project wafer approach. Enabling the foundry model for TFTs, as an analogy of silicon CMOS technologies, can accelerate the growth and development of applications and technologies based on these devices.

Selenium-alloyed tellurium oxide for amorphous p-channel transistors.

Compared to polycrystalline semiconductors, amorphous semiconductors offer inherent cost-effective, simple and uniform manufacturing. Traditional amorphous hydrogenated Si falls short in electrical properties, necessitating the exploration of new materials. The creation of high-mobility amorphous n-type metal oxides, such as a-InGaZnO (ref. 1), and their integration into thin-film transistors (TFTs) have propelled advancements in modern large-area electronics and new-generation displays2-8. However, finding comparable p-type counterparts poses notable challenges, impeding the progress of complementary metal-oxide-semiconductor technology and integrated circuits9-11. Here we introduce a pioneering design strategy for amorphous p-type semiconductors, incorporating high-mobility tellurium within an amorphous tellurium suboxide matrix, and demonstrate its use in high-performance, stable p-channel TFTs and complementary circuits. Theoretical analysis unveils a delocalized valence band from tellurium 5p bands with shallow acceptor states, enabling excess hole doping and transport. Selenium alloying suppresses hole concentrations and facilitates the p-orbital connectivity, realizing high-performance p-channel TFTs with an average field-effect hole mobility of around 15 cm2 V-1 s-1 and on/off current ratios of 106-107, along with wafer-scale uniformity and long-term stabilities under bias stress and ambient ageing. This study represents a crucial stride towards establishing commercially viable amorphous p-channel TFT technology and complementary electronics in a low-cost and industry-compatible manner.

The Fabrication and Characterization of Direct Conversion Flat Panel X-ray Imager with TlBr Film

The novel direct conversion flat panel detectors (FPDs) utilizing thallium bromide (TlBr) films are developed and characterized in this study. Thin TlBr films, deposited using an evaporation technique, achieved thicknesses of 10 μm and 50 μm. A pixel sensor array, with a pixel size of 235 × 235 μm2 and a sensitive area of 29.61 × 39.48 mm2, was developed using low-temperature polysilicon thin-film transistor (LTPS TFT) technology as the initial study to explore performance characteristics of developed imaging system. The TlBr film was characterized based on the current-voltage (I-V) profile, showing a resistivity of 2.78 × 101⁰ Ω·cm. The LTPS TFT showed a leakage current of about 10-13 A, while the noise of TlBr FPD system was around 104 e- rms, primarily limited by the readout system. The detector system was characterized using radiation from an X-ray tube with a voltage in the range of 30 kV to 100 kV and a current of 2 mA, involving an X-ray test chart as the object with the processing time of 18.15 to 18.30 ms per frame. Based on the contrast and contrast-to-noise ratio (CNR) values, the 10 μm and 50 μm TlBr FPD clearly captured the image in operation between 30 kV and 100 kV. The 50 μm TlBr FPD demonstrated improved sensitivity, showing pixel values with 10 times higher intensity and enhanced line pair detail at 30 kV X-ray operation. The 10 μm TlBr achieved spatial resolution of 267 μm full width at half maximum (FWHM), while the 50 μm TlBr achieved 250 μm FWHM. In the X-ray imaging demonstration, the shape and structure of anchovy was clearly distinguished. The TlBr film FPD presents promising potential for a room temperature X-ray imager.

Flexible Unipolar IGZO Transistor-Based Integrate and Fire Neurons for Spiking Neuromorphic Applications.

In this article, three different implementations of an Axon-Hillock circuit are presented, one of the basic building blocks of spiking neural networks. In this work, we explored the design of such circuits using a unipolar thin-film transistor technology based on amorphous InGaZnO, often used for large-area electronics. All the designed circuits are fabricated by direct material deposition and patterning on top of a flexible polyimide substrate. Axon-Hillock circuits presented in this article consistently show great adaptability of the basic properties of a spiking neuron such as output spike frequency adaptation and output spike width adaptation. Additional degrees of adaptability are demonstrated with each of the Axon-Hillock circuit varieties: neuron circuit threshold voltage adaptation, differentiation between input signal importance, and refractory period modulation. The proposed neuron can change its firing frequency up to three orders of magnitude by varying a single voltage brought to a circuit terminal. This allows the neuron to function, and potentially learn, at vastly different timescales that coincide with the biologically meaningful timescales, going from milliseconds to seconds, relevant for circuits meant for interaction with the environment. Thanks to careful design choices, the average measured power consumption is kept in the nW range, realistically allowing upscaling towards the spiking neural networks in the future. The spiking neuron with refractory period modulation presented in this work has an area of 607.3 μm × 492.2 μm, it experimentally demonstrated firing rates as low as 11.926 mHz, and its energy consumption per spike is ≈ 700 pJ at 30 Hz.

High Reliability Tungsten-Doped Indium Zinc Oxide Thin Film Transistors for Display Applications

Recently, flat panel display technologies are based on amorphous silicon (a-Si), polycrystalline silicon (poly-Si) or amorphous oxide semiconductor (AOS) thin film transistors (TFTs) technology. In order to reach higher performance for ultra-high resolution display applications, the material selection for the channel layer is vital. AOS TFTs drawn lots of attention because of its advantages such as low leakage current, high driving current and high uniformity [1,3]. In this work, we presented a novel amorphous oxide semiconductor (AOS) material of gallium-free a-InWZnO thin film transistors (IWZO TFTs) which is very promising to be applied for ultra-high resolution display technology. Experiment In this work, we demonstrated the structure of a-IWZO TFTs processes. Figure 1 shows the schematic of the TFT cross-section. After growing a 550 nm thermal oxide layer as buffer layer, a 25-nm-thick of molybdenum was deposited by DC-sputter as the bottom gate electrode. A 10-nm-HfO2 was deposited by plasma-enhanced atomic layer deposition (PEALD) system as high-κ gate dielectric (GI). Then, post deposition annealing (PDA) was carried out to enhance the quality of the insulator layer. Next, an ultra-thin body a-IWZO was deposited by RF-sputter as channel layer. Finally, source and drain were defined by lift-off process and the gate contact via was etched by dry etching to finish the device fabrication. Result and Discussion Figure 1(b) shows the negative gate bias stress (NGBS) transfer curve (ID-VG) of a-IWZO TFTs with passivation layer. The experimental results have shown that passivation layer could keep the back channel of IWZO channel from exposing to oxygen and hydrogen from the atmosphere. Without the passivation layer, the back channel would contact moisture leading the diffused hydrogen atoms to fill oxygen vacancy sites and de-trap free carriers, causing the VTH shifts negatively. The ultra-thin a-IWZO TFTs with passivation layer exhibited a low subthreshold swing (S.S.) of 89.7 mV/dec, high on/off current ratio (ION/IOFF) of 2.1×107 and small threshold voltage shift (ΔVth) of -0.097 V during NGBS of -2MV/cm with 2000s. To sum up, the passivation layer could enhance the a-IWZO TFTs reliability. Reference [1] Kamiya, H. Hosono, NPG Asia Mater., vol. 2, pp. 15, 2010.[2] Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, nature, vol. 432, no. 7016, pp. 488-492, 2004.[3] Y. Kuo, C. M. Chang, I. H. Liu, and P. T. Liu, Scientific reports, vol. 9, no. 1, pp. 1-7, 2019. Figure 1

High-performance thin-film transistors based on aligned carbon nanotubes for mini- and micro-LED displays

Inorganic mini-LEDs (mLEDs) and micro-LEDs (μLEDs) have ultrahigh luminance and long lifetimes, and are challenging liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays for next-generation displays. Backplane thin-film transistors (TFTs) for mLED/μLED displays with high mobility and large driving current are under development as currently widely used backplane active materials such as crystalline silicon (CMOS Si), amorphous silicon (a-Si), low-temperature polycrystalline silicon (LTPS), and metal oxides are facing difficulties to meet the requirements. Semiconducting carbon nanotubes (s-CNTs) have long been considered as promising materials for TFTs because of their unique electronic properties. However, TFTs based on s-CNT random networks show inadequate performance due to large amounts of inter-tube junctions. Here, we report high performance TFTs based on wafer-scale, high-density aligned s-CNT array (A-CNT) for mLED/μLED driving backplanes. These A-CNT TFTs with micrometer scale channel length were fabricated using standard semiconductor manufacturing process, and exhibited mobility as high as 160 cm2/Vs and driving current as large as 417 μA/μm at operation voltage of ∼3 V, exceeding commercially available TFTs with similar device sizes. In addition, these A-CNT TFTs have demonstrated good driving capability for commercial mLEDs in a one-transistor-one-diode (1T1D) pixel circuit configuration, and been capable of driving commercially available mLED/μLED displays. Moreover, a prototype display with 2 × 2 mLED array have been demonstrated with full control of each pixel, manifesting the great potential for A-CNT TFT technology for backplane of mLED/μLED displays.

CFP-Special Issue on “Thin-Film Transistor Technologies”

CFP-Special Issue on “Thin-Film Transistor Technologies”

Integrated Water-Level Sensor Using Thin-Film Transistor Technology.

A low-cost water-level sensor was developed utilizing a capacitive sensor design with only one thin-film transistor (TFT). The integration of the a-IGZO TFT process facilitated the complete integration of the water-level sensor on a substrate, including essential components, such as the transistor, capacitor, wires, and sensing electrode. This integration eliminates the need for a separate mounting process, resulting in a robust sensor assembly. To comprehensively assess the performance of the developed water-level sensor, rigorous evaluations were conducted using both MOSFET and TFT integration. In the case of the water-level sensor featuring a-IGZO TFT integration, a voltage output of 4.2 V was measured when the tank was empty, while a voltage output of 0.9 V was measured when the tank was full. Notably, the integrated sensor system demonstrated a higher output voltage compared with the MOSFET sensor, primarily due to the significantly reduced parasitic capacitance of the TFT. The use of a-IGZO TFT in the integrated sensor system contributes to enhanced sensitivity and accuracy. The lower parasitic capacitance inherent in TFT technology allows for improved voltage measurement precision, resulting in more reliable and precise water-level sensing capability. The development of this integrated water-level sensor holds immense potential for a wide range of applications that require a combination of cost-effectiveness, accurate monitoring, and flexibility in form factor. With its affordability, the sensor is accessible for various industries and applications.

A 6-bit Analog-to-Digital Converter for Electromyography Implemented Using N-Type Metal-Oxide Thin-Film Transistors

Consisting of more than 2000 n-type metal-oxide thin-film transistors (TFTs), a 6-bit analog-to-digital converter (ADC) adopting the subranging architecture is designed, fabricated, characterized and applied to digitize an electromyogram (EMG). Consisting of amplifiers each with a feedback stage for gain-boosting, the comparators at the heart of the ADC incorporate a scheme for compensating the offset error arising from the inevitable non-uniformity of the TFT parameters. Compared to the specifications of reported ADCs based on TFTs, a higher sampling rate of 1000 S/s, a smaller differential non-linearity of 0.76 least-significant bit (LSB) and a smaller integral non-linearity of 0.88 LSB are achieved. Since the same low-temperature TFT technology for fabricating the EMG acquisition system on a flexible substrate is used to construct the ADC, the two could be readily monolithically integrated.

Gate‐Last MoS2 Transistors for Active‐Matrix Display Driving Circuits

AbstractAdvancements in display technology have primarily focused on discovering new materials to develop thin‐film transistors (TFTs) that complement mainstream technologies. The emerging 2D semiconductors are one of the most promising candidates due to their ultra‐thin thickness, exceptional electrical qualities, and large‐scale availability. However, these atomically thin materials are delicate and typically prepared through standard gate‐first fabrication processes, necessitating their transfer onto specific substrates. In this study, a demonstration of an in situ gate‐last process for 2D semiconductor‐based TFTs technology is presented. This approach bypasses the yield‐limiting transfer process, enabling large‐scale display applications. The as‐fabricated MoS2 TFTs retains their intrinsic properties with a current density reaching ≈≈10 µA µm−1. Additionally, it is successfully showcased that the two transistor‐one capacitor active‐matrix display driving circuits with a high pixel yield. The patterned matrix exhibits no crosstalk and can be driven by either the pulse amplitude modulation or pulse width modulation scheme, offering flexible applications.

(Invited) Industrial Face of Nanotechnology

Ever since the proposal and demonstration of quantum dots in 1980 by Drs. A. Efros, Al. Efros and A. Ekimov, the relentless progress of nanotechnology has been unstoppable. And nowhere this progress is more evident than in the Si Very Large Scale Integrated Circuits (VLSI) and Thin Film Transistor (TFT) technologies. The minimum feature size of the Si VLSI with up to 2.6 trillion transistors on a chip was reduced to 3 nm in 2022 with plans for the 2 nm technology. TFTs fabricated on glass or even on cloth or paper enable integrated circuits with 50 nm tolerances over square meter sizes. These technologies have become disruptive with applications ranging from 5G and Beyond 5G communications to robotics, driverless cars, and electronic warfare. This talk will focus on the new counter-intuitive physics of ballistic transport required to support the design, characterization, and parameter extraction for nanoscale Si VLSI and TFT integrated circuits. Figure 1

Rapid and Highly Sensitive Detection of Leishmania by Combining Recombinase Polymerase Amplification and Solution-Processed Oxide Thin-Film Transistor Technology.

Nucleic acid detection is widely used to identify infectious diseases and ensure food safety. However, conventional PCR-based techniques are time consuming. Thus, this study aims to combine recombinase polymerase amplification (RPA), which enables the rapid amplification of even trace amounts of nucleic acid fragments within 10-40 min at 37-42 °C, and solution-processed oxide thin-film transistor (TFT) technology, which exhibits high detection sensitivity, to detect Leishmania. A single-stranded anti-probe was incorporated into the RPA primer to facilitate effective hybridization between the RPA product and the immobilized probe on the solution-processed oxide TFT. The RPA-amplified product carrying an anti-probe enabled specific binding to the chip surface. Changes in current were monitored before and after sample incubation to identify the target nucleic acids in the samples accurately. The proposed method achieved a remarkable limit of detection of 101 copies/μL of the Leishmania HSP70 fragment within 30 min. The design of the probes on the solution-processed oxide TFT surface and the anti-probe simplified the detection of other target nucleic acids, eliminating the need to denature DNA double-strands for specific binding during nucleic acid detection. Thus, the novel method offers the advantage of requiring minimal reagent resources and eliminates the need for complex procedures.

A chaos-metastability TRNG for natively flexible IGZO circuits

Modern technologies of truly flexible integrated circuits are usually based on large single-type transistors. If considered as a platform for Internet-of-Things (IoT) devices, they would require dedicated cryptographic solutions that could fit their limitations. In this article, we present an implementation of an efficient and fast-start true random number generator (TRNG) developed with a metal-oxide thin-film transistor (TFT) technology on a flexible substrate. This is our first full-custom TRNG implementation following the programmable logic ones. The architecture of the TRNG utilizes a chaotic circuit boosting an RS flip-flop leading to random oscillatory metastable behavior. The implementation is based on indium-gallium-zinc oxide (IGZO or InGaZnO) n-type TFT transistors with 0.8 × 5 μm channels. The solution delivers constant 66.7 kbit/s stream produced by 0.3 square millimeters of a flexible thin-film circuit using 200 μW of power. The randomness of the TRNG binary stream was verified by Diehard and NIST Suit tests.

3‐Masks‐Processed Sub‐100 nm Amorphous InGaZnO Thin‐Film Transistors for Monolithic 3D Capacitor‐Less Dynamic Random Access Memories

AbstractThe capacitor–less embedded dynamic random access memory (eDRAM) based on oxide semiconductor (OS) transistors exhibits a promising future and thus has lead to a growing demand for nanoscale OS thin–film transistors (TFTs). In this work, a self–aligned top–gate (SATG) amorphous InGaZnO (a‐IGZO) TFT is demonstrated by using the simplest 3‐masks (3M) process, and the downscaling‐related issues are carefully addressed to strengthen its back–end–of–line (BEOL) compatibility and mass producibility. The gate insulator (GI) and associated interface defects of the TFTs are jointly optimized with 4–nm atomic‐layer‐deposited (ALD) AlOx on the pre‐oxidized a‐IGZO. The defects in a‐IGZO channel are further manipulated with a rapid thermal anneal (RTA) in oxygen. By virtue of the strengthened gate controllability and modified channel properties, the fabricated TFT with 97‐nm gate length (Lg) exhibits decent performance, such as a maximum on–state current (ION) of 32.4 µA µm−1, as well as clear linear and saturation characteristics. Based on such 3M SATG a‐IGZO TFTs with high device performance and inherently minimal parasitic capacitances, the developed capacitor‐less eDRAM bit cell achieves a wide sensing margin and a long retention time of over 500 s. A highly manufacturable oxide TFT technology for high–performance and high–density monolithic–3D (M3D) integration is thus well established.

47‐1: Ambipolar Gap‐type a‐Si‐TFT Circuit Applied for a Color Ambient Light Sensor

In this paper, we proposed ambient light sensor (ALS) and color temperature sensor (CTS) circuit integrated in the edge of LCD display panel. The designed circuit is based on the thin film transistor (TFT) technology, the photo TFT can produce high photo current under light for sensor realizing ambient light from 0~50000Lux. Also, CTS circuit are based on ALS circuit but covered with color filter. The result shows that CTS can discriminate different color temperature in ambient light. The biggest advantage of this sensor is that it is compatible with TFT process in manufacturing, and it is small in size and high in efficiency. It has the potential to replace photodiode sensors.

Low-Voltage Operated High DC Gain Amplification Stage Based on Large-Area Manufacturable Amorphous Oxide Semiconductor Thin-Film Transistor

The industry-standard amorphous metal–oxide–semiconductor (AOS) thin-film transistor (TFT) technology is demonstrated for making low-voltage high intrinsic gain devices. It is revealed by the technology computer-aided design (TCAD) simulation that, without need of making Schottky barrier contacts, large output resistance and high intrinsic gain can be achieved in a subthreshold regime for AOS TFTs. It is further proved by the measurement results with the fabricated AOS TFT from a Gen-4.5 manufacturing line. A simple single-stage zero- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\textit{V}_{\text{GS}}$</tex-math> </inline-formula> load amplifier is implemented as a proof of concept, achieving a voltage gain larger than 50 for weak signal detection at a supply voltage of 5 V.

Understanding Illumination Effect on Saturation Behavior of Thin Film Transistor

Thin film transistor (TFT) has been a key device for planal drive display technology, and operating the TFT device in a saturation regime is particularly important for driving the light emission at a stable current. Considering the light emission reaches the TFT planal, it is thereby meaningful to understand the effect of illumination on TFT saturation behavior in order to improve the stability of light emission. Through experiments and simulations, our study shows that the drift current of photogenerated carriers can follow a saturation behavior when the channel conductance is dominated by charges induced by gate bias rather than the charges generated by photons, and vice versa. The obtained device physics insights are beneficial for developing TFT technologies that can drive light emission at a stable current.

An Integrated Analog Front-End System on Flexible Substrate for the Acquisition of Bio-Potential Signals.

The application of a versatile, low-temperature thin-film transistor (TFT) technology is presently described as the implementation on a flexible substrate of an analog front-end (AFE) system for the acquisition of bio-potential signals. The technology is based on semiconducting amorphous indium-gallium-zinc oxide (IGZO). The AFE system consists of three monolithically integrated constituent components: a bias-filter circuit with a bio-compatible low cut-off frequency of ≈1Hz, a 4-stage differential amplifier offering a large gain-bandwidth product of ≈955kHz, and an additional notch filter exhibiting over 30dB suppression of the power-line noise. Respectively built using conductive IGZO electrodes with thermally induced donor agents and enhancement-mode fluorinated IGZO TFTs with exceptionally low leakage current, both capacitors and resistors with significantly reduced footprints are realized. Defined as the ratio of the gain-bandwidth product of an AFE system to its area, a record-setting figure-of-merit of ≈86kHzmm-2 is achieved. This is about an order of magnitude larger than the < 10kHzmm-2 of the nearest benchmark. Requiring no supplementary off-substrate signal-conditioning components and occupying an area of ≈11mm2 , the stand-alone AFE system is successfully applied to both electromyographyand electrocardiography (ECG).

Dependence of the Transfer Characteristics of Metal-Oxide Thin-Film Transistors on the Temperature of an Extended Oxidizing Heat-Treatment

When a metal-oxide (MO) thin-film transistor (TFT), specifically that based on indium-gallium-zinc oxide (IGZO), is subjected to an oxidizing heat-treatment, its transfer characteristic is found to exhibit a parallel shift that depends on the temperature and saturates upon an extended heat-treatment. Presently a model governing the oxidation and reduction kinetics of donor-defects is applied to describe the observed temperature dependence. Quantified by the change in the saturated turn-on voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{{\text {ON}\text {Sa}\text {t}}}$ </tex-math></inline-formula> ), the parallel shift of the transfer characteristic of a TFT after an extended oxidizing heat-treatment in the temperature range from 300 to 450 °C can be precisely predicted by measurable model parameters. These results further illustrate the utility of the model as a tool for developing and optimizing MO TFT technologies by controlling <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathbf {V}_{{\text {ON}\text {Sa}\text {t}}}$ </tex-math></inline-formula> .