Cache Table Research Articles

Secure Task Offloading and Resource Allocation Strategies in Mobile Applications Using Probit Mish-Gated Recurrent Unit and an Enhanced-Searching-Based Serval Optimization Algorithm

Today, with the presence of 5G communication systems, including Internet of Things (IoT) technology, there is a high demand for mobile devices (especially smartphones, tablets, wearable technology, and so on). Regarding this proliferation and high demand, the massive adoption of mobile devices (MDs) has led to an exponential increase in network latency; the heavy demand for cloud servers causes the degradation of data traffic, which considerably impacts the real-time communication and computing aspects of mobile devices. As a result, mobile edge computing (MEC), an efficient framework capable of enhancing processing, optimizing energy usage, and offloading computation tasks, is considered a promising solution. In current research, numerous models have been implemented to achieve resource allocation and task offloading. However, these techniques are ineffective due to privacy issues and a lack of sufficient resources. Hence, this study proposes secure task offloading and resource allocation strategies in mobile devices using the Probit Mish–Gated Recurrent Unit (PM-GRU) and Entropic Linear Interpolation-Serval Optimization Algorithm (ELI-SOA). Primarily, the tasks to be offloaded and their attributes are gathered from mobile users and passed to a local computing model to identify the edge server. Here, the task attributes and the server attributes are compared with a cache table using the Sorensen–Dice coefficient. If the attributes match, then details about the appropriate edge server are produced. If the attributes do not match, then they are inputted into a global scheme that analyzes the attributes and predicts the edge server based on the Probit Mish-Gated Recurrent Unit (PM-GRU). Then, the server information is preserved and updated in the cache table in the local scheme. Further, the attributes, along with the predicted edge server, are inputted into a system for privacy-preserving smart contract creation by using Exponential Earth Mover’s Distance Matrix-Based K-Anonymity (EEMDM-KA) to develop a secure smart contract. Subsequently, the traffic attributes in the smart contract are extracted, and the request load is balanced by using HCD-KM. Load-balanced requests are assigned to the edge server, and the optimal resources are allocated in the cloud server by using the Entropic Linear Interpolation-Serval Optimization Algorithm (ELI-SOA). Finally, the created smart contract is hashed based on KECCAK-512 and stored in the blockchain. With a high accuracy of 99.84%, the evaluation results showed that the proposed approach framework performed better than those used in previous efforts.

Advanced approaches to prevent ARP attacks

Advanced approaches to prevent ARP attacks

모바일 저장장치 성능 향상을 위한 통합 호스트-저장장치 주소변환 테이블 캐시 관리기법

모바일 저장장치 성능 향상을 위한 통합 호스트-저장장치 주소변환 테이블 캐시 관리기법

Accelerating Protocol Oblivious Forwarding Programmable Data Plane With Flow Cache

The advances in software-defined networking (SDN) have recently promoted the development of Programmable Data Planes (PDP). PDP is famous in various network environments that need to support new protocols due to its flexibility and protocol independence. Protocol-oblivious forwarding (POF) is an implementation of PDP that uses <offset, length> to describe the match fields and mixes the protocol parsing into the pipeline, so there is no need for a pre-defined packet header parser. Current cache schemes for the data plane, such as Microflow Cache/Megaflow Cache, are primarily implemented based on the pre-defined packet header parser. In this paper, we first analyzed the two difficulties of generating cache tables on POF PDP. Then we analyzed the advantages and disadvantages of the single flow table cache system and multiple flow tables cache system from the perspective of time overhead. Finally, we propose a pipeline-oriented cache system to accelerate POF PDP. Aiming at the pipeline with multiple branches and multiple matching paths, we design algorithms to obtain all cache tables. Then our design leveraged the incremental calculation feature of the hash function to reduce the time overhead of cache lookup. In addition, the sorting mechanism and sleep mechanism for multiple cache tables were proposed according to the locality of traffic. Our design is implemented in a real POF PDP environment. The experimental results show that our pipeline-oriented cache scheme can effectively accelerate the programmable data plane, reducing packet forwarding latency and improving the throughput.

Defending a wireless LAN against ARP spoofing attacks using a Raspberry Pi

The Address Resolution Protocol (ARP) is a protocol that converts Internet Protocol (IP) addresses to Media Access Control (MAC) addresses. Due to a security issue known as "Man in the Middle," identity theft is feasible using the ARP protocol. ARP spoofing is one of the weaknesses in wireless networks when an attacker effectively masquerades as a legitimate one. Spoofing attacks will reduce network performance and break several security measures. In networks that use MAC address-based filtering to verify clients, all a spoofer needs is an actual MAC address from an authorised client to gain an unfair advantage. The research recommends developing a security system recognising and preventing ARP spoofing attacks. This system detects ARP spoofing attempts by comparing the static MAC address of the original router to the router's MAC address in the ARP cache table. After detecting the attack using information collected from the router's MAC address in the ARP cache table, the system will conduct a de-authentication attack against the attacker's MAC address. If the attacker is disconnected from the WLAN, they cannot perform ARP spoofing attacks. This system is operated using a Raspberry Pi Model B. Most ARP spoofing attacks can be detected in 0.93 seconds, and responding takes 3.05 seconds.

Provably curb man-in-the-middle attack-based ARP spoofing in a local network

Even today, internet users’ data security remains a significant concern. One problem is ARP poisoning, otherwise referred to as ARP spoofing. Such attacks are intended to exploit the identified ARP protocol vulnerability. Despite no straightforward remedy for ARP spoofing being apparent, certain actions may be taken to maintain one’s safety. The most basic and common defence against a poisoning attack is manually adding MAC and IP addresses to the static ARP cache table. However, this solution is ineffective for large networks where static entries require considerable time and effort to maintain, whether by human input or via special tools and settings for the static entries of network devices. Accordingly, this paper aimed to monitor network packet information and detect the behaviour of ARP poison attacks on operating systems, for instance Windows and Linux. The discovery and defence policy systematically and periodically check the MAC addresses in the ARP table, enabling alerts to be issued if a duplicate entry is detected. This enables the poison-IP address to be blocked before a reply is sent. Finally, the results showed that the superiority was successfully achieved in the detection, prevention and reporting mechanisms in the real-world environment.

ASD: ARP Spoofing Detector Using OpenWrt

The address resolution protocol (ARP) is one of the most important communication protocols in a local area network (LAN). However, since there is no authentication procedure, the ARP is vulnerable to cyberattack such as ARP spoofing. Since ARP spoofing can be connected to critical attacks, including a man-in-the-middle (MITM) attack, detecting ARP spoofing initially without returning false-positive alarms is important. In general, however, existing works for ARP spoofing are unable to distinguish between ARP spoofing and connections from virtual machine (VM) guests, which results in false-positive alarms. In this article, we propose an access point-based ARP Spoofing Detector (ASD) that can detect ARP spoofing attacks without returning a false-positive rate. Our proposed system distinguishes between ARP spoofing and connections from VM guests using three information tables, AssocList, ARP cache table, and DHCP table, which are commonly managed by the access point based on a Linux system. We evaluated the performance of ASD on ARP spoofing attack experiments.

CIDF-WSN: A Collaborative Interest and Data Forwarding Strategy for Named Data Wireless Sensor Networks.

Recent years have witnessed the huge popularity of Information-Centric Networking (ICN) and its realization as Named Data Networking (NDN) in the context of wireless sensor networks (WSNs). The participating nodes in WSNs are usually equipped with a single radio interface. The existing solutions lack in providing the efficient next forwarder selection in NDN-based single radio WSNs. In this work, we propose a collaborative Interest and Data Forwarding (CIDF-WSN) Strategy for Named Data Wireless Sensor Networks. CIDF-WSN develop a Neighbor Information Base (NFIB) which enables the node to select the optimal next-hop relay in Interest packet forwarding. An efficient Interest packet processing mechanism assisted by the Interest Cache Table (ICT) is provided to avoid Interest packets loss and frequent re-transmissions. In addition, CIDF-WSN also provides a robust Data packet transfer mechanism accompanied by the Temp Cache Table (TCT) to avoid Data packet losses and to ensure well-timed content delivery. Simulation results reveal that CIDF-WSN outperforms the recently published works in terms of Interest satisfaction rate, total energy consumption, Data retrieval delays, and communication overhead.

ARP Poisoning Detection and Prevention using Scapy

Address Resolution Protocol is a protocol associated with mapping a given IP address with the associated MAC address. ARP Poisoning or Spoofing attack is an attack which carried out over a Local Area Network. In an ARP Poisoning/Spoofing attack malicious ARP Packets are sent to a default gateway on LAN with intent to change the IP address-MAC address pairings in the ARP cache table. ARP Spoof attack tool has been developed with a script written in Python Programming language using scapy library. A detection algorithm has been proposed for detecting the above generated ARP Poisoning attack (or any ARP Poisoning attack in general) and implemented the same using a python script with scapy library. The detection algorithm is based on analyzing the real MAC Address and response MAC Address of the ARP Packet sniffed for any discrepancies. Lastly, a prevention mechanism is proposed and implemented for ARP Poisoning attacks by implementing static entries in ARP table.

String Matching untuk Mendeteksi Serangan Sniffing (ARP Spoofing) pada IDS Snort

Sniffing technique (ARP Spoofing) is an attack that sends fake ARP packets or ARP packets that have been modified according to the network address attacker's to poison the victim's ARP cache table. ARP spoofing attack is a dangerous attack because it can monitor the activities of victims in searching the browser and can steal social logins, office and other accounts. This attack supports the occurrence of other computer network attacks such as Denial of service, Man in the middle attack, host impersonating and others. Sniffing attacks are generally found in places that provide public Wi-Fi such as campus, libraries, cafes, and others. IDS Snort can detect sniffing attacks (Arp Spoofing). String Matching Method KMP algorithm is applied to detect attacks on snort logging files to provide alerts (messages) to users. Tests carried out are black box testing to test application functionality, and accuracy testing. All application functionality was successful, and testing the accuracy of the match between manual calculations for string matching and accurate application.

PipeCache: High Hit Rate Rule-Caching Scheme Based on Multi-Stage Cache Tables

OpenFlow switches hardware cannot store all the OpenFlow rules due to a limited resource. The rule-caching scheme is one of the best solutions to solve the hardware size limitation. In OpenFlow switches, Multiple Flow Tables (MFTs) provide more flexible flow control than a single table. Exact match and wildcard match are two typical matching methods. The exact match applies to a single flow table and multiple flow tables, but the performance is low under frequently changing traffic. Many commodity switches use Ternary Content Addressable Memory (TCAM) to support fast wildcard lookups. Earlier works on wildcard-match rule-caching focus on the dependency problem caused by the overlaps of match fields. Their designs cannot handle the rule-caching problem of MFTs because they are based on a single flow table, instead of the widely used MFTs structure. So, we propose a new design named PipeCache that solves the problem of MFTs rule-caching scheme based on wildcard-match. In our design, we logically split the TCAM resources, and assign them to each flow table according to the size of each flow table. Each flow table will cache the selected rules into their assigned TCAM resources and be updated in time by our algorithms to make the most use of the limited TCAM resources. We compare our structure with the exact-match scheme and the wildcard-match scheme based on a single flow table under different cache sizes and traffic localities. Experiment results show that our design PipeCache improves cache hit rate by up to 18.2% compared to the exact-match scheme and by up to 21.2% compared to the wildcard-match scheme based on a single flow table.

HMB in DRAM-less NVMe SSDs: Their usage and effects on performance.

Solid-state drives (SSDs) that do not have internal dynamic random-access memory (DRAM) are being widely spread for client SSD and embedded SSD markets in recent years because they are cheap and consume less power. Obviously, their performance is lower than conventional SSDs because they cannot exploit advantages of DRAM in the controller. However, this problem can be alleviated by using host memory buffer (HMB) feature of Non-Volatile Memory Express (NVMe), which allows SSDs to utilize the DRAM of host. In this paper, we show that commercial DRAM-less SSDs clearly exhibit worse I/O performance than SSDs with internal DRAM, but this can be improved by using the HMB feature. We also present methods that reveal how the host memory buffer is used in commercial DRAM-less SSDs to improve I/O performance. Through extensive experiments, we conclude that DRAM-less SSDs evaluated in this study mainly exploit the host memory buffer as an address mapping table cache rather than a read cache or write buffer to improve I/O performance.

Optimizing Resource Discovery Technique in the P2P Grid Systems

Distributed discovery service is a main concept in the scalable and dynamic grid environments. In this paper, based on the super-peer technique, we propose a new topology for the grid discovery service. The model is designed in such a way that each super-peer within the cluster has the routing indices (RIs) based on cobweb and uses the hop-count routing index (HRI) to select the best neighbor. Besides, each super-peer includes a cache table, which stores the query and the query results. Furthermore, from the point of view of the response time and the number of submitted messages, we compare the new model with an existing method. An illustrative simulation is also presented to show the efficiency and validation of the new technique.

$Q$ -Value Prediction for Reinforcement Learning Assisted Garbage Collection to Reduce Long Tail Latency in SSD

Garbage collection (GC), an essential operation for flash storage systems, causes long tail latency which is one of the key problems in real-time and quality-critical systems. In this article, we take advantage of reinforcement learning (RL) to reduce long tail latency. Especially, we propose two novel techniques which are: 1) $Q$ -table cache (QTC) and 2) $Q$ -value prediction. The QTC allows us to utilize appropriate and frequently recurring key states at a small memory cost. We propose a neural network called $Q$ -value prediction network (QP Net) that predicts the initial $Q$ -value of a new state in the QTC. The integrated solution of QTC and QP Net enables us to benefit from both short-term (by QTC) and long-term (by QP Net) history of system behavior to reduce the long tail latency. The experimental results demonstrate that the proposed scheme offers significant (by 25%–37%) reductions in the long tail latency of storage-intensive workloads compared with the state-of-the-art solution that adopts an RL-assisted GC scheduler.

SM ARP Stochastic Markovian Game Model for Packet Forwarding Based ARP Spoofing Attacks Detection

Address Resolution Protocol (ARP) spoofing attacks have become the most pivotal attacks in deteriorating the performance of computer networks. The objective of this paper is to develop SM-ARP, Stochastic Markovian game model based ARP spoofing attack detection scheme.Although many recent techniques have been developed to detect and protect against ARP spoofing attacks, the practical challenges has led to ineffective utilization. The major challenge is that the attackers employing ARP spoofing tend to alter the attack strategy at each point and increases the difficulty in detection and security implementations. The packet forwarding relaying is one suchattack strategy which is harder to detect using traditionally proven methodologies. This paper tackles the packet forwarding relay strategy based ARP spoofing attack strategy by using the proposed SM-ARPto eliminate the attack in a practically feasible manner. The proposed model utilizes a stationary Markov model for optimizing the packet forwarding behaviour of the networks. When an ARP spoofing attack is initiated, the SM-ARP model tracks the changes in the packet forwarding patterns through cache table and detects the misbehaviours. As a security measure, these misbehaved nodes are entitled to recovery and repair process to restore the network to stabilized state. Experiments are conducted to evaluate the performance of SM-ARP in an application for student marks management system. The results prove that the proposed SM-ARP model improves the detection of ARP spoofing attacks with accuracy of 88.2% and also reduces the complexity and errors.

Algorithmic cache of sorted tables for feature selection

Feature selection is a mechanism used in Machine Learning to reduce the complexity and improve the speed of the learning process by using a subset of features from the data set. There are several measures which are used to assign a score to a subset of features and, therefore, are able to compare them and decide which one is the best. The bottle neck of consistence measures is having the information of the different examples available to check their class by groups. To handle it, this paper proposes the concept of an algorithmic cache, which stores sorted tables to speed up the access to example information. The work carries out an empirical study using 34 real-world data sets and four representative search strategies combined with different table caching strategies and three sorting methods. The experiments calculate four different consistency and one information measures, showing that the proposed sorted tables cache reduces computation time and it is competitive with hash table structures.

Enhancing Replacement Policy of Content-Centric Networking to Support Reaction toward Natural Disaster

Replacement policy in Content-Centric Networking (CCN) is a necessary and current, function as an important part in Interest packet caching. Pending Interest Table (PIT) is the main and core cache tables in CCN and plays a significant role for recording the information of Interest packets that are forwarded but are still waiting for matching with incoming Data packets. However, PIT management is more fundamental with regard to CCN operations for better memory efficiency. The PIT size determination of the forwarding system is a difficult problem in PIT management. Due to the limited PIT sizing, PIT replacement is utilized to remove the current entry from PIT and constructing a new space for the incoming entry to it. In a disaster area, this problem is due to the massive Interest packet that generating by survivors from the disaster and rescuers. The PIT overflow could be subjected due to use of long Interest lifetimes that would simultaneously increase the number of entries in the PIT. Thus particularly when there is no flexible replacement policy, hence affecting PIT performance. Therefore, the ultimate aim of this paper is to develop the replacement policy that can deal with this problem. The proposed policy is a PIT management based on CCN PIT replacement policy for managing the PIT during a natural disaster, which can lead to mitigating PIT overflowing. The results showed the overall scenarios, the proposed policy better PIT memory usage as well as decreasing the Interest drop, delay time, Interest lifetime and Interest retransmission. A positive significance influence in this work would be to presents a formulate a rule as a function which can decrease the delay and thus be leading to increasing PIT utilization, which will be very much useful for survivors, emergency rescue teams as well as emergency operation centers.

Flow Caching in Protocol Oblivious Forwarding Switches

Protocol Oblivious Forwarding (POF) supports the arbitrary protocol processing, enhancing the programmability of Software Defined Networking (SDN). In order to improve the forwarding performance, a flow caching method is proposed. To parse the packet in advance, absolute positions of matching fields are obtained by identifying the dependency of matching and actions. To guarantee the acceleration effect of flow caching, flow tables are selected according to their matching types and number of entries. In addition, the single-flow table cache and multi-flow table cache are compared and an adaptive switching strategy is proposed based on the actual situation of network traffic. The POFSwitch is extended to implement the proposed method and it is validated under the real rules and backbone traces. The switch packet forwarding rate is increased by 220% after applying flow caching. Flow caching can provide higher forwarding performance for programmable data planes.

A 0.55 V 1.1 mW Artificial Intelligence Processor With On-Chip PVT Compensation for Autonomous Mobile Robots

Autonomous mobile robots are receiving a lot of attention for many applications, such as package delivery and smart surveillance, however, the battery capacity is limited to implement intelligent decision making in robots because of the heavy computational costs. In this paper, an ultra-low-power artificial intelligence processor (AIP) is proposed for real-time decision making of autonomous mobile robots. To achieve low power consumption while maintaining high performance, it adopts four key features: 1) an 8-thread tree search processor for real-time path planning; 2) a reinforcement learning accelerator for the avoidance of unexpected obstacles; 3) a 3-level transposition table cache for the reduction of duplicated computations; and 4) a PVT compensation circuit for the stable operation at near-threshold voltage. The proposed 16 mm $^{{{2}}}$ AIP is fabricated using 65-nm triple-well CMOS technology. It consumes only 1.1 mW at 0.55 V supply voltage and 7 MHz operating frequency, and 151 mW at 1.2 V supply voltage and 245 MHz operating frequency. The AIP achieves fast search speed (470 000 search/s) and low energy consumption (79 nJ/search), and it is successfully applied to a battery-powered robot system for autonomous navigation without any collision in dynamic indoor environments.

BRAIN: A Low-Power Deep Search Engine for Autonomous Robots

Autonomous robots are actively studied for many unmanned applications, however, the heavy computational costs and limited battery capacity make it difficult to implement intelligent decision making in robots. In this article, the authors propose a low-power deep search engine (code-named “BRAIN”) for real-time path planning of intelligent autonomous robots. To achieve low power consumption while maintaining high performance, BRAIN adopts a multithreaded core architecture with a transposition table cache to detect and avoid duplicated searches between the processors at the deeper level of the search tree. In addition, dynamic voltage and frequency scaling is adopted to minimize power consumption without any loss of performance because the workload is gradually decreasing while approaching the target position. BRAIN achieves fast search speed (470,000 searches per second) and low energy consumption (79 nJ per search), and it is successfully applied to the robots for autonomous navigation without any collision in dynamic environments.