Synthesis Of Semiconductor Nanowires Research Articles

Semi-transparent, flexible, and electrically conductive silicon mesh by capillarity-driven welding of vapor-liquid-solid-grown nanowires over large areas

Bottom-up synthesis of semiconductor nanowires (NWs) by the vapor-liquid-solid (VLS) mechanism has enabled diverse technological applications for these nanomaterials. Unlike metallic NWs, however, it has been challenging to form large-area interconnected NW networks. Here, we generate centimeter-scale meshes of mechanically and electrically interconnected Si NWs by sequentially growing, collapsing, and joining the NWs using a capillarity-driven welding mechanism. We fabricate meshes from VLS-grown NWs ranging in diameter from 20 to 100 nm and find that the meshes are three-dimensional with a thickness ranging from ~ 1 to ~ 10 microns depending on the NW diameter. Optical extinction measurements reveal that the networks are semi-transparent with a color that depends on the absorption and scattering characteristics of individual NWs. Moreover, active voltage contrast imaging of both centimeter- and micron-scale meshes reveals widespread electrical connectivity. Using a sacrificial layer, we demonstrate that the mesh can be liberated from the growth substrate, yielding a highly flexible and transparent film. Electrical transport measurements both on the growth substrate and on liberated, flexible films reveal electrical conduction across a centimeter scale with a sheet resistance of ~ 160–180 kΩ/square that does not change significantly upon bending. Given the ability to encode complex functionality in semiconductor NWs through the VLS process, we believe these meshes of networked NWs could find application as neuromorphic memory, electrode scaffolds, and bioelectronic interfaces.

Low-Temperature Growth of Axial Si/Ge Nanowire Heterostructures Enabled by Trisilane

Axial Si/Ge heterostructure nanowires, despite their promise in applications ranging from electronics to thermal transport, remain notoriously difficult to synthesize. Here, we grow axial Si/Ge heterostructures at low temperatures using a Au catalyst with a combination of trisilane and digermane. This approach yields, as determined with detailed electron microscopy characterization, arrays of epitaxial Si/Ge nanowires with excellent morphologies and purely axial composition profiles. Our data indicate that heterostructure formation can occur via the vapor–liquid–solid or vapor–solid–solid mechanism. These findings highlight the importance of precursor chemistry in semiconductor nanowire synthesis and open the door to Si/Ge nanowires with programmable quantum domains.

In the flow: a finely controlled approach to catalyzed nanowire growth

A breakthrough in semiconductor nanowire synthesis that allows fine control over axial heterostructuring was recently advanced by Hollingsworth and co-workers.1 The report also reveals fascinating mechanistic aspects of catalyzed nanowire growth. Catalyzed wire or whisker growth was discovered by Wagner and Ellis in 1964.2 They found that gold droplets on a silicon substrate catalyze silicon wire growth under chemical-vapor-deposition conditions. Gaseous precursors react at the gold-droplet surfaces, depositing silicon into solution within the gold droplets. The droplets become supersaturated, inducing precipitation of crystalline silicon upon the substrate. As precipitation occurs only at the droplet–silicon interfaces, the silicon crystallites acquire pseudo-cylindrical wire morphologies as they grow upward from the substrate. The gold-catalyst droplets rise elevator-like from the substrate, riding upon the tips of the growing wires. Wagner and Ellis2 named this method ‘vapor-liquid-solid’ or ‘VLS’ growth after the three participating phases: the vaporous precursors, liquid catalyst droplets and solid silicon wires.

Confinement-Guided Shaping of Semiconductor Nanowires and Nanoribbons: “Writing with Nanowires”

To fully exploit their full potential, new semiconductor nanowire building blocks with ab initio controlled shapes are desired. However, and despite the great synthetic advances achieved, the ability to control nanowire's geometry has been significantly limited. Here, we demonstrate a simple confinement-guided nanowire growth method that enables to predesign not only the chemical and physical attributes of the synthesized nanowires but also allows a perfect and unlimited control over their geometry. Our method allows the synthesis of semiconductor nanowires in a wide variety of two-dimensional shapes such as any kinked (different turning angles), sinusoidal, linear, and spiral shapes, so that practically any desired geometry can be defined. The shape-controlled nanowires can be grown on almost any substrate such as silicon wafer, quartz and glass slides, and even on plastic substrates (e.g., Kapton HN).

Direct Observation of Nanoscale Size Effects in Ge Semiconductor Nanowire Growth

Progress in the synthesis of semiconductor nanowires (NWs) has prompted intensive inquiry into understanding the science of their growth mechanisms and ultimately the technological applications they promise. We present new results for the size-dependent growth kinetics of Ge NWs and correlate the results with a direct experimental measurement of the Gibbs-Thomson effect, a measured increase in the Ge solute concentration in liquid Au-Ge droplets with decreasing diameter. This nanoscale-dependent effect emerges in vapor-liquid-solid Ge NW growth and leads to a decrease in the NW growth rate for smaller diameter NWs under a wide range of growth conditions with a cutoff in growth at sufficiently small sizes. These effects are described quantitatively by an analytical model based on the Gibbs-Thomson effect. A comprehensive treatment is provided and shown to be consistent with experiment for the effect of NW growth time, temperature, pressure, and doping on the supersaturation of Ge in Au, which determines the growth rate and critical cutoff diameter for NW growth. These results support the universal applicability of the Gibbs-Thomson effect to sub-100 nm diameter semiconductor NW growth.

The influences of technological conditions and Au cluster islands on morphology of Ga2O3 nanowires grown by VLS method on GaAs substrate

The synthesis of semiconductor nanowires is more and more interested to the applications for building blocks of the innovative nano-sized devices and circuits, but the research and fabrication of these nanowires are also holding a number of difficulties and challenges. Among many different kinds of semiconductor nanowires, Ga2O3 is increasingly grown for many promising applications in nano-device production, namely nanowire LED and Laser. So far there are many synthesizing methods of semiconductor nanowires, among them the vapor–liquid–solid (VLS) method is simple, cheap and popular. However, when we use the VLS method for nanowire growth, various technological problems exist. This paper aims at investigating some influences of the growth technological conditions and Au metal catalyst on the morphology of Ga2O3 nanowire grown by VLS on GaAs substrate. The main considering factors include the different growing temperatures and times, the effects of Au diffusion, Au droplets formation, Au cluster islands formation, and gas volume of the growing tube/ampoule at the 10−1 torr low air pressure. The obtained experimental results regarding the structural properties of nanowires under these effects investigated by scanning electron microscopy, field emission scanning electron microscopy, high angle annular dark field and bright field, scanning transmission electron microscopy, energy-dispersive X-ray techniques, and focus ion beam are presented and discussed.

Semiconductor Nanowires: From Self‐Organization to Patterned Growth

The synthesis of semiconductor nanowires has been studied intensively worldwide for a wide spectrum of materials. Such low-dimensional nanostructures are not only interesting for fundamental research due to their unique structural and physical properties relative to their bulk counterparts, but also offer fascinating potential for future technological applications. Deeper understanding and sufficient control of the growth of nanowires are central to the current research interest. This Review discusses the various growth processes, with a focus on the vapor-liquid-solid process, which offers an opportunity for the control of spatial positioning of nanowires. Strategies for position-controlled and nanopatterned growth of nanowire arrays are reviewed and demonstrated by selected examples as well as discussed in terms of larger-scale realization and future prospects. Issues on building up nanowire-based electronic and photonic devices are addressed at the end of the Review, accompanied by a brief survey of recent progress demonstrated so far on the laboratory level.

Synthesis of semiconductor nanowires by pulsed current electrodeposition of metal with subsequent sulfurization

AbstractSemiconductor nanowires of CdS and CuxS were embedded into porous anodic alumina (PAA) by sulfurization of the metal precursors. Pores of PAA were filled with Cd and Cu by ac electrochemical preparation while the PAA layers remained on the Al‐substrate. Deposited metal and semiconductor wires were characterized by scanning electron microscopy and X‐ray diffraction. Photovoltage spectroscopy was applied to demonstrate semiconductor behaviour of CdS nanowires manufactured by the proposed technique. (© 2005 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Solution-Based Straight and Branched CdSe Nanowires

Confined straight and branched CdSe nanowires (NWs) are synthesized using a solution-based approach which leverages advances in the synthesis of colloidal CdSe quantum dots (QDs) with incipient approaches for the seeded (solution) synthesis of semiconductor NWs. The resulting straight and branched NWs have typical diameters below 10 nm with accompanying lengths between 1 and 10 μm. In the case of branched NWs, tripod, v-shaped, and y-shaped morphologies are observed. Variations in this preparation lead to higher order structures with multiple arms. The branching transition is discussed, and a possible mechanism based upon geminate NW nucleation is proposed. Such solution-grown straight, branched, and higher-order NWs exhibit potentially interesting optical, electrical, and transport properties due to their narrow radii below the corresponding bulk exciton Bohr radius of CdSe. Furthermore, this transition from straight to branched morphologies opens up avenues for investigating not only size- but also shape-dependent optical/electrical properties of one-dimensional (1D) and quasi-1D materials.

Solution Phase Synthesis of Semiconductor Nanowires

ABSTRACTThe solution phase synthesis of narrow diameter CdSe and PbSe nanowires (NWs) is described. Crystalline NWs with lengths between 1–10 μm are obtained using a seeded solution approach, whereby NW growth is catalyzed by Au/Bi core/shell nanoparticles (NPs). A gold biphasic reduction step results in 1.5 (3) nm diameter Au NPs and is followed by the thermolysis of trialkylbismuthines to yield low melting, bimetallic particles with diameters less than 3 nm. These Au/Bi NPs are catalytically active towards the growth of similar diameter CdSe NWs (∼7 nm) that exhibit quantum confinement effects. By varying the ratio of Cd (or Pb) to Se, both straight and branched NWs can be obtained, with branched structures including v-shapes, tripods, and y-shapes in the case of CdSe and t-shapes in the case of PbSe. Structural characterization shows that both straight and branched CdSe NWs grow along either the <111> zinc blende (ZB) or <0001> wurtzite (W) directions. Conversely, PbSe has a rocksalt crystal structure, and both straight and branched NWs grow along <100> directions.

Growth of semiconductor nanowires on iron-patterned silicon substrates

Recent progress in the synthesis of semiconductor nanowires has made an opportunity of testing quantum confinement effects and developing nanodevices based on these materials. However, isolating and manipulating the free-standing tangled nanowires still remain as challenges. It is of interest to grow nanowires on a substrate in a controlled fashion, so that little or no post-growth manipulation is needed for the purpose of measurement or device uses. In this report, we demonstrate that semiconductor nanowires can be grown on iron-patterned silicon substrates using thermal evaporation method or gas transport reaction. In particular, we find that the nanowires are grown only within the patterned iron squares on the substrates. The selective growth of the nanowires on the substrates presents a possibility to position the nanowires by depositing iron into desired areas on substrates. In this way, it is possible to integrate the nanowires into some useful nanostructures or devices.