Synthesis Of Reversible Logic Circuits Research Articles

Reference Point-based Evolutionary Multi-objective Optimization for Reversible Logic Circuit Synthesis

Reference Point-based Evolutionary Multi-objective Optimization for Reversible Logic Circuit Synthesis

Synthesis of Reversible and Quantum Circuit Using ROCBDD and Mixed-Polarity Toffoli Gate

In the last decade, the synthesis of reversible logic circuits has become a trending topic because of its future necessity and importance. Many methods have been studied and proposed, for instance, transformation-based, search-based, cycle-based, ESOP-based and BDD-based methods. Each of them has its limitation related to time processing, ancilla and garbage line, quantum cost. This study develops an algorithm that could synthesize quantum circuits based on mixed-polarity Toffoli gate and a variant of binary decision diagram (BDD) called reduced-ordered-complemented edge-bdd (ROCBDD). It is an optimized method of BDD to reduce nodes in the representation of Boolean functions, which leads to adding more lines and quantum gates in the reversible circuit. First, the differences between synthesis using ROCBDD, the traditional BDD and others methods are introduced. Then, we define a new structure consisting of mixed-polarity Toffoli gates relied on nodes of ROCBDD. An efficient algorithm to match BDD representation to the reversible logic circuit is also mentioned. Finally, the experimental results show that our algorithm has better synthesizing costs than previous BDD-based methods.

게이트 패턴 기반 최적화 모형을 활용한 양자컴퓨팅 가역 논리 회로 합성

게이트 패턴 기반 최적화 모형을 활용한 양자컴퓨팅 가역 논리 회로 합성

Mobile Phone Usage Detection by ANN Trained with a Metaheuristic Algorithm †.

Artificial neural networks (ANN) are widely used to classify high non-linear systems by using a set of input/output data. Moreover, they are trained using several optimization methodologies and this paper presents a novel algorithm for training ANN through an earthquake optimization method. Usually, gradient optimization method is implemented for the training process, with perhaps the large number of iterations leading to slow convergence, and not always achieving the optimal solution. Since metaheuristic optimization methods deal with searching for weight values in a broad optimization space, the training computational effort is reduced and ensures an optimal solution. This work shows an efficient training process that is a suitable solution for detection of mobile phone usage while driving. The main advantage of training ANN using the Earthquake Algorithm (EA) lies in its versatility to search in a fine or aggressive way, which extends its field of application. Additionally, a basic example of a linear classification is illustrated using the proposal-training method, so the number of applications could be expanded to nano-sensors, such as reversible logic circuit synthesis in which a genetic algorithm had been implemented. The fine search is important for the studied logic gate emulation due to the small searching areas for the linear separation, also demonstrating the convergence capabilities of the algorithm. Experimental results validate the proposed method for smart mobile phone applications that also can be applied for optimization applications.

Application Research of Evolutionary Algorithm in Synthesis of Reversible Logic Circuits

In order to avoid the algorithm falling into premature convergence, a big mutation adaptive evolutionary algorithm for reversible logic circuit synthesis with tabu list is proposed. Big Mutation Variable Length Evolutionary Algorithm Reversible Logic Circuit (BM_VLEA_RLC) is based on Variable-Length Evolutionary Algorithm Reversible Logic Circuit (VLEA_RLC) algorithm that designs the corresponding fitness function, adaptive evolution probability, etc., and tests using benchmark functions. The experimental results show that the proposed algorithm can obtain several feasible solutions, and some solutions are better than the existing algorithms, which verifies the feasibility of the algorithm.

A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines

Recent works in the synthesis of reversible logic circuits have been motivated by ever increasing emphasis on low-power design alternatives, and recent developments in quantum computing. Although most of the synthesis approaches use multiple-control Toffoli (MCT) gates with positive control lines, a few recent works have also considered MCT gates with negative control lines resulting in better circuit realizations. Some of the works have also tried to carry out post-synthesis optimization of given MCT gate netlists with positive control lines, using template matching and similar netlist transformation techniques. However, only one work is reported that attempts to optimize netlists containing negative control MCT gates. This paper proposes an efficient optimization technique for MCT gate netlists with both positive and negative control lines, which is based on repeated applications of a small set of pairwise gate merging and replacement rules. Experiments carried out on reversible circuit benchmarks show that it is possible to achieve significant reductions in number of gates and quantum costs.

Reversible Logic Circuit Synthesis and Optimization Using Adaptive Genetic Algorithm

Abstract In the recent years reversible logic circuits have gained a remarkable interest in the light of advancements made in quantum computation. The promise of theoretically zero power consumption is a major driving force for researchers to develop circuits using this logic. Synthesis of reversible logic and generating reversible logic circuit automatically with lower cost always has been a challenging task as reducing the search space is one of the major issues in the synthesis process using permutation. In this work, we proposed an Adaptive Genetic Algorithm (AGA) for synthesizing reversible logic circuits. NCT (NOT, CNOT, Toffoli) gate based library has been considered for synthesis of reversible logic circuits (RLC). The proposed algorithm produces a cascade of Toffoli gates for a given reversible specification of a circuit. Comparison of experimental results for several benchmark circuits shows that proposed evolutionary algorithm enables optimal or near-optimal solutions with lesser Gate Counts.

Exact Synthesis of Reversible Circuits Using A* Algorithm

With the growing emphasis on low-power design methodologies, and the result that theoretical zero power dissipation is possible only if computations are information lossless, design and synthesis of reversible logic circuits have become very important in recent years. Reversible logic circuits are also important in the context of quantum computing, where the basic operations are reversible in nature. Several synthesis methodologies for reversible circuits have been reported. Some of these methods are termed as exact, where the motivation is to get the minimum-gate realization for a given reversible function. These methods are computationally very intensive, and are able to synthesize only very small functions. There are other methods based on function transformations or higher-level representation of functions like binary decision diagrams or exclusive-or sum-of-products, that are able to handle much larger circuits without any guarantee of optimality or near-optimality. Design of exact synthesis algorithms is interesting in this context, because they set some kind of benchmarks against which other methods can be compared. This paper proposes an exact synthesis approach based on an iterative deepening version of the A* algorithm using the multiple-control Toffoli gate library. Experimental results are presented with comparisons with other exact and some heuristic based synthesis approaches.