Symmetric Cascaded H-bridge Multilevel Inverter Research Articles

A Cascaded H-Bridge Multilevel Inverter with DC Cells Input Fault Tolerance Capability Based on PSC-PWM Control

Multilevel inverters have proven their efficiency in generating better AC voltage outputs. This functional quality is mainly due to the use of multi-source DC inputs. Despite the fact that this type of topology is generally reliable, switching faults caused by the complete loss of a switching component or DC input cell may still occur. Such incident may inflict heavy impacts to the conversion chain resulting in a permanent damage to the switching cells or the connected load. This article presents a dynamic switching control strategy capable of tolerating DC cells open-circuit input faults in basic symmetric Cascaded H-bridge multilevel inverter architectures. The proposed topology uses a control scheme to overcome the switching cells’ fault by adapting the configured level of conversion and bypassing the flawed unit with no additional switching components. Furthermore, the proposed control strategy is capable of reversing back the inverter configuration to its original functional state after the disappearance of the faut. This research article answers the need for a theorical study of a fault tolerant Cascaded H-Bridge multilevel inverter where the short circuit’s fault types are bypassed by Pulse width modulation alteration only.

A Comparative Study of 9-Level Inverter and 15-Level Multi Inverter for a Grid Connected System

Abstract: Recently, the emergence of single phase multilevel inverter has been increased due to its advantages over traditional one. Multilevel Inverters [MLI] are the ones which can give out a stepwise output waveform with the use of power electronic switches, power diodes and some DC voltage source which might be a series/parallel connected PV cells, a renewable source or a battery. Multilevel inverters not only produce low harmonic distortion but also decrease the dv/dt stresses on the equipment Multilevel inverters is a good option as the output voltage of a Multilevel inverter is a stepped waveform which approaches a sinusoid providing lesser harmonic distortion. As the number of levels are increased the harmonic distortion reduces but at the same time the number of switching devices and the DC voltage sources required increases, thus increasing the complexity of the system design and control. Multilevel inverter proposed in this paper uses only 7 switches to provide 9 levels and 15 levels of output voltage. A symmetrical Cascaded H bridge Multi level inverter (SCHBMLI) and Asymmetrical Cascaded H bridge Multilevel Inverter (ASCHBMLI) using PD-PWM technique have been analysed in this paper for grid connection. The Asymmetric Cascade H Bridge [ASCHMLI] implemented in real time system using PIC16F877A microcontroller with RL load. This type of proposed system is used for high power applications in photovoltaic and it’s reduce overall cost as well as size of the system.

High Reliable Medium Voltage Drive With Reduced Component Count of Converters

The rapid development of technology, particularly in the fields of medium-voltage drive applications, has led to the widespread and use of AC to DC multi-pulse and DC to AC multilevel converters. In recent years, multi-winding transformers (MWTs)-based multi-pulse converters have received significant attention, owing to the growing need to utilize the energy as per power quality standards with high reliability in medium voltage drive systems. The main issues of multi-pulse converters are the large complexity of winding connections, which directly degrades the reliability of the system and increases the requirement for conductor material. To address these issues of grid-end converters, this paper suggests a less complex structure of a multi-winding transformer (MWT) for a thirty-six pulse AC-DC converter, which demands the least conductor material for windings. Moreover, the reduction in the number of components of the multi-level inverters has a noticeable role in saving size, cost, and reliability improvement. To address these features in the drive system, a five-level hybrid symmetric cascaded H-bridge multilevel inverter (HSCHB-MLI) is presented, which performs a high-quality power conversion at the motor terminals of the drive system. Hence, the main concerns of this drive system are the reduction in the component count, weight, and losses of the system with excellent harmonics performance. The operational aspects of the topology such as circuit structure, design, and indirect field-oriented control (IFOC), and modulation technique (parabolic carrier wave-based level shifted pulse width modulation) are elaborated in detail. A detailed comparative assessment is performed with other multi-winding transformers and multi-level inverter structures to demonstrate the merits of the presented multi-winding transformer and multilevel inverter structures, respectively. Finlay, through Simulink modeling and hardware testing setup, the viability of the proposed architecture is verified.

THD Minimization and Reliability Analysis of Cascaded Multilevel Inverter

Inverters are DC to AC power converters that are widely used in AC motor drives and distributed energy generation systems. Multi-Level Inverters (MLIs) have emerged as the preferred inverter technology because of their advantages of reduced switching losses and better harmonic profile. This paper deals with the Minimization of Total Harmonic Distortion (MTHD) of Symmetric Cascaded H-bridge Multi-Level Inverter (SCMLI) and Asymmetric Cascaded H-bridge Multi-Level Inverter (ACMLI). A hybrid memetic algorithm composed of heuristic PSO (Particle Swarm Optimization) algorithm and traditional MAS (Mesh Adaptive direct Search) is proposed to optimize the switching angles. In Photo Voltaic (PV) system, the input DC voltage generally varies from its nominal value due to the change in temperature and irradiance. Thus, the sensitivity analysis of THD and harmonics is also carried out considering the variations with non-integer magnitudes of input DC sources. The experimental prototype of SCMLI and ACMLI topology is developed and validated with simulation results. The reliability and Mean Time to Failure (MTTF) of SCMLI and ACMLI are investigated based on power losses of the MOSFET and thermal parameters.

Symmetric Cascaded H-Bridge Multilevel Inverter With Enhanced Multi-Phase Fault Tolerant Capability

In this article, a new method is introduced for operation of three-phase symmetric cascaded H-bridge (CHB) multilevel inverter after failure of power switches. When a switch fails, the faulty leg of the H-bridge is bypassed and the remaining leg is kept in use. Even with multiple faults in different H-bridge cells, the CHB is optimally reconfigured to continue its operation with its maximum healthy capacity. Based on the remaining operational part of the converter, a fault tolerant control scheme with zero-sequence voltage injection is proposed to synthesize a balanced line-to-line voltage. Using this method, the postfault line-to-line voltage of CHB is maximized with the minimum common mode voltage (CMV). Reduction of CMV is of importance in motor drive application. Also, fundamental component of CMV affects the real power of CHB phase legs. Through reducing the fundamental CMV, unidirectional power transfer from the dc side to the ac load is achieved in a wide operation region. The performance of the presented fault tolerant technique is verified in MATLAB/Simulink environment and validated on a three-phase five-level hardware prototype.

Development and experimental validation of fault detection and diagnosis method in SPWM modulated symmetric cascaded H-bridge multilevel inverter

This paper discusses gate open-circuit fault detection and diagnosis method in SPWM modulated symmetric cascaded H-bridge multilevel inverter. First, an output voltage modelling under fault condition in cascaded H-bridge multilevel inverter is presented. Further, simulations of fault conditions have been carried out for the development of the fault detection and diagnosis method. Based on fault modelling and simulations, a fault detection and diagnosis method have been proposed based on the mean values of the bridge voltages as the diagnostic feature. Further, the proposed method has been validated experimentally on a 5-level symmetric sine pulse width modulated cascaded H-bridge multilevel inverter.

Development and experimental validation of fault detection and diagnosis method in SPWM modulated symmetric cascaded H-bridge multilevel inverter

This paper discusses gate open-circuit fault detection and diagnosis method in SPWM modulated symmetric cascaded H-bridge multilevel inverter. First, an output voltage modelling under fault condition in cascaded H-bridge multilevel inverter is presented. Further, simulations of fault conditions have been carried out for the development of the fault detection and diagnosis method. Based on fault modelling and simulations, a fault detection and diagnosis method have been proposed based on the mean values of the bridge voltages as the diagnostic feature. Further, the proposed method has been validated experimentally on a 5-level symmetric sine pulse width modulated cascaded H-bridge multilevel inverter.

Switch fault detection and diagnosis in space vector modulated cascaded H-bridge multilevel inverter

ABSTRACTThis article investigates the development and online implementation of the power switch open-circuit fault detection and diagnosis in symmetric cascaded H-bridge multilevel inverter. A mathematical modelling technique is presented to understand the effect of the fault on the bridge voltages and output voltage. The modelled values of the output voltage, simulation results and experimental results indicate that the fault diagnostic methods based on the output voltage as the diagnostic feature have certain ambiguity in identifying the fault switch, since the output voltage waveform and its features remain the same for a group of switches under the fault condition. In order to overcome this, fault detection and diagnosis method based on the mean values of the bridge voltages is proposed in this article, which identifies the faulty switch pair and H-bridge in which the fault has occurred. Further, this method has been experimentally validated on a five-level space vector modulated symmetric cascaded H-bridge multilevel inverter.

Design and Simulation of Single-Phase Five-Level Symmetrical Cascaded H-Bridge Multilevel Inverter with Reduces Number of Switches

Multilevel inverter is an effective and practical solution for increasing power demand and reducing harmonics of ac waveforms. Such inverters synthesize a desired output voltage from several levels of dc voltages as inputs. This paper analyzes the performance of five level cascaded H-bridge multilevel inverter with reduce number of power switches. Further by reducing switches and increasing level will reduce filter cost & harmonic content. 5- Level cascaded H-bridge asymmetrical multilevel inverter topology requires 8 switches but in this new multilevel inverter it requires 6 switches in which same multilevel is obtained. Invariably switching losses and cost also reduced. In this paper only multilevel inverter circuitry will be studied. The performance has been analyzed by the MATLAB/Simulink.

Enervate carrier LS-PWM for reducing harmonic distortions in SCHB-MLI

Summary Among the different modulation techniques, pulse width modulation is one of the major renowned modulation strategies, because the pulses are generated based on reference signal and the reference signal is sinusoidal. Many modifications are made in this strategy since the PWM era starts in the area of power electronics; the modifications are related with the reference or carrier. This paper also discusses about the analysis with performance parameters when the carrier is modified with the impact of hysteresis band structures. The modified carrier is abridged towards the zero line of actual carrier; this type of carrier supports the reduction of the switching losses at the edge of pulse train and also reduces the total harmonic distortions from the converter output signal. The lower switching losses and better harmonic profile elevate the inverter performance; in this paper, Symmetrical Cascaded H-Bridge Multilevel Inverter is analysed with the proposed enervate carrier associated to level shift pulse width modulation.

Charge Balancing Control for an Asymmetric Multilevel Inverter with Multiple Paired-H-Bridges

Cascaded H-Bridge (CHB) multilevel inverter (MLI) is among the most preferred topology in solar PV systems. While traditional asymmetric CHB MLI is easy to achieve higher number of output voltage levels compared to traditional symmetric CHB MLI, charge balancing between the voltage sources remains a challenge for asymmetric CHB MLI. This drawback results in unsteady DC voltage levels due to unbalanced power drawn from each voltage sources. Besides that, in battery powered applications, unbalanced power drawn results in unequal discharged in the batteries. In this paper, an asymmetric CHB MLI topology is proposed which is easier to modularize as for symmetric CHB MLI while maintaining the ease in charge balancing control. The performance of this proposed asymmetric CHB MLI with charge balance control has been evaluated using PSIM software.

Asymmetric Cascaded DC Sources Multilevel Inverter with Less Active Switches and Simpler Control Strategy

Cascaded H-Bridge (CHB) multilevel inverter (MLI) is among the most preferred topology in solar PV systems. While traditional asymmetric CHB MLI is easy to achieve higher number of output voltage levels compared to traditional symmetric CHB MLI, charge balancing between the voltage sources remains a challenge for asymmetric CHB MLI. This drawback results in unsteady DC voltage levels due to unbalanced power drawn from each voltage sources. Besides that, in battery powered applications, unbalanced power drawn results in unequal discharged among the batteries. In this paper, an asymmetric half H-bridge (HHB) MLI topology is presented which is easy to modularize as for symmetric CHB MLI while maintaining the ease in charge balancing control. The performance of this proposed asymmetric HHB MLI with charge balance control has been evaluated using PSIM software.

Three-Phase Asymmetric Multilevel Inverter Topologies with Better Charge Balancing

Cascaded H-bridge multilevel inverter is among the most preferred topology in solar systems. While traditional asymmetric cascaded H-bridge multilevel inverter is easy to achieve higher number of output voltage levels compared to traditional symmetric cascaded H-bridge multilevel inverter, charge balancing between the voltage sources remains a challenge for asymmetric cascaded H-bridge multilevel inverter. This drawback results in unsteady DC voltage levels due to unbalanced power drawn from each voltage sources. Besides that, in battery powered applications, unbalanced power drawn results in unequal discharged in the batteries. In this paper, two three-phase asymmetric cascaded H-bridge multilevel inverter topologies are proposed which offer easier in terms of modularity while maintaining the ease in charge balancing control. The performance of these two proposed topologies with charge balance control has been evaluated using PSIM software.

English

A novel level doubling network (LDN) based multilevel inverter (MLI) topology is proposed in this paper. The LDN takes only two switches, which is formed by half-bridge inverter to almost double the number of output voltage levels. The concept (of the proposed LDN) has the capability of self-balancing during positive and negative cycles without any closed-loop control/algorithm. The topology has uses a symmetric cascaded H-bridge MLI. The proposed self-balanced multilevel inverter has eliminates the harmonics level and reduces the number number of switches and losses; which has provide better results compares with conventional six bridge multilevel inverter. The simulation results are verified in MATLAB/SIMULINK model.

A New Multilevel Inverter Topology With Self-Balancing Level Doubling Network

A new multilevel inverter (MLI) topology is proposed using a level doubling network (LDN). The LDN takes the form of a half-bridge inverter to almost double the number of output voltage levels. The concept (of the proposed LDN) has the capability of self-balancing during positive and negative cycles without any closed-loop control/algorithm, and it does not consume or supply any power. The topology uses a symmetric cascaded H-bridge MLI but offers an equivalent performance of an asymmetric topology in terms of the number of levels. Also, it maintains the merit of uniform loading of the individual cell for a symmetric MLI. The topology is implemented by connecting only a three-arm H-bridge (only two switches per phase) with the entire three-phase inverter to double the number of levels. Thus, it significantly improves the power quality, reduces the switching frequency, and reduces the cost and size of the power filter. Operation of the circuit is verified by simulation result and experiments from a laboratory prototype.

Triphase Symmetrical Cascaded Multilevel Inverter (5L) for PV Systems Controlled by Various Multicarrier PWM Strategies

This paper presents a comparative study in the Matlab/Simulink environment among six multicarrier pulse width modulation strategies (MCPWM), of triphase symmetrical cascaded H-bridge multilevel inverter (five level). We will consider the Phase Disposition PWM, the Phase Opposition Disposition PWM, the Alternate Phase Opposition Disposition PWM, the Carrier Overlapping PWM, the Variable frequency PWM and the Phase Shifted Carrier PWM. Each type of these MCSPWM controls the same inverter. The symmetric voltage sources, supplying inverters cells are simulated using a DC voltage representing photovoltaic arrays (PV). Comparison of these MCPWMs is based on the spectral quality and magnitude of the output compound and simple voltages. The different strategies are carried out in Matlab/Simulink software environment with simulation results