Symmetric Architecture Research Articles

Filter Design for SOA-Assisted SS-WDM Systems Using Parallel Multicanonical Monte Carlo

We address design and optimization of optical filters for spectrum-sliced wavelength division multiplexed (SS-WDM) systems employing saturated semiconductor optical amplifiers (SOAs) to suppress intensity noise. We study the impact of the shape of both slicing and channel selecting optical filters vis-a-vis two important impairments: the filtering effect and the crosstalk. The quantification of bit error rate (BER) is made possible by a parallel implementation of the multicanonical Monte Carlo algorithm. The intensity noise suppression by the SOA and signal degradation by subsequent optical filtering are studied both numerically and experimentally. We find optical filter shape and bandwidth that minimizes BER. By varying channel spacing and width, we estimate the achievable spectral efficiency when using both noise-cleaning SOA and forward error correction. We show that when constrained to use a symmetric architecture, i.e., identical filters for both slicing and channel selecting filters, there is a degradation in achievable spectral efficiency. We show that noise suppression is robust to variations in relative channel powers in multichannel systems. Our numerical simulations, vetted experimentally, provide accurate and quantitative results on optimized system performance.

Symmetric architecture modeling with a single image

We present a method to recover a 3D texture-mapped architecture model from a single image. Both single image based modeling and architecture modeling are challenging problems. We handle these difficulties by employing constraints derived from shape symmetries, which are prevalent in architecture. We first present a novel algorithm to calibrate the camera from a single image by exploiting symmetry. Then a set of 3D points is recovered according to the calibration and the underlying symmetry. With these reconstructed points, the user interactively marks out components of the architecture structure, whose shapes and positions are automatically determined according to the 3D points. Lastly, we texture the 3D model according to the input image, and we enhance the texture quality at those foreshortened and occluded regions according to their symmetric counterparts. The modeling process requires only a few minutes interaction. Multiple examples are provided to demonstrate the presented method.

Polycationic Amphiphilic Cyclodextrins for Gene Delivery: Synthesis and Effect of Structural Modifications on Plasmid DNA Complex Stability, Cytotoxicity, and Gene Expression

A molecular-diversity-oriented approach for the preparation of well-defined polycationic amphiphilic cyclodextrins (paCDs) as gene-delivery systems is reported. The synthetic strategy takes advantage of the differential reactivity of primary versus secondary hydroxyl groups on the CD torus to regioselectively decorate each rim with cationic elements and lipophilic tails, respectively. Both the charge density and the hydrophobic-hydrophilic balance can be finely tuned in a highly symmetrical architecture that is reminiscent of both cationic lipids and cationic polymers, the two most prominent types of nonviral gene vectors. The monodisperse nature of paCDs and the modularity of the synthetic scheme are particularly well suited for structure-activity relationship studies. Gel electrophoresis revealed that paCDs self-assemble in the presence of plasmid DNA (pDNA) to provide homogeneous, stable nanoparticles (CDplexes) of 70-150 nm that fully protect pDNA from the environment. The transfection efficiency of the resulting CDplexes has been investigated in vitro on BNL-CL2 and COS-7 cell lines in the absence and presence of serum and found to be intimately dependent on architectural features. Facial amphiphilicity and the presence of a cluster of cationic and hydrogen-bonding centers for cooperative and reversible complexation of the polyanionic DNA chain is crucial to attain high transgene expression levels with very low toxicity profiles. Further enhancement of gene expression, eventually overcoming that of polyplexes from commercial polyethyleneimine (PEI) polymers (22 kDa), is achieved by building up space-oriented dendritic polycationic constructs.

Optical ultra-wide-band pulse bipolar and shape modulation based on a symmetric PM-IM conversion architecture

A simple and feasible technique for ultra-wide-band (UWB) pulse bipolar modulation (PBM) and pulse shape modulation (PSM) in the optical domain is proposed and demonstrated. The PBM and PSM are performed using a symmetric phase modulation to intensity modulation conversion architecture, including a couple of phase modulators and an optical bandpass filter (OBPF). Two optical carriers, which are separately phase modulated by two appropriate electrical pulse patterns, are at the long- and short-wavelength linear slopes of the OBPF spectrum, respectively. The high-speed PBM and PSM without limit of chip length, polarity, and shape are implemented in simulation and are also verified by experiment.

Architecture design of embedded operating system based on heterogeneous dual-core processor

The master-slave embedded operating system is widely used on heterogeneous multiprocessor. The architecture and communication protocol is heterogeneous, so it makes the realization and communication handling complicated. Through analyzing the structural characteristics of heterogeneous dual-core processor, a symmetric communication operating system architecture was proposed based on uniprocessor operating system, and resolves the problem how to make full use of the shared memory to communicate and to improve the efficiency of communication between processors in heterogeneous dual-core processor. This architecture operating system is used successfully on TI OMAP5910.

An Automated Measurement System for the Characterization of Electron Device Degradation Under Nonlinear Dynamic Regime

A fully automated measurement setup is described, which is aimed at investigating the time dispersion (or ldquowalkoutrdquo) of microwave electron-device characteristics. The proposed setup has the original capability of characterizing device degradation under a nonlinear dynamic operation. Such information is invaluable when the success of a project is inherently related to the end-of-life performance of each system component (e.g., military and space applications). Some previous works underline the importance of such information, but they are not oriented to device characterization and, moreover, are focused on a particular application (e.g., power amplifier design). The commonly adopted measurement techniques, which are essentially focused on high-field static operations, are extremely useful to perform accelerated stress, but they cannot be adopted to obtain exhaustive information about the time dispersion of device characteristics under realistic operative conditions. Through the proposed system, the stress procedure can be carried out under static (DC) and nonlinear dynamic (RF) operations to give the maximum flexibility in gathering useful information on the device degradation in different operating regimes. In particular, the device under test (DUT) is fed in rf-stressing conditions by applying a large-amplitude excitation signal at moderately high frequency at either the input (forward mode) or output (reverse mode) port of the device. The system features, in fact, a symmetrical dual-channel architecture. The DUT can be either a bipolar- or a field-effect transistor, and the walkout of its characteristics can be observed both at the end of the stress test and in real-time during the test execution. A special-purpose control software automates the measured data acquisition. Several experiments that were performed using the proposed setup are discussed in the paper.

DEVS/SOA: A Cross-Platform Framework for Net-centric Modeling and Simulation in DEVS Unified Process

Discrete Event Specification (DEVS) environments are implemented over middleware systems such as HLA, RMI, CORBA and others. DEVS exhibits concepts of systems theory and modeling and supports capturing the system behavior from the physical and behavioral perspectives. Further, they are implemented using object-oriented languages like Java and C++. This research work uses the Java platform to implement DEVS over a Service Oriented Architecture (SOA) framework. Called the DEVS/SOA, the framework supports a development and testing environment known as DEVS Unified Process that is built on a model continuity-based lifecycle methodology. DEVS Unified Process allows DEVS-based Modeling and Simulation (M&S) over net-centric platforms using DEVS/SOA. This framework also provides the crucial feature of run-time composability of coupled systems using SOA. We describe the architecture and designs of the server and the client. The client application communicates with multiple servers hosting DEVS simulation services. These simulation services are developed using the proposed symmetrical services architecture wherein the server can act as both a service provider and a service consumer contrary to the unidirectional client—server paradigm. We also discuss how this services-based architecture provides solutions for cross-platform distributed M&S. We demonstrate the DEVS/SOA framework with a scenario of Joint Close Air Support specified in Business Process Modeling Notation (BPMN). We also provide a real-world application of network health monitoring using DEVS/SOA-layered architectural framework.

Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension

This paper presents four novel area-efficient field-programmable gate-array (FPGA) bit-parallel architectures of finite impulse response (FIR) filters that smartly support the technique of symmetric signal extension while processing finite length signals at their boundaries. The key to this is a clever use of variable-depth shift registers which are efficiently implemented in Xilinx FPGAs in the form of shift register logic (SRL) components. Comparisons with the conventional architecture of FIR filter with symmetric boundary processing show considerable area saving especially with long-tap filters. For instance, our architecture implementation of the 8-tap low Daubechies-8 FIR filter achieves ~ 30% reduction in the area requirement (in terms of slices) compared to the conventional architecture while maintaining the same throughput. Two of the above-cited novel architectures are dedicated to the special case of symmetric FIR filters. The first architecture is highly area-efficient but requires a clock frequency doubler. While this reduces the overall processing speed (to a maximum of 2), it does maintain a high throughput. Moreover, this speed penalty is cancelled in bi-phase filters which are widely used in multirate architectures (e.g., wavelets). Our second symmetric FIR filter architecture saves less logic than the first architecture (e.g., 10% with the 9-tap low Biorthogonal 9&7 symmetric filter instead of 37% with the first architecture) but overcomes its speed penalty as it matches the throughput of the conventional architecture.

Synthesis of a cross-linked branched polymer network in the interior of a protein cage.

A goal of biomimetic chemistry is to use the hierarchical architecture inherent in biological systems to guide the synthesis of functional three-dimensional structures. Viruses and other highly symmetrical protein cage architectures provide defined scaffolds to initiate hierarchical structure assembly. Here we demonstrate that a cross-linked branched polymer can be initiated and synthesized within the interior cavity of a protein cage architecture. Creating this polymer network allows for the spatial control of pendant reactive sites and dramatically increases the stability of the cage architecture. This material was generated by the sequential coupling of multifunctional monomers using click chemistry to create a branched cross-linked polymer network. Analysis of polymer growth by mass spectrometry demonstrated that the polymer was initiated at the interior surface of the cage at genetically introduced cysteine reactive sites. The polymer grew as expected to generation 2.5 where it was limited by the size constraints of the cavity. The polymer network was fully cross-linked across protein subunits that make up the cage and extended the thermal stability for the cage to at least 120 degrees C. The introduced reactive centers were shown to be active and their number density increased with increasing generation. This synthetic approach provides a new avenue for creating defined polymer networks, spatially constrained by a biological template.

Modelling of a special class of spherical parallel manipulators with Euler parameters

SUMMARYA method of workspace modelling for spherical parallel manipulators (SPMs) of symmetrical architecture is developed by virtue of Euler parameters in the paper. The adoption of Euler parameters in the expression of spatial rotations of SPMs helps not only to eliminate the possible singularity in the rotation matrix, but also to formulate all equations in polynomials, which are more easily manipulated. Moreover, a homogeneous workspace can be obtained with Euler parameters for the SPMs, which facilitates the evaluation of dexterity. In this work, the problem of workspace modelling and analysis is formulated in terms of Euler parameters. An equation dealing with boundary surfaces is derived and branches of boundary surface are identified. Evaluation of dexterity is explored to quantitatively describe the capability of a manipulator to attain orientations. The singularity identification is also addressed. Examples are included to demonstrate the application of the proposed method.

Full-Rate Bang-Bang Phase/Frequency Detectors for Unilateral Continuous-Rate CDRs

Full-rate bang-bang phase detectors (BBPDs) and bang-bang frequency detectors (FDs) are presented for continuous-rate clock and data recovery (CDR) circuits. The proposed BBPDs have only six latches, so they save the power and area. Their symmetric architecture minimizes the clock skew caused by the nonsymmetric layout. The proposed unilateral FDs have a wide detectable frequency range. The theoretical analysis for the proposed FDs is given. Two continuous-rate CDR circuits using the proposed BBPDs and FDs have been fabricated in a 0.18-mum CMOS process. They recover the NRZ data of a 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">31</sup> -1 PRBS from 622 Mbps to 3.125 Gbps. All of the measured bit error rates are less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> .

A tunable high-performance architecture for enhancement of stream video captured under non-uniform lighting conditions

A novel architecture for performing hue-saturation-value (HSV) domain enhancement of digital color images captured under non-uniform lighting conditions is proposed in this paper for video streaming applications. The approach promotes log-domain computation to eliminate all multiplications, divisions and exponentiations utilizing the compact high-speed logarithmic estimation modules. An optimized quadrant symmetric architecture is incorporated into the design of homomorphic filter for the enhancement of intensity value. Efficient modules are also presented for conversion between RGB and HSV color spaces with tunable H and S components in HSV for more flexible color rendering. The design is able to bring out details hidden in shadow regions of the image and preserve the bright parts with adjustable vividness and color shift for improvement of visual quality while maintaining its consistency. It is capable of producing 187.86 million outputs per second (MOPs) on Xilinx’s Virtex II XC2V2000-4ff896 field programmable gate array (FPGA) at a clock frequency of 187.86 MHz. It can process over 179.1 (1024 × 1024) frames per second, which is very suitable for high definition videos, and consumes approximately 70.7% and 76.8% less hardware resource with 127% and 280% performance boost when compared to the designs with machine learning algorithm in [M.Z. Zhang, M.J. Seow, V.K. Asari, A high performance architecture for color image enhancement using a machine learning approach, International Journal of Computational Intelligence Research – Special Issue on Advances in Neural Networks 2(1) (2006) 40–47], and with separated dynamic and contrast enhancements in [H.T. Ngo, M.Z. Zhang, L. Tao, V.K. Asari, Design of a high performance architecture for real-time enhancement of video stream captured in extremely low lighting environment, International Journal of Embedded Systems: Special Issue on Media and Stream Processing, in press], respectively. This approach also provide 83.4 times performance gain with more consistent fidelity in the results compared to some DSP based implementations (256 × 256 frame size) [G.D. Hines, Z. Rahman, D.J. Jobson, G.A. Woodell, DSP implementation of the retinex image enhancement algorithm, visual information processing XIII, in: Proceedings of the SPIE, vol. 5438, 2004, pp. 13–24; G.D. Hines, Z. Rahman, D.J. Jobson, G.A. Woodell, Single-scale retinex using digital signal processors, in: Proceedings of the Global Signal Processing Conference, September 2004, pp. 1–6] under the reflectance-illuminance category of image enhancement models.

Emerging Research Architectures

Morphic architectures embrace a broad class of mixed-signal systems that focus on a particular application and draw inspiration for their structure from the application. In some cases, processing is carried out in the analog domain, offering orders-of-magnitude improvement in performance and power dissipation, albeit with reduced accuracy. The emergence of many-core (symmetric and asymmetric) architectures has become an established industry trend. With high-end microprocessor architecture moving to a multicore format, dual-core products have become available commercially and quad-core chips are entering the marketplace. Indeed, a recently announced 80-core experimental chip heralds a new milestone. Several other companies now produce multicore-like devices that some call next-generation field-programmable gate arrays (FPGAs). Specifically, these companies are implementing field- programmable object array (FPOA) technology, which consists of object arrays that are simple processors and other support objects such as memory.

A multiprocessor system-on-chip for real-time biomedical monitoring and analysis

In this article we focus on multiprocessor system-on-chip (MPSoC) architectures for human heart electrocardiogram (ECG) real time analysis as a hardware/software (HW/SW) platform offering an advance relative to state-of-the-art solutions. This is a relevant biomedical application with good potential market, since heart diseases are responsible for the largest number of yearly deaths. Hence, it is a good target for an application-specific system-on-chip (SoC) and HW/SW codesign. We investigate a symmetric multiprocessor architecture based on STMicroelectronics VLIW DSPs that process in real time 12-lead ECG signals. This architecture improves upon state-of-the-art SoC designs for ECG analysis in its ability to analyze the full 12 leads in real time, even with high sampling frequencies, and its ability to detect heart malfunction for the whole ECG signal interval. We explore the design space by considering a number of hardware and software architectural options. Comparing our design with present-day solutions from an SoC and application point-of-view shows that our platform can be used in real time and without failures.

Performances comparison between multilevel hierarchical and mesh FPGA interconnects

This paper evaluates a new multilevel hierarchical FPGA (MFPGA). The specific architecture includes two unidirectional programmable networks: a downward network based on the Butterfly-Fat-Tree topology; and a special upward network. New tools are developed to place and route several benchmark circuits on this architecture. Comparison with the traditional symmetric Manhattan mesh architecture shows that MFPGA can implement circuits with a smaller area and better speed.

A 12-GHz Fully Integrated Cascode CMOS $LC$ VCO With $Q$-Enhancement Circuit

A fully integrated complementary metal oxide semiconductor (CMOS) cascode LC voltage controlled oscillator (VCO) with Q-enhancement technique has been designed for high frequency and low phase noise. The symmetrical cascode architecture is implemented with negative conductance circuit for improving phase noise performance in 0.18 mum CMOS technology. The measured phase noise is -110.8 dBc/Hz at the offset frequency of 1 MHz. The tuning range of 630 MHz is achieved with the control voltage from 0.6 to 1.4 V. The VCO draws 4.5 mA in a differential core circuit from 1.8 V supply.

Strong coupling in macrocyclic thiophene investigated by time-resolved two-photon excited fluorescence

We report the femtosecond dynamics of fluorescence anisotropy excited through the two-photon absorption (TPA), which provides direct signatures of delocalized electronic excitations for symmetrical macromolecular architectures. Two-photon excited fluorescence anisotropy is strongly correlated with the orientation and value of the transition moment from the excited state to the second and higher lying states. For macromolecular systems it leads to a relatively low initial fluorescence anisotropy and specific femtosecond anisotropy dynamics. We have experimentally demonstrated qualitatively different anisotropy dynamics for two- and one-photon absorption excitations for strongly coupled ring architecture prospective for artificial-light-harvesting applications and possessing an enhanced TPA-absorption cross section.

Multi-frequency EIT system with radially symmetric architecture: KHU Mark1

We describe the development of a multi-frequency electrical impedance tomography (EIT) system (KHU Mark1) with a single balanced current source and multiple voltmeters. It was primarily designed for imaging brain function with a flexible strategy for addressing electrodes and a frequency range from 10 Hz–500 kHz. The maximal number of voltmeters is 64, and all of them can simultaneously acquire and demodulate voltage signals. Each voltmeter measures a differential voltage between a pair of electrodes. All voltmeters are configured in a radially symmetric architecture in order to optimize the routing of wires and minimize cross-talk. We adopted several techniques from existing EIT systems including digital waveform generation, a Howland current generator with a generalized impedance converter (GIC), digital phase-sensitive demodulation and tri-axial cables. New features of the KHU Mark1 system include multiple GIC circuits to maximize the output impedance of the current source at multiple frequencies. The voltmeter employs contact impedance measurements, data overflow detection, spike noise rejection, automatic gain control and programmable data averaging. The KHU Mark1 system measures both in-phase and quadrature components of trans-impedances. By using a script file describing an operating mode, the system setup can be easily changed. The performance of the developed multi-frequency EIT system was evaluated in terms of a common-mode rejection ratio, signal-to-noise ratio, linearity error and reciprocity error. Time-difference and frequency-difference images of a saline phantom with a banana object are presented showing a frequency-dependent complex conductivity of the banana. Future design of a more innovative system is suggested including miniaturization and wireless techniques.

Analysis of simplified position and 5-DOF total orientation workspaces of a hexapod mechanism

Abstract The exact positional and total orientation workspaces of a hexapod parallel mechanism are three-dimensional volumes that are too complicated for an operator to make use of, but a knowledge of them is indispensable in order to avoid collisions with the environment and to locate the workpiece. Fortunately, the positional and total orientation workspaces of a symmetric simplified architecture (the SSM type) can be bounded from inside and outside by ellipsoids symmetric about the z -axis. Accordingly, this paper presents closed-form solutions for the radii of the inscribed and circumscribed circles of the positional workspace and approximate solutions for the total orientation workspace at any given height. These solutions can be plotted on a two-dimensional graph that is convenient for an operator on the shop floor. Furthermore, these solutions can be developed into a simple procedure for the design of a prescribed workspace.

Solving ambiguities in contig assembly ofIdiomarina loihiensisL2TR chromosome byin silicoanalyses

Nucleotide composition analyses of bacterial genomes such as cumulative GC skew highlight the atypical, strongly asymmetric architecture of the recently published chromosome of Idiomarina loihiensis L2TR, suggesting that an inversion of a 600-kb chromosomal segment occurred. The presence of 3.4-kb inverted repeated sequences at the borders of the putative rearrangement supports this hypothesis. Reverting in silico this segment restores (1) a symmetric chromosome architecture; (2) the co-orientation of transcription of all rRNA operons with DNA replication; and (3) a better conservation of gene order between this chromosome and other gamma-proteobacterial ones. Finally, long-range PCRs encompassing the ends of the 600-kb segment reveal the existence of the reverted configuration but not of the published one. This demonstrates how cumulative nucleotide-skew analyses can validate genome assemblies.