Switching Legs Research Articles

Investigation of Dead Time Losses in Inverter Switching Leg Operation: GaN FET vs. MOSFET Comparison

This paper investigates the commutation transients of MOSFET and GaN FET devices in motor drive applications during hard-switching and soft-switching commutations at dead time operation. This study compares the switching behaviors of MOSFETs and GaN FETs, focusing on their performance during dead time in inverter legs for voltage source inverters. Experimental tests at various phase current levels reveal distinct switching characteristics and energy dissipation patterns. A validated simulation model estimates the experimental energy exchanged and dissipated during switching transients. The results demonstrate that GaN FETs exhibit lower overall losses at shorter dead times compared to MOSFETs, despite higher reverse conduction voltage drops. The study provides a quantitative framework for selecting optimal dead times to minimize energy losses, enhancing the efficiency of GaN FET-based inverters in low-voltage motor drive applications. Finally, a dead time optimization strategy is proposed and described.

Lower-Height-Oriented Magnetic Integration Design for Onboard Power Converter of Electric Vehicles

With the development of electric vehicles (EVs), EV onboard power converters are expected to pursue higher power density and lower height. Compared with active power devices, passive magnetics seems to be the main restriction for higher efficiency and power density. In the power distribution system, two-stage configurations of Buck+LLC converter is widely employed in various electronic equipment, which requires multiple magnetics. On this basis, the integration of two Buck+LLC converters has been studied to reduce the overall cost and improve the power density. Firstly, the two buck converters are interleaved and operate in critical mode (CRM) to reduce current ripple and realize soft switching. Hence, the two buck inductors can be negative-coupled with each other and integrated into one magnetic core to achieve lower switching frequency and smaller volume. In addition, the two LLC dc transformers are also integrated with only one switching leg and one magnetic core. By extending the effective area and canceling the high-frequency magnetic flux, the loss and volume of both the integrated buck inductors and integrated LLC transformers are reduced significantly. Detailed integration methods and parameter design processes are presented. A 700 W, 150-350 V-to-12 V dual-output dc-dc converter with 500 W/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> power density is demonstrated to verify the effectiveness and feasibility of the proposed methods.

A Semi-Implicit Parallel Leapfrog Solver With Half-Step Sampling Technique for FPGA-Based Real-Time HIL Simulation of Power Converters

Field Programmable Gate Array (FPGA) based Hardware-in-the-loop (HIL) simulation is an effective tool to verify the performance of physical controllers and shorten the development cycle of power converters. In HIL simulations, sampling accuracy is of concern and is desired to be improved by reducing the step size. However, due to the cost of computational time, the step size is hard to reduce indefinitely to meet the requirements for high switching frequency applications. To improve the sampling accuracy and simulation performance of HIL simulation, this paper proposes a semi-implicit parallel leapfrog (SPL) solver with half-step sampling technique. In this solver, the switches and the rest part of the system are implemented to be computed parallel when the switch leg model operates in continuous current mode. Besides, the solver is formulated in leapfrog format to reduce computational costs and to compute at half-step as a minimum step-size. With this format, the half-step sampling technique can be employed to increase the sampling rate by onefold, even in cases where it is challenging to reduce the simulation step size further. A dual active bridge converter case is implemented on the FPGA board with a 12.5-ns sampling step-size, retaining the simulation accuracy while switched at 400 kHz. To further verify the advantages, the results are compared with other HIL method and experimental results.

EMI Reduction at the Source in WBG Inverters: A Comparative Study of Spread-Spectrum Modulation and Auxiliary Switching Leg Techniques

EMI Reduction at the Source in WBG Inverters: A Comparative Study of Spread-Spectrum Modulation and Auxiliary Switching Leg Techniques

Improved Model Predictive Control for Multimotor System Using Reduced-Switch-Count VSI With Current Minimization

A multi-motor system supplied from the reduced-switch-count voltage source inverter (VSI) is considered in this paper. Firstly, an improved multiple vectors model predictive control (MV-MPC) scheme is proposed for driving <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> three-phase permanent magnet synchronous motors (PMSMs) by (2 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> +1)-leg VSI. To realize independent control of multi-motor, a control period is partitioned into multi-interval, one per motor. In the proposed MV-MPC scheme, the quasi-optimal voltage vectors (VVs) are selected to replace zero VVs under the restriction of identical common leg switching states. Thus, a whole control period can be fully utilized to generate multiple active VVs for a motor. Moreover, the overcurrent in the common leg is discussed and addressed. Take the five-leg VSI as an example, the expression of overcurrent in the common leg is first derived. Next, a general overcurrent elimination method based on current phase regulation is designed for the multi-motor system operating at an identical speed. Finally, the proposed MV-MPC scheme combined with the overcurrent elimination strategy is experimentally carried out. The test results indicate that the MV-MPC method can effectively reduce current ripple and achieve a faster dynamic response. The overcurrent elimination method can minimize the overcurrent regardless of the load conditions of the motors.

Characterization of the Dynamic RON of 600 V GaN Switches under Operating Conditions

High-voltage GaN switches can offer tremendous advantages over silicon counterparts for the development of high-efficiency switching-mode power converters at high commutation frequency. Nonetheless, GaN devices are prone to charge-trapping effects that can be particularly relevant in the early-stage development of new technologies. Charge-trapping mechanisms are responsible for the degradation of the dynamic ON-resistance (RON) with respect to its static value: this degradation is typically dependent on the blocking voltage, the commutation frequency and temperature, and is responsible for the reduction of power converter efficiency. The characterization of this phenomenon is very valuable for the development of a new process to compare different technological solutions or for the final assessment of performance. This characterization cannot be made with traditional static or small signal measurements since RON degradation is triggered by application-like dynamic device excitations. In this paper, we propose a technique for the characterization of the dynamic RON of high-voltage GaN switches under real operating conditions: this technique is based on the design of a half bridge switching leg in which the DUT is operated under conditions that resemble its operation in a power converter. With this setup, the characterization of a 600 V GaN switch dynamic RON is performed as a function of variable blocking voltages and commutation frequency. Additionally, this technique allows the separation of thermal and trapping effects, enabling the characterization of the dynamic RON at different temperatures.

A hybrid full-bridge three-level DC-DC converter with crossing auxiliary capacitors

This paper presents a high-power medium-frequency hybrid full-bridge (FB) three-level (TL) DC-DC converter with crossing auxiliary capacitors. In this converter, two auxiliary capacitors are deployed between phases a and b, replacing the flying capacitor. The converter’s three-level leg switches are with low voltage stress, while the two-level leg switches are with high voltage stress. The topology and modulation method, as well as the switching characteristics of the hybrid FBTL DC-DC converter with crossing auxiliary capacitors are described. The feasibility and performance of the above-mentioned converter is validated by a laboratory prototype. Based on the mechanism analysis and experiments, the zero-voltage switching (ZVS) and zero-switching loss (ZSL) of power switches, self-balance of the clamped capacitors voltages, and the voltage self-balance of the switches in the three-level leg can be achieved.

Transformer Less Grid Connected PV System with Reduced THD

In this thesis, a single phase, one current phase of the inverter-based photovoltaic system for grid connection is proposed. The high power point is maintained by the Perturb &amp; Observe Method, which is as simple as performance testing. Connecting the PV system to the grid converter is mandatory. Eliminating the system for making system light and simplification of inductor values are mandatory. To improve energy quality, system efficiency and reduce inductor size are proposed a double standard filter. These also to eliminate the harmonics of the second and fourth order at the inverter dc side. A modified heart rate switch based on the current source carrier network is proposed to magnetic dc-link inductor by reducing one leg switching bridge behind all active switching cycles. In this sense we have used the PV setting for the given measurements. The output of the same PV components connected to the current source converter. CSI contains modified Insulated Gate Bipolar Transistor (IGBT). The whole system simulates under two categories. One imitates High Value Inductor (Ldc) and the second is Low Value of Inductor (Ldc) with Double Tuned Resonant Filter.

Low-Voltage GaN FETs in Motor Control Application; Issues and Advantages: A Review

The efficiency and power density improvement of power switching converters play a crucial role in energy conversion. In the field of motor control, this requires an increase in the converter switching frequency together with a reduction in the switching legs’ dead time. This target turns out to be complex when using pure silicon switch technologies. Gallium Nitride (GaN) devices have appeared in the switching device arena in recent years and feature much more favorable static and dynamic characteristics compared to pure silicon devices. In the field of motion control, there is a growing use of GaN devices, especially in low voltage applications. This paper provides guidelines for designers on the optimal use of GaN FETs in motor control applications, identifying the advantages and discussing the main issues. In this work, primarily an experimental evaluation of GaN FETs in a low voltage electrical drive is carried out. The experimental investigation is obtained through two different experimental boards to highlight the switching legs’ behavior in several operative conditions and different implementations. In this evaluative approach, the main GaN FETs’ technological aspects and issues are recalled and consequently linked to motion control requirements. The device’s fast switching transients combined with reduced direct resistance contribute to decreased power losses. Thus, in GaN FETs, a high switching frequency with a strong decrease in dead time is achievable. The reduced dead time impact on power loss management and improvement of output waveforms quality is analyzed and discussed in this paper. Furthermore, input filter capacitor design matters correlated with increasing switching frequency are pointed out. Finally, the voltage transients slope effect (dv/dt) is considered and correlated with low voltage motor drives requirements.

An Effective Integration of APM and OBC With Simultaneous Operation and Entire ZVS Range for Electric Vehicle

This article proposes an effective integration of APM and OBC providing simultaneous operation without an extra circuit and entire ZVS range of all switches. The integrated circuit of the proposed charger is configured by combining high voltage-side switch legs of the LLC resonant converter of OBC and the PSFB converter of APM. In the simultaneous mode, by operating the common leg as a lagging leg of the phase-shift full bridge (PSFB) converter, the conduction losses of the common leg switches are decreased due to current cancellation effect, and the lagging leg switches of the PSFB converter achieve entire ZVS operation. Further, in the APM standalone mode, entire ZVS operation of the lagging leg switches is also secured by utilizing the magnetizing current of the LLC resonant converter. As a result, the proposed integrated charger achieves comprehensive improvement in terms of efficiency as well as volume and cost. A laboratory prototype combining a 3.7-kW LLC resonant converter with a 1-kW PSFB converter is built and tested in order to verify the performance and theoretical claims.

Fault‐tolerant strategies for open‐circuit switch failures in open‐end winding PMSM drives

Many safety-critical drive systems require post-fault operation after an open-circuit switch failure occurs in the inverter. The open-end winding inverter topology facilitates the injection of zero-sequence current such that a faulty switch leg can still be used to generate sufficient voltage states to continue operation. Therefore, only a minimal increase in the post-fault torque ripple is experienced. However, the injection of this zero-sequence current results in an increase in the copper loss which de-rates the maximum post-fault torque of the machine. Existing post-fault techniques that inject zero-sequence current, during an open-circuit switch fault, do not minimize the copper loss resulting in sub-optimal post-fault torque per ampere. A method for reducing copper loss by optimizing the zero-sequence current waveform to achieve the maximum post-fault torque per ampere is proposed here. The proposed strategy has been experimentally assessed for both three-phase and five-phase drive systems. The experimental results demonstrate the continuous post-fault operation of the drive system with a more balanced thermal load distribution between phases. A 2.8% and 5.6% improvement in post-fault torque per ampere for three-phase and five-phase systems are demonstrated.

IMPROVEMENT OF POWER QUALITY ISSUES USING UNIFIED POWER QUALITY CONDITIONER IN DISTRIBUTION SYSTEM

The research work is predominantly focused on to improve the power quality in distribution system using UPQC system connected with grid.Generally the UPQC has 12 switches for improving the power quality, reduce the sag and swell and decrease the harmonic distortion.The unified power quality conditioner has reduced switches and also decreases the harmonic using various controllers. The series and shunt converter connects the dc link capacitor for ripple reduction but in nine switch UPQC device has integrate the series and shunt converter without capacitor.The unified power quality conditioner has presented for reduce the coupling problem by the presence of switching leg. A particle swarm optimization (PSO)-based multi-objective planning algorithm for power compensation of radial distribution system with UPQC consists of a series and a shunt inverter. The UPQC model based on phase angle control was used. In distributed system needs to explain the approaches for standard supply voltage droop and voltage swell. ThePSO-ANNcontroller has most appropriate in dynamic response with a simple configuration and reduces harmonics.

Partially isolated four port converter with combined PWM and secondary phase shift control

A partially isolated four-port converter is proposed in this paper for interfacing two renewable sources and a storage device with an isolated load. This converter is capable of achieving high power density because of the effective sharing of devices among the input ports. Combined PWM and secondary phase shift control is employed to have a decoupled power flow management of input and output side ports. PWM control is used at the input side for maximum power tracking of renewable sources and battery power management. At the output side, secondary Phase shift control is used for controlling the output voltage. The adopted secondary phase shift control allows the primary switching legs to be operated with 1800 phase shift which results in reduced current ripple at input ports. The working principle of the converter, its output characteristics and control strategy are discussed. Working of the converter and its control strategy is verified through simulation for different input and output conditions. Further, to validate the simulation results, the experimental results of a 500W prototype are also provided.

Simple and Effective Adaptive Deadtime Strategies for LLC Resonant Converter: Analysis, Design, and Implementation

Deadtime is a critical design target for soft switching dc/dc converters. On the one hand, the deadtime is necessary to ensure the safety operation of the devices in one switching leg; on the other hand, enough deadtime is required to achieve zero voltage switching (ZVS) operation. Due to the complexity of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters, traditionally, the deadtime selection is either based on engineering experience or inaccurate analysis of the converter, which leads to an unoptimized deadtime. Specifically, a large deadtime will lead to efficiency degradation due to the body diode conduction during deadtime. The ZVS operation cannot be completely achieved with a small deadtime, which will also degrade the converter efficiency. Therefore, there is a demand for an accurate analysis of the deadtime effect on <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters. In this article, an accurate and in-depth analysis of the deadtime effect on the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converter is performed with the aid of the time-domain analysis (TDA). However, the proposed adaptive deadtime strategies can also be implemented based on the experiment or simulation results for those who do not have access to the TDA of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters. Based on the analysis, novel adaptive deadtime strategies are proposed for the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converter. Compared with the traditional fixed deadtime strategy, around 1% efficiency improvement is achieved for a 125-W experimental prototype during the whole operating range.

A new quasi‐Z‐source switched‐boost four‐switch three‐phase inverter with independent shoot‐through and non‐shoot‐through modulation indexes

Four-switch three-phase inverters (FSTPI) are the cost-optimised version of two-level voltage source inverters (TL-VSI), promoted for low-power/low-voltage machine drive systems. Adding impedance-based networks to the input of conventional VSIs provides both step-up and step-down features; however, the shoot-through (ST) modulation index limits the maximum attainable modulation index. Furthermore, in FSTPI, one switching leg has two series capacitors instead of power switches. Therefore, they are exposed to the voltage imbalance problem. This paper proposes a novel step-up FSTPI with independent shoot-through and non-shoot-through (NST) modulation indexes, improved boost factor, continuous input current, and high efficiency. This topology incorporates a quasi-z-source switched-boost network with independent power switches and three duty ratios that affords two active states and one shoot-through event. These features enhance the performance of this topology if compared with former FSTPI and quasi-z-source FSTPI. For evaluating the performance of this topology, simulation in MATLAB software and experiment on a prototype have been done. Simulation and experimentation results confirm the proposed topology.

Reliability Assessment of a Fault-Tolerant PV Multistring Inverter

In photovoltaic (PV) systems, the reliability of the system components, especially the power converters, is a major concern in obtaining cost effective solutions. In order to guarantee service continuity in the case of failure of elements of the PV converter, in particular, semiconductor switching devices, a solution is to design power converter with fault-tolerance capability. This can be realized by aggregating hardware redundancy on an existing converter, providing the possibility of replacement of faulty elements. This paper evaluates the reliability of a fault-tolerant power electronics converter for PV multistring application. The considered fault-tolerant design includes a single redundant switching leg, which is used in order to reconfigure the structure in case of a switch failure either on DC-AC or DC-DC stages. This paper details the reliability estimation of the considered PV multistring fault-tolerant converter. Furthermore, a comparison with a conventional structure without fault-tolerant capability is provided. The results show that the introduction of a single redundant leg allows for improving the converter mean time to failure by a factor of almost two and it reduces, by half, the power loss due to system-failure shutdowns in PV applications, while only increasing the converter cost by 2–3%.

Topology and Control of Four-Quadrant Dual-DC-Port Dual-Buck Inverters For Semi-Two-Stage DC–AC Power Conversion

A method to derive topologies of four-quadrant dual-dc-port dual-buck inverter (DDP-DBI) is proposed in this article. A new family of DDP-DBIs is obtained by replacing one of the switching legs in a four-quadrant dual-buck half-bridge switching cell with a dual-input buck type switching leg. With the proposed DDP-DBIs, both the low voltage dc source and the high voltage intermediate dc-bus can be used as the inputs of the inverter. Therefore, in comparison with the conventional two-stage dc-ac power system, a semi-two-stage dc-ac power conversion system with reduced power losses and enhanced conversion efficiency is achieved. A unipolar sinusoidal pulse width-modulation strategy is presented for the DDP-DBI. In each line cycle, all the power devices and filter inductors only operate within half line cycle, and only one active switch is operated at high frequency. Moreover, no freewheeling current flows through the body diodes of the active switches. As a result, the conversion efficiency of the overall dc-ac power conversion system is improved. Operation principles, characteristics, modulation and control strategies of one of the proposed DDP-DBI are analyzed in detail. Effectiveness and feasibility of the proposed DDP-DBI are verified with experimental results.

A new space vector pulse width modulated transformer less single-phase unified power quality conditioner

Emergence of solid-state switching devices, like thyristors, GTO's, IGBT's and etc, are widely used for controlling electric power in power electronic equipment for various purpose such as HVDC systems, computers etc. These devices draw disturbance in voltages and currents of both source side and distribution ends due to its non-linearity. This induce harmonics, reactive power, and excess neutral current cause the system to have less efficiency and reduction in power factor. In this paper transformer less single-phase unified power quality conditioner has been implemented to reduce the voltage and current distortions. The operation and control of single-phase transformer less three leg Unified power quality conditioner is investigated with the implementation of a new pulse width modulation method for solving the coupling problem introduced by common leg switches.

An Automated Semi–symbolic State Equation Generation Method for Simulation of Power Electronic Systems

Computer-aided analysis is playing an important role in the design and control of power electronic systems. A discrete-state event-driven (DSED) framework with state-space modeling has been proposed recently for accurate and efficient off-line simulation. Nevertheless, automated equation formulation for arbitrary circuits is also required to develop the DSED framework toward general simulation software. However, the traditional state equation generation method is very time-consuming, especially for large-scale systems due to the variable topologies brought by switching events. In this article, an automated semi-symbolic state equation generation method is proposed. Based on the switching function modeling of basic switching legs, an explicit function from switching states to state equation matrices is given, which reduces the computational cost without sacrificing any accuracy. The operating and topological characteristics of power electronics systems are utilized for further optimization. The proposed method greatly increases the simulation efficiency of power electronic systems, especially for large-scale systems. Two cases of the 2 MW 4-port solid-state transformers with different system scales are simulated with the proposed method under the DSED framework. About 700-fold and 1200-fold acceleration is achieved compared with one fast-speed commercial software, where the proposed method contributes 50-fold and 110-fold acceleration in the two cases, respectively.

Modular Equalization System Using Dual Phase-Shift-Controlled Capacitively Isolated Dual Active Bridge Converters to Equalize Cells and Modules in Series-Connected Lithium-Ion Batteries

Conventional lithium-ion battery (LIB) packs comprising series-connected modules need cell and module equalizers separately, resulting in increased system complexity. This article proposes a modular equalization system using dual phase-shift (DPS)-controlled capacitively isolated dual active bridge (CIDAB) converters. Each module contains an intramodule CIDAB converter that performs direct cell-to-cell equalization. Meanwhile, switching legs of adjacent modules' CIDAB converters are connected through an LC tank to configure an intermodule CIDAB converter that equalizes module voltages. The switching legs of CIDAB converters are utilized for both the intra- and intermodule equalizers, achieving the simplified system. Based on the proposed DPS control, the PS angles of both the intra- and intermodule CIDAB converters are manipulated to perform cell and module equalization. The prototype of the proposed modular equalization system for two LIB modules, each consisting of 12 cells was built and tested. Cells and module voltages in the proposed system were sufficiently equalized, demonstrating the efficacy of the proposed equalization system.