Suppression Of Current Collapse Research Articles

Current collapse suppression in AlGaInN/GaN HEMTs with thin unintentionally doped GaN channel and AlN back barrier grown on single-crystal AlN substrate

A high-electron-mobility transistor (HEMT) structure consisting of a 15-nm-thick quaternary AlGaInN top barrier layer, a thin 200-nm-thick unintentionally doped (UID) GaN channel layer, and an AlN back barrier was grown on a single-crystal AlN substrate by metal–organic chemical vapor deposition. The HEMTs fabricated on the grown heterostructure exhibited DC pinch-off characteristics with no large negative resistance owing to the high thermal conductivity of the AlN substrate. The 2-μm-gate-length devices showed the maximum current density of 500 mA/mm and the peak transconductance of 120 mS/mm with the threshold voltage of approximately −4 V. The off-state leakage was less than 30 μA/mm thanks to the thin UID-GaN channel with good crystal quality. The pulsed I–V characteristics for the fabricated HEMTs showed much smaller drain current decreasing compared to the same structured HEMTs with a C-doped GaN back barrier on a SiC substrate. This indicates that the UID-GaN channel grown on the AlN substrate had no harmful impurity levels that cause the current collapse phenomenon. The above-mentioned results demonstrate that the combination of the thin UID-GaN channel and the AlN back barrier works effectively in GaN HEMTs, and it will contribute to the device design and fabrication for future high-power/high-frequency applications.

Characterization and Reliability Analysis of Enhancement-Mode PEALD AlN/LPCVD SiNx GaN MISFET with In Situ H2/N2 Plasma Pretreatment

An effective in situ H2/N2 pretreatment technique for enhancement-mode GaN MISFET with a PEALD AlN/LPCVD SiNx Dual Gate Dielectric is presented. This technique features in situ H2 (15%)/N2 (85%) plasma pretreatment prior to AlN deposition. By using in situ H2 (15%)/N2 (85%) plasma pretreatment and a PEALD AlN protection layer, combined with an LPCVD SiNx gate dielectric, the quality of the AlN/GaN interface can be further improved due to the reduced interface trap densities between the AlN/GaN interface. The interface protection technique enables the successful integration of a high-quality PEALD AlN/LPCVD SiNx gate dielectric in an E-mode GaN MISFET with high performance, high stability, and high reliability. The fabricated enhancement-mode GaN MISFET exhibits a high gate swing and high channel effective mobility of 187.5 cm2/Vs, a threshold voltage of 2.9 V defined at 1 µA/mm, an on/off current ratio of 108, and a breakdown voltage of 1760 V defined at ID = 10 μm/mm. Our experiments showed a significant reduction in dynamic ON resistance and the suppression of current collapse when using the enhancement-mode GaN MISFET with PEALD AlN/LPCVD SiNx under high drain bias switching conditions, especially when the VDS is greater than the 60 V drain bias switch operating state.

Current collapse suppression in AlGaN/GaN HEMTs using dual-layer SiNx stressor passivation

In this work, a dramatic reduction in current collapse is achieved in GaN-based high-electron-mobility transistors (HEMTs) using dual-layer SiNx stressor passivation (DSSP), and the related mechanism is proposed. The SiNx compression neutralizes the inherent piezo polarization caused by the lattice mismatch at the heterojunction and effectively mitigates the peak electric field crowding at the drain-side gate edge, as supported by technology computer-aided design simulation. Thus, the inverse piezoelectric effect is suppressed and the trapped charge density is reduced under high electrical stress. As a result, the current collapse effect can be significantly restrained. Upon pulsing (Vg = −6 and Vds = 20 V), the device with DSSP exhibits a negligible current collapse (∼3%), which is significantly lower than the baseline device (∼34%). Moreover, it shows a one-order-of-magnitude reduction in gate leakage and a significant enhancement in gate stability. These results prove that the DSSP process is an attractive technique to facilitate high-reliability GaN-on-Si HEMTs.

Simulation of High Breakdown Voltage, Improved Current Collapse Suppression, and Enhanced Frequency Response AlGaN/GaN HEMT Using A Double Floating Field Plate

In this paper, DC, transient, and RF performances among AlGaN/GaN HEMTs with a no field plate structure (basic), a conventional gate field plate structure (GFP), and a double floating field plate structure (2FFP) were studied by utilizing SILVACO ATLAS 2D device technology computer-aided design (TCAD). The peak electric fields under the gate in drain-side can be alleviated effectively in 2FFP devices, compared with basic and GFP devices, which promotes the breakdown voltage (BV) and suppresses the current collapse phenomenon. As a result, the ON-resistance increase caused by the current collapse phenomena is dramatically suppressed in 2FFP ~19.9% compared with GFP ~49.8% when a 1 ms duration pre-stress was applied with Vds = 300 V in the OFF-state. Because of the discontinuous FP structure, more electric field peaks appear at the edge of the FFP stacks, which leads to a higher BV of ~454.4 V compared to the GFP ~394.3 V and the basic devices ~57.6 V. Moreover, the 2FFP structure performs lower a parasitic capacitance of Cgs = 1.03 pF and Cgd = 0.13 pF than those of the GFP structure (i.e., Cgs = 1.89 pF and Cgd = 0.18 pF). Lower parasitic capacitances lead to a much higher cut-off frequency (ft) of 46 GHz and a maximum oscillation frequency (fmax) of 130 GHz than those of the GFP structure (i.e., ft = 27 GHz and fmax = 93 GHz). These results illustrate the superiority of the 2FFP structure for RF GaN HEMT and open up enormous opportunities for integrated RF GaN devices.

Performance enhancement for AlGaN/GaN HEMTs with dual discrete field-plate

We propose optimized field plate structures to improve the performance of AlGaN / GaN HEMT under electrical stress. The two structures are T-gate AlGaN / GaN HEMT with dual discrete field plates (DDFP-HEMT) and single discrete field-plate (SDFP-HEMT). Benefiting from the modulation effects of the field plate on the electric field, the DDFP-HEMT and SDFP-HEMT exhibit better breakdown characteristics and current collapse suppression. The performance of the two structure devices and no-discrete-field-plate devices (NDFP- HEMT) is explored in Silvaco TCAD. The DDFP-HEMT and SDFP-HEMT achieve the highest off-state breakdown voltage (VBD) of 1188 V and 1120 V in the experiment, respectively, being 33 % and 25 % higher than that of NDFP-HEMT, respectively. In particular, the current collapse in DDFP-HEMT and SDFP- HEMT is reduced by 24 % and 9 % under 200 V stress bias, respectively, when compared to NDFP-HEMT. The DDFP-HEMT shows greatest reliability improvement in the three samples.

Effective Suppression of Current Collapse in AlGaN/GaN HEMT With N2O Plasma Treatment Followed by High Temperature Annealing in N2 Ambience

We propose a high temperature annealing process in N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ambience after N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma treatment for AlGaN/GaN HEMT. The annealing process effectively improves the plasma treated surface condition and decreases the current collapse from 41.7% to 10.6%. The N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma treatment is performed in a PECVD chamber and the followed high temperature annealing process is carried out at 800°C for 20min in rapid temperature annealing (RTA) system. Compared to the devices with only N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O plasma treatment, the devices with an extra high temperature annealing process perform lower surface state density (2.51E+12 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−2</sup> eV <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−1</sup> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol{\Delta }\text{E}$ </tex-math></inline-formula> from 0.353 eV to 0.413 eV; 5.38E+11 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−2</sup> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol{\Delta }\text{E}$ </tex-math></inline-formula> > 0.519 eV) and better dynamic characteristics.

Effects of Dielectric Passivation on Device Performance of AlGaN/GaN High-Electron-Mobility Transistors

Various dielectrics deposited on the surfaces of AlGaN/GaN-based metal-gate high-electron-mobility transistors (HEMTs) were investigated to understand their effects on the device characteristics. The observed increase by 30% in the two-dimensional electron gas (2DEG) sheet carrier density by the deposition of SiO2, Si3N4, or Al2O3 was in line with the improved output and transfer characteristics of the HEMT devices with the deposited dielectrics, as compared to those of the bare HEMT device without dielectric. The improvements seemed to result from the strain accumulation in AlGaN due to the difference in thermal expansion between AlGaN and the dielectric and from the effective treatment of surface electrical passivation by the deposited dielectric. Furthermore, suppression of current collapse was observed in the SiO2− and Si3N4−deposited samples, as compared to the bare HEMT device.

Suppressing Buffer-Induced Current Collapse in GaN HEMTs with a Source-Connected p-GaN (SCPG): A Simulation Study

Carbon doping in the buffer of AlGaN/GaN high-electron-mobility transistors (HEMTs) leads to the notorious current collapse phenomenon. In this paper, an HEMT structure with a source-connected p-GaN (SCPG) embedded in the carbon-doped semi-insulating buffer is proposed to suppress the buffer-induced current collapse effect. Two-dimensional transient simulation was carried out to show the successful suppression of buffer-induced current collapse in the SCPG-HEMTs compared with conventional HEMTs. The mechanism of suppressing dynamic on-resistance degradation by ejecting holes from the SCPG into the high resistive buffer layer after off-state stress is illustrated based on energy band diagrams. This paper contributes an innovative device structure to potentially solve the buffer-induced degradation of the dynamic on-resistance in GaN power devices.

The dual-suppression of peak electric field in AlGaN/GaN HEMT with sandwich structure

To improve the power and RF performance of the high electron mobility transistors (HEMTs) based on AlGaN/GaN heterostructure junction, in this paper, a sandwich structure consisting of gate field plate, SiN passivation layer, and notch structure is proposed. The notch structure at the AlGaN barrier layer between the gate and drain is formed by the Inductively Coupled Plasma etching system (ICP), and the notch has a depth of 15 nm. The dual-suppression of the peak electric field contributes to the breakdown voltage of 91 V, which is a 152.8% improvement compared with the conventional HEMT. The decrease of C gd due to increase of distance between the gate electrode and the lower surface of the depletion layer contributes to the cut-off frequency of 24.1 GHz, which is an 8% improvement. Thus, this composite-structure HEMT has a JFOM of 2.2 THz V, it is an 84.6% improvement compared with the conventional gate field plate HEMT. A well suppression of current collapse is also achieved. It has potential in high power and RF applications. • The Sandwich structure manufacturing process is compatible with the conventional process for AlGaN/GaN HEMTs. • The Sandwich structure has a good suppression on the peak electric field, and it can decrease the capacitance between the gate and drain. • The Sandwich structure not only improves the breakdown characteristic but also improves the cut-off frequency characteristics. • The manufacturing process of the notch structure at AlGaN barrier layer does not cause the surface damage.

Demonstration of AlGaN/GaN MISHEMT on Si with Low-Temperature Epitaxy Grown AlN Dielectric Gate

AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMT) with a low-temperature epitaxy (LTE)-grown single crystalline AlN gate dielectric were demonstrated for the first time and the post-gate annealing effects at 400 °C were studied. The as-deposited LTE-AlN MISHEMT showed a maximum drain current (IDmax) of 708 mA/mm at a gate bias of 4 V and a maximum extrinsic transconductance (gmmax) of 129 mS/mm. The 400 °C annealed MISHEMT exhibited an increase of 15% in gmmax, an order of magnitude reduction in reverse gate leakage and about a 3% suppression of drain current (ID) collapse. The increase of gmmax by post-gate annealing is consistent with the increase of 2DEG mobility. The suppression of ID collapse and the reduction of gate leakage current is attributed to the reduction of interface state density (5.0 × 1011 cm−2eV−1) between the AlN/GaN interface after post-gate annealing at 400 °C. This study demonstrates that LTE grown AlN is a promising alternate material as gate dielectric for GaN-based MISHEMT application.

Effect of fluorinated graphene insulator on AlGaN/GaN MIS-HEMTs as gate dielectric

We investigate the performance of AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) by inserting a fluorinated graphene insulator. It is found that the interface-state density of the sample with fluorinated graphene (5.8 × 1013–8.7 × 1011 eV−1·cm−2) was lower than that without fluorinated graphene (1.1 × 1014–8.1 × 1012 eV−1·cm−2) and exhibits better properties, including higher saturation drain current (Isat), lower on-resistance (Ron), smaller hysteresis of threshold voltage (ΔVth), and better current collapse suppression. Furthermore, the inserted fluorinated graphene could increase the activation energy of surface leakage current, which is verified by the analysis of leakage current. Our results suggest that the fluorinated graphene insulator can lessen interface-state density at the shallow energy levels by the interface-state density decrement and the activation energy increment.

Deep-Donor-Induced Suppression of Current Collapse in an AlGaN-GaN Heterojunction Structure Grown on Si

Deep-Donor-Induced Suppression of Current Collapse in an AlGaN-GaN Heterojunction Structure Grown on Si

Investigation of SiN x and AlN Passivation for AlGaN/GaN High-Electron-Mobility Transistors: Role of Interface Traps and Polarization Charges

In this work, we studied the mechanisms and switching properties of AlGaN/GaN high-electron-mobility-transistors (HEMTs) passivated by amorphous-SiN x and monocrystal-like AlN. The effects of interface traps and polarization charges on current collapse are investigated by TCAD simulations and experimental characterizations. Surface/interface deep levels can be compensated by both shallow donor-like traps (SiN x passivation) and polarization charges (AlN passivation) at passivation/heterostructure interface, but with different levels of effectiveness under fast switching conditions. SiN x -passivation introduces shallow donor-like trap states with short time constant that favors a fast emission of trapped electrons in the access region and suppressed current collapse, but nevertheless exhibits more severe time-dependent recovery of dynamic on-resistance. For AlN passivation, interface traps are compensated by the fixed positive polarization charges and the off-state depletion region (in the 2DEG channel) is formed predominantly by electric-field effect, leading to an immediate accumulation of high channel electron concentration after switching the HEMT devices back to on-state and instant response of drain current to gate and drain bias. The field plate structure is necessary in SiN x -passivated devices for both current collapse suppression and electric field alleviation. With AlN passivation, the field plate can be solely designed for achieving more uniform electric field distribution for gate reliability concern without the concern of current collapse.

AlN/GaN HEMT with Gate Insulation and Current Collapse Suppression Using Thermal ALD ZrO2

In this letter, we report the device characteristics of AlN/GaN MIS-HEMT on silicon substrate using thermal atomic-layer-deposition (ALD) ZrO2 with various thicknesses. The thermal ALD ZrO2 thin film is deposited at 250°C, which avoids plasma enhancement during the fabrication process. From the transmission electron microscopy results, it is found that the alloy penetrates to the 2DEG region to form a carrier conductive pathway which facilitates the ohmic contact formation. The optimized 7 nm-thick ZrO2 AlN/GaN MIS-HEMT exhibits improved Ion/Ioff ratio and suppressed current collapse degradation, compared with 4 nm-thick ZrO2 AlN/GaN MIS-HEMT and Schottky gate AlN/GaN HEMT (SG-HEMT). In addition, as compared to SG-HEMT, reverse gate leakage current can be reduced by about six orders and forward gate bias extends to + 6.3 V with 7 nm-thick ZrO2 AlN/GaN MIS-HEMT.

Reduced reverse gate leakage current for GaN HEMTs with 3 nm Al/40 nm SiN passivation layer

An obvious increase in the gate leakage current has been commonly observed in GaN HEMTs, after Plasma-enhanced chemical vapor deposition (PECVD) SiN passivation has been observed to obviously increase. This paper presents an Al/SiN stack layer passivation structure. The high gate leakage current in GaN HEMTs caused by the PECVD SiN passivation is distinctly reduced by 2 to 3 orders of magnitude by introducing a thin Al layer. It is mainly attributed to the Al layer blocking and minimizing the damage for the (Al)GaN surface in the build-up of the luminance process of PECVD SiN and then reducing the surface trap density. TEM mapping and SRIM software simulation reveal that neither damage nor inter-diffusion is demonstrated at the Al/AlGaN interface, where a continuous crystalline region is observed. The moderate current collapse suppression and 32.8% improvement in VBR are achieved in GaN HEMTs with Al/SiN passivation.

High-Performance AlGaN/GaN/Si Power MOSHEMTs With ZrO2 Gate Dielectric

We report on the power performance of GaN-on-Si metal–oxide–semiconductor high electron mobility transistors (MOSHEMTs) with a high- ${k}$ ZrO2 gate dielectric formed by atomic layer deposition. As a result of the high-quality ZrO2 and ZrO2/AlGaN interface, the MOSHEMTs demonstrate an excellent ON/OFF current ratio of $5 \times 10^{10}$ , a steep subthreshold slope of 66 mV/dec, a small hysteresis of ~0.05 V, and a high breakdown voltage of 1084 V at $1~\mu \text{A}$ /mm. Effective suppression of current collapse with a dynamic-to-static ON-resistance ratio of 1.78 at a drain bias of 600 V is also achieved in the device. Benefiting from the highly uniform gate stack, large-area devices with a gate width of 20 mm were also demonstrated using the ZrO2 gate dielectric, exhibiting a maximum output current of 7.4 A, a low ON-resistance of $0.66~\Omega $ , and a high breakdown voltage of 650 V at an OFF-state drain current of $1~\mu \text{A}$ /mm.

Suppression of drain-induced barrier lowering by double-recess overlapped gate structure in normally-off AlGaN-GaN MOSFETs

We investigated drain-induced barrier lowering (DIBL) in normally-off AlGaN-GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with a double-recess overlapped gate structure. It is found that the double-recess overlapped gate structure can suppress DIBL; the threshold voltage is constant without lowering for high drain-source voltages, and sub-threshold characteristics remains excellent. We elucidate the mechanism of the DIBL suppression by considering a local potential in the MOSFETs. In addition, it is also found that the double-recess overlapped gate structure is beneficial for current collapse suppression.

Photon emission and current-collapse suppression of AlGaN/GaN field-effect transistors with photonic–ohmic drain at high temperatures

The high-temperature performances of AlGaN/GaN photonic–ohmic drain field-effect transistors (PODFETs) were evaluated by investigating the photon-emission behaviors of the photonic drain (P-D) and the dynamic characteristics at various temperatures. The P-D exhibited a robust photon-emission capability at high operating temperatures. Dynamic high-speed hard-switching tests revealed the effectiveness of the P-D and its photon-pumping functionality at deep electron traps to suppress the current collapse for AlGaN/GaN power transistors from room temperature to 200 °C. The results indicate the potential of AlGaN/GaN PODFETs for high-temperature power-switching applications.

Effect of Hydrogen on Defects of AlGaN/GaN HEMTs Characterized by Low-Frequency Noise

The effect of hydrogen on defects in AlGaN/GaN high-electron-mobility transistors (HEMTs) was investigated by using low-frequency noise (LFN) method. The results show that drain-to-source current of AlGaN/GaN HEMTs after hydrogen treatment is significantly larger than that of the fresh AlGaN/GaN HEMTs. The maximum variation of drain-to-source current is up to 80 mA at the gate-to-source voltage of 0 V and drain-to-source voltage of 5 V. The suppression of current collapse was also observed, and the gate-lag characteristic becomes better for the AlGaN/GaN HEMTs after hydrogen treatment. Extracted by the LFN method, the trap density decreases by about one order of magnitude in the AlGaN/GaN HEMTs after hydrogen treatment, and this would lead to less depleted electrons in the channel 2-D electron gas. The mechanism for the reduction of trap density could be attributed to H-passivated defects at AlGaN surface, AlGaN barrier layer, and heterostructure interface. The results of this paper may be useful in the design and application of AlGaN/GaN HEMTs.

High-Performance LPCVD-SiNx/InAlGaN/GaN MIS-HEMTs With 850-V 0.98-$\text{m}{\Omega} \cdot$ cm2 for Power Device Applications

We demonstrate the electrical performances of the quaternary InAlGaN/GaN MIS-HEMTs with high quality SiNx gate dielectric and surface passivation layer deposited by low pressure chemical vapor deposition (LPCVD) at 780.C. Excellent LPCVD-SiNx/InAlGaN interface and SiNx film quality were obtained, resulting in very high output current density, a very small threshold voltage hysteresis and steep subthreshold slope. The LPCVD-SiNx/InAlGaN/GaN MIS-HEMT device exhibited high on/off current ratio, large gate voltage swing, high breakdown voltage, and very low dynamic on-resistance (RON) degradation, meaning effective current collapse suppression compared to the plasma enhanced chemical vapor deposition -SiNx/InAlGaN/GaN MIS-HEMTs. The corresponding specific on-resistance (RON,sp) for LPCVD-SiNx device was as low as 0.98 mEcm2, yielding a high figure of merit of 737 MW/cm2. These results demonstrate a great potential of the LPCVD-SiNx/InAlGaN/GaN MIS-HEMTs for high-power switching applications.