Successive Cancellation List Polar Decoder Research Articles

A Node-Reliability Based CRC-Aided Successive Cancellation List Polar Decoder Architecture Combined With Post-Processing

This paper presents a node-reliability based cyclic redundancy check (CRC)-aided successive cancellation list (NRB CA-SCL) polar decoder architecture, where node reliability is used to determine the number of expanding paths, and a priority-based sorter is devised so as to reduce the number of sorting cycles. In order to reduce the effort required for sorting by the node processor, the expanding segments are generated using off-line flipping patterns. We also propose a post-processing scheme that improves the error-rate performance for the NRB CA-SCL decoders. The proposed techniques are demonstrated by implementing (1024, 512) polar decoders. Compared to other state-of-the-art CA-SCL decoders, the proposed decoder, when the post-processing technique is not included, achieves a better area efficiency. When the post-processing technique is included, the proposed list-16 decoder achieves an area efficiency that is almost 2.5 times greater compared to the latest list-32 CA-SCL decoder, as well as a similar error-rate performance.

Transformation of Binary Linear Block Codes to Polar Codes With Dynamic Frozen

In this paper, a general transformation of binary linear block codes (BLBCs) to (possibly, multi-kernel) polar codes with dynamic frozen bits is proposed. Through a simple matrix permutation operation, a one-to-one connection between the codewords of a BLBC and its transformed polar code can be established. This transformation allows the usage of any decoding algorithm of polar codes for efficient soft decoding of BLBCs, including the powerful successive cancellation list (SCL) decoding algorithm. Simulations show that the soft SCL polar decoding of BLBCs can achieve a comparative performance to the order statistic decoding (OSD), as well as the maximum-likelihood decoding (MLD) in certain cases, with a much lower computational complexity.

An Improved Software List Sphere Polar Decoder With Synchronous Determination

Being the first codes achieving the capacity of symmetric binary-input discrete memoryless channels, polar codes have been favorable and standardized for enhanced mobile broadband (eMBB) control channels. In future mobile communications, the entire system is required to be flexible and adaptive to varying scenarios. Therefore, efficient software implementation of polar decoder is expected. Existing software successive cancellation list polar decoder can achieve good performance but with a good memory consumption. For short control channel codes, a more memory-efficient alternative is sphere decoder, but its latency gives rise to another issue. Equipped with a breadth-first search to keep a fixed complexity, list sphere decoder (LSD) is also considered. To improve the performance of LSD, a software LSD with synchronous determination is proposed in this paper. We precalculate the synchro sets to improve the decoding, which leads to a performance gain. Meanwhile, the decoding process is simplified due to the precalculation, which attains even lower complexity. Implemented with C++ , the proposed decoder can achieve up to 2 dB performance gain compared with the existing LSD.

Segmented Successive Cancellation List Polar Decoding with Tailored CRC

As the first error correction codes provably achieving the symmetric capacity of binary-input discrete memory-less channels (B-DMCs), polar codes have been recently chosen by 3GPP for eMBB control channel. Among existing algorithms, CRC-aided successive cancellation list (CA-SCL) decoding is favorable due to its good performance, where CRC is placed at the end of the decoding and helps to eliminate the invalid candidates before final selection. However, the good performance is obtained with a complexity increase that is linear in list size $L$. In this paper, the tailored CRC-aided SCL (TCA-SCL) decoding is proposed to balance performance and complexity. Analysis on how to choose the proper CRC for a given segment is proposed with the help of \emph{virtual transform} and \emph{virtual length}. For further performance improvement, hybrid automatic repeat request (HARQ) scheme is incorporated. Numerical results have shown that, with the similar complexity as the state-of-the-art, the proposed TCA-SCL and HARQ-TCA-SCL schemes achieve $0.1$ dB and $0.25$ dB performance gain at frame error rate $\textrm{FER}=10^{-2}$, respectively. Finally, an efficient TCA-SCL decoder is implemented with FPGA demonstrating its advantages over CA-SCL decoder.