Submodules Research Articles

A lightweight MMC topology with recombined half‐bridge submodules for DC fault ride‐through

AbstractThe lightweight of modular multilevel converter (MMC) and the DC faults ride‐through ability are main challenges for MMC‐high voltage direct current (HVDC) transmission systems. By introducing the concept of time‐division multiplexing, an arm multiplexing MMC (AM‐MMC) topology with high utilization of submodules is presented to reduce the weight and volume of MMC. In order to block the DC side fault current, this paper proposes a novel submodule in AM‐MMC, instead of using full‐bridge submodules. The proposed recombined half‐bridge submodules of AM‐MMC (RHAM‐MMC) contains four half‐bridge submodules and an IGBT with reverse parallel diodes. The topology and operating principle of RHAM‐MMC are introduced in detail. The time‐division multiplexing of middle arms between upper and lower arms is achieved by introducing arm selection switches. Thus, a new type of arm switch and switching method is designed based on the switch state. The DC faults ride‐through strategy is carried out based on its DC fault characteristic analysis. In addition, the economy analysis is conducted on the switching loss and operating loss of RHAM‐MMC. Compared with the fault ride‐through capability of other sub‐modules (SMs), RHAM‐MMC performs better in terms of investment cost and device losses. The simulation results based on MATLAB/Simulink reveal that RHAM‐MMC can achieve the DC side fault ride‐through and show effectiveness of the DC fault ride‐through control strategy.

Comparative analysis of submodules and design of seventeen-level modular multilevel converter using a five-level submodule block

Abstract Multilevel inverters and various modulation techniques have been proven to be the best solutions to overcome all the limitations of conventional two- or three-level voltage source inverters. In recent years, among all topologies, modular multilevel converter (MMC) has advantages like low total harmonic distortion (THD), reduced filter requirement, fault-tolerant operation, scalability, modularity, transformerless operation, etc. The main application of MMC is found in high-voltage DC transmission (HVDC). This study describes and analyses the performance of two distinct MMC submodule (SM) topologies: the Half Bridge submodule (HBSM) and the Full Bridge submodule (FBSM). Switching pattern is simpler in HBSM topology but it has the disadvantage that it does not have DC fault current blocking capability. Whereas FBSM not only inherently can block the DC fault current but also has advantages like reduced volume of MMC and better performance. Further, having the capability to produce three voltage levels, it can be operated in boost mode. Also, by using a proper switching pattern, MMC can be designed to generate a various number of output levels by using the same five-level submodule block. Out of which 17 level MMC gives the best output. The MATLAB-Simulink model is used to simulate the circuit, and the findings are confirmed for a 17-level output voltage.

A voltage-balancing algorithm based on the gating signal rotation and Separated Circulating Current Controller applied on a Modular Multilevel Converter

The Modular Multilevel Converter (MMC) is being used for many medium/high-power energy conversion applications due to its superior advantages such as modularity, scalability, and low harmonic generation. However, the MMC control can be challenging. If the submodule (SM) capacitors are not properly balanced, a circulating current is induced due to the voltage mismatch between the capacitor submodules. This circulating current adds to the arm current, which increases its RMS and peak value, and thus increases system losses. Therefore, controlling the submodule capacitor voltage and the circulating current is an important step in any MMC control. In this paper, a Gating Pattern Rotation algorithm is used for SM capacitor voltage balancing, and an independent circulating current controller in the double reference frame is used to eliminate the circulating current. Furthermore, a voltage-oriented control is employed to eliminate harmonics and regulate the grid power factor. MATLAB Simulink simulates the control technique, and various simulation results are presented. With results showing their effectiveness in managing and improving MMC behavior.

Research on Asymmetrical Operation of Multilevel Converter-Type Solid-State Transformers Based on High-Frequency Link Interconnection

The large size of the sub-module (SM) capacitor is a typical problem in traditional modular multilevel converter-type solid-state transformers (MMC-SSTs). The MMC-SST based on high-frequency link interconnection is an effective solution for achieving lightweight capacitance. This structure can help to eliminate the symmetric SM fluctuating power, thereby reducing the SM capacitance. In a three-phase interconnected MMC-SST with low capacitance, potential risks may arise during transient processes, especially in cases of three-phase voltage asymmetry, such as large fluctuations in the SM voltage and unstable DC bus voltage. Aiming to solve this problem, this article re-analyzes the internal power characteristics of the MMC-SST under asymmetric operation and re-derives the SM capacitance constraint suitable for different degrees of three-phase voltage asymmetry. The new SM capacitance constraint enhances the asymmetric voltage ride-through capability of the MMC-SST. The new capacitance constraint is higher than that in symmetric operation, but it still has significant advantages in capacitance compared with the traditional MMC-SST.

Reliability Evaluation of MMC‐MTDC System Considering Device Failure Rates and Multi‐State Transition

ABSTRACTThe modular multi‐level converter based multi‐terminal high voltage direct current (MMC‐MTDC) system, with its numerous power devices and diverse operating states, poses a significant challenge for reliability evaluation. The paper introduces a method for modeling and assessing the reliability of MMC‐MTDC, considering both power device failure rates and multi‐state transitions of multiple terminals. To determine the weights of influence, the analytic hierarchy process (AHP) is employed to evaluate the impact of sub‐modules (SMs), the controller system, and the water cooling systems of an MMC. Subsequently, a multi‐state transition model is established to describe the changes in the operation mode of the MMC‐MTDC. On this basis, the reliability evaluation via semi‐Markov processes is implemented. A case study is performed on the reliability of a ±200 kV five‐terminal system and the results are compared with practical operation data.

Theoretical and simulation analysis of DC bus current fluctuation control strategies of modular multilevel converter under AC side fault conditions

Modular Multilevel Converters (MMCs) play a crucial role in high-voltage DC (HVDC) systems due to their adaptable control and swift response capabilities. However, AC side faults could introduce asymmetric double-line frequency components into the MMC's circulating current, jeopardizing DC bus stability. Although strategies to mitigate DC side fluctuations are well-established, a detailed comparison of their operational impacts remains unexplored. The operational effects of MMCs under AC side faults are firstly examined in this study, including issues related to grid-connected current asymmetry and DC bus current fluctuations. Subsequently, two targeted control schemes are devised based on the goals of suppressing the double-line frequency components and only the zero-sequence components of circulating current. Through simulation, these approaches are contrasted, delineating their advantages and disadvantages in terms of circulating current suppression, submodules(SMs) capacitance voltage fluctuation, and other performance metrics, which could provide a foundational reference for designing and selecting MMC control strategies under AC side faults.

An inherent fault current blocking modular series multilevel converter using half-bridge sub-modules for grid integration

This paper proposes an inherent fault current blocking modular series multilevel converter (MSMC) using half-bridge (HB) sub-modules (SMs) for grid integration. The proposed converter uses passive filters to decouple the AC and DC side. Compared to conventional three-phase modular multilevel converters (MMCs) that use half-bridge sub-modules (HBSMs), the new MSMC design significantly reduces the number of switching devices required. Furthermore, one of the features of the proposed MSMC is its inherent ability to limit fault currents, which is achieved through its unique topological configuration whereas the conventional HB-MMC is susceptible to DC and AC faults. Despite these advancements, the new MSMC design retains all the desirable characteristics of conventional HB-MMCs, ensuring compatibility and ease of adoption. The paper thoroughly examines the operation of the MSMC under both steady-state and fault conditions. It also discusses the equivalent voltage decoupling circuit, energy balancing which is essential for the proper functioning of the converter. Additionally, the pre-charging process of the sub-module capacitors, a critical step for ensuring the safe start-up of the converter, is discussed in detail. Furthermore, Extended topologies can be derived from proposed topology for different applications.

Asynchronous Numerical Spiking Neural Membrane Systems with Local Synchronization.

Since the spiking neural P system (SN P system) was proposed in 2006, it has become a research hotspot in the field of membrane computing. The SN P system performs computations through the encoding, processing, and transmission of spiking information and can be regarded as a third-generation neural network. As a variant of the SN P system, the global asynchronous numerical spiking neural P system (ANSN P system) is adaptable to a broader range of application scenarios. However, in biological neuroscience, some neurons work synchronously within a community to perform specific functions in the brain. Inspired by this, our work investigates a global asynchronous spiking neural P system (ANSN P system) that incorporates certain local synchronous neuron sets. Within these local synchronous sets, neurons must execute their production functions simultaneously, thereby reducing dependence on thresholds and enhancing control uncertainty in ANSN P systems. By analyzing the ADD, SUB, and FIN modules in the generating mode, as well as the INPUT and ADD modules in the accepting mode, this paper demonstrates the novel system's computational capacity as both a generator and an acceptor. Additionally, this paper compares each module to those in other SN P systems, considering the maximum number of neurons and rules per neuron. The results show that this new ANSN P system is at least as effective as the existing SN P systems.

Reliability Analysis of Modular Multilevel Converters in MVDC Applications

In modular multilevel converters (MMCs) designed for medium-voltage DC (MVDC) systems, since the required sub-modules (SMs) in one arm are fewer, the converters cannot afford the same level of redundancy as observed in high-voltage DC (HVDC) applications. In order to ensure high availability of converters in MVDC systems, reliability becomes a challenge and requires different design approaches. Considering the redundancy design, operating modes, and correlation across failures of SMs in one arm, this paper analyses and compares reliability in MMCs for MVDC systems with multiple SM topologies. Under different scenarios in MVDC systems, SM topologies with better performance of reliability have been identified in this research. It is demonstrated that, for a given output voltage in converters, three-level SMs generally provide higher reliability than two-level SMs. By implementing passive and load-sharing operation schemes in converters, the MMC reliability can be improved compared with the conventional active mode. In terms of the correlation between lifetime of SMs in the same arm, the smaller disturbance introduced by one faulty SM promotes the improvement of converter reliability. Also, the correlation between failures of SMs in one arm has greater effects on the reliability of an MMC with higher level of redundancy. The outcomes of this work contribute to the optimisation of converter design and operation with high reliability and low investment for an MMC in MVDC systems.

A diagnostic strategy for IGBT open-circuit faults in modular multilevel converters based on improved diagnostic indices

Capacitor voltage deviations between two submodules (SMs) are always used as the diagnostic index for the insulated gate bipolar transistor (IGBT) open-circuit fault diagnosis in modular multilevel converters (MMCs). However, it is difficult to determine when MMCs operate in different conditions. To solve this issue, this article proposes a diagnostic strategy for IGBT open-circuit faults in MMCs based on improved diagnostic indices. First, two diagnostic indices, i.e., the concept of the count of periods during which the switching function is fixed (CSF) and capacitor voltage sorting sequence number (CSN) are proposed. On this basis, fault detection is implemented by judging the changing trend of the CSN in the SM whose CSF is the highest. The remaining malfunctioning SMs are located in turns by a similar process to fault detection. The proposed diagnostic indices show consistent faulty characteristics under different operating conditions, thus avoiding readjusting the threshold according to different operating conditions. In this sense, the proposed strategy can be easily used and promoted in different operating scenarios. Experimental results in a hardware-in-the-loop (HIL) platform verify the effectiveness of the proposed strategy.

Real-Time Implementation of Three-Phase Z Packed U-Cell Modular Multilevel Grid-Connected Converter Using CPU and FPGA

The Modular Multilevel Converter (MMC) is a promising converter for medium-/high voltage applications due to its various features. The waveform quality could be enhanced further by expanding the number of generated voltage levels, which increases the number of submodules (SMs); however, this improvement enlarges the size and cost of the converter, posing a persistent challenge. Hence, there exists a trade-off between power quality and the size and complexity of the converter. To verify the performance of such a complex converter and to validate the effectiveness of the control system, especially in the absence of a physical system, Real-Time (RT) simulation becomes crucial. However, the large number of components of a MMC creates important numerical challenges and computational difficulties in RT simulation. This paper proposes a grid-connected MMC employing a Z Packed U-Cell converter as a SM to generate a higher number of voltage levels while minimizing the required number of SMs. The ZPUC-MMC is implemented on an FPGA-based RT simulation platform using Electric Hardware Solver to reduce computational burden and simulation time, while improving the accuracy of the obtained results. Conventional controllers of MMCs are applied to assess the effectiveness and robustness of the proposed system during steady-state and dynamic operations.

A capacitance reduction method of hybrid modular multilevel converter based on multi‐harmonic voltage injection

AbstractIn a modular multilevel converter (MMC) system, the sub‐module (SM) capacitors account for a large proportion of cost, volume and weight. Increasing modulation index (m) is an effective method to reducing the capacitance. Traditional MMC based on half‐bridge SM (HBSM) cannot boosting m while the hybrid MMC composed of HBSMs and full‐bridge sub‐modules (FBSM) can increase the m. The negative voltage is required when hybrid MMC works at the boosted m, which is only provided by the FBSMs because the HBSMs cannot output negative voltage. Therefore, appropriate control strategies are needed to achieve the normal operation of hybrid MMC under boosted m. This paper presents a control method suitable for hybrid MMC with high m based on multi‐harmonic voltage injection. The m is increased to 1.41 with the proposed multi‐harmonic voltage injection. Compared with the HBSM‐MMC, the proposed method reduces the total capacitance by more than 32%. Boosting m also reduces the RMS and peak value of the arm current by 18%. A comprehensive comparison was presented to demonstrate the cost and effect. Simulation and experiment verified the proposed method.

Model Predictive Control of a Modular Multilevel Converter with Reduced Computational Burden

Recent advances in high-power applications employing voltage source converters have been primarily fuelled by the emergence of the modular multilevel converter (MMC) and its derivatives. Model predictive control (MPC) has emerged as an effective way of controlling these converters because of its high response. However, the practical implementation of MPC encounters hurdles, particularly in MMCs featuring many sub-modules per arm. This research introduces an approach termed folding model predictive control (FMPC), coupled with a pre-processing sorting algorithm, tailored for modular multilevel converters. The objective is to alleviate a significant part of the computational burden associated with the control of these converters. The FMPC framework combines multiple control objectives, encompassing AC current, DC current, circulating current, arm energy, and leg energy, within a unified cost function. Both simulation studies and real-time hardware-in-the-loop (HIL) testing are conducted to verify the efficacy of the proposed FMPC. The findings underscore the FMPC’s ability to deliver fast response and robust performance under both steady-state and dynamic operating conditions. Moreover, the FMPC adeptly mitigates circulating currents, reduces total harmonic distortion (THD%), and upholds capacitor voltage stability within acceptable thresholds, even in the presence of harmonic distortions in the AC grid. The practical applicability of MMCs, notwithstanding the presence of a large number of sub-modules (SMs) per arm, is facilitated by the significant reduction in switching states and computational overhead achieved through the FMPC approach.

A Capacitance Monitoring Strategy Based on Offset Error Compensation for Modular Multilevel Converters

The modular multilevel converter (MMC) is a research hotspot in medium-voltage and high-voltage applications. The measurement offset error would cause an increase in the monitoring error of the submodule (SM) capacitance of the MMC, affecting the estimation accuracy of the SM capacitance monitoring. This paper proposes a capacitor monitoring strategy based on the offset error compensation, where two reasonable capacitor monitoring periods are selected in one fundamental period under the proposed voltage-balancing control (VBC) based on the virtual capacitor voltage (VCV) to compensate for the offset error impact on the capacitance monitoring. The proposed strategy can effectively eliminate the offset error impact on the capacitance monitoring, which ensures the accuracy of the SM capacitance monitoring in the MMCs. The effectiveness of the proposed monitoring strategy is confirmed by the simulations and experiments.

A Multiport Current-Fed IIOS Dual-Half-Bridge Converter for Distributed Photovoltaic MVDC Integration System

The input-independent output-series (IIOS) dc-dc converter structure possesses the capability to achieve high voltage gain, single-stage power conversion and multiport independent control, which is suitable for distributed photovoltaic (PV) power collection system. However, if the multiport input powers are different, the output voltage of each submodule (SM) will be uneven, which might lead to power degradation and device damage. In order to address SM output voltage imbalance problem, a voltage self-balancing output-series dual-half- bridge (OSDHB) converter based on multi-winding coupled-inductor (MWCI) is developed in this paper. By multiplexing the SM secondary side switches in OSDHB, the unbalanced power between SMs can be directly transmitted to the target SM, without the requisition for transmission one by one. And all power switches possess zero-voltage switching characteristic. Therefore, the proposed IIOS-DHB features high efficiency, low cost, simple control and more adaptive to distributed PV power generation system. The topological configuration, operating principle and self-balancing performance are presented. Finally, the full-scale simulations and three submodules down-scale experiment hardware platform have been conducted to verify the theoretical analysis of the proposed IIOS-DHB.

Hardware-in-the-loop setup for enhanced modular multi-level converter with reduced circulating currents

Owing to its essential features, such as modularity and exceptional power quality, the modular multilevel converter (MMC) emerges as the optimal converter topology for high-voltage direct current (HVDC) applications. Traditionally, MMCs are controlled through a method called nearest level modulation (NLM), which generates N+1 AC output voltages, where N represents the number of sub modules (SMs) per arm. In this paper, we introduce a modified NLM technique designed to yield 2N+1 and 4N+1 levels, with a focus on efficiently controlling internal dynamics. The proposed MMC is evaluated using a hardware-in-the-loop (HIL) environment to obtain real-time simulation outcomes. This MMC topology demonstrates a reduction in circulating currents and capacitor voltage ripple.

An optimized Closed-loop Precharging Strategy for Modular Multilevel Converters Based on Power Balancing Control under start or fault restart conditions

Modular multilevel converter (MMC)-based high-voltage DC (HVDC) systems have found rapid growth in power grids. To reduce the inrush current, it is necessary to precharge the submodule (SM) capacitors to the rated voltage before normal operation. In this paper, an optimized pre-charging strategy for MMC is proposed based on power balancing . First, the charging power is obtained by a designed closed-loop control of the SM capacitors. Then the total power released by the AC or DC side could be calculated by power conservation and feedback by controlling the charging current. At the same time, the power difference between the upper and lower bridge arm of each phase and the internal voltage balancing of bridge arms are also considered by the proposed bridge arm and SM voltage algorithms. By comparing with conventional closed-loop pre-charging strategies, the pre-charging speed is greatly enhanced as the achievement of synchronous charging of upper and lower bridge arm SMs. Moreover, as the same voltage and current double closed-loop control applied in both MMC pre-charging and normal state, the state transition time could be reduced. Finally, a series of simulations and prototype experiments are conducted to verify the feasibility of the proposed pre-charging strategy.

Local outlier factor based condition monitoring for sub-module capacitors in modular multilevel converters

Modular multilevel converters (MMC) as a key technology for future power grids is rapidly developing. The failure rate of sub-module (SM) capacitors is only lower than that of power devices in MMC, so accurate evaluation of the reliability of capacitors is crucial for the safe operation of MMC. Both the increase of equivalent series resistance (ESR) and decrease of equivalent series capacitance (ESC) are features for capacitor deteriorating. ESC or ESR of the capacitor reaching to limited values indicates that the end of its lifespan and it must be replaced. Most of contemporary researches only focus on ESC or ESR. This article considering the characteristics of both ESC and ESR, proposes a method for monitoring the status of SM capacitors based on machine learning algorithm: local outlier factor (LOF). By utilizing the existing SM switching function and capacitor voltage signals within a fundamental frequency cycle in the control system of MMC, the proposed strategy can not only monitor the faulty capacitors, but also can sort the degrees of abnormal states of capacitors, and the strategy is applicable to MMC with single and multiple types of SM topologies. The proposed method is verified by the hybrid MMC model on Matlab/Simulink.

An Improved AC-Link Voltage Matching Control for the Multiport Modular Multilevel DC Transformer in MVDC Applications

In this paper, an improved AC-link voltage matching control (IVM) strategy is proposed for the multiport modular multilevel DC transformer (M3DCT), which comprises a single-phase modular multilevel converter (MMC) and a series of cascaded H-bridge units. The objective of the proposed IVM strategy is to address the AC-link voltage mismatch phenomenon. Distinct from existing control methods, such as various phase-shifting control methods and the conventional AC-link voltage matching control strategy, the proposed IVM strategy orchestrates the operation of the M3DCT in an innovative fashion. It allows the sum of inserted submodule (SM) numbers in the upper and lower arms to be flexible, no longer confined to a specific SM number per arm. Consequently, the AC-link voltage of the M3DCT is maintained proximate to the matched operating condition, regardless of the degree of mismatch in the DC side voltage of the M3DCT. This enables the enhancement of the M3DCT’s overall operational performance, particularly under conditions of light loads within medium-voltage DC (MVDC) distribution systems. The correctness and effectiveness of the proposed control strategy and the corresponding analysis are substantiated through simulation results.

Low-Capacitance CHB-Based SST Based on Resonant Push–Pull Decoupling Channel

Cascaded H-bridge based solid state transformer (CHB-SST) has been the typical scheme in medium and low voltage AC/DC conversion applications, and large-size capacitance caused by 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> -order ripple of submodules (SMs) is the inherent problem of CHB-based systems. This paper proposes a novel low-capacitance CHB-SST (ZCHB-SST) based on zero-impedance resonant push-pull (ZRPP) decoupling channel for ripple power. ZRPP presents zero-impedance characteristic at its switching frequency equaling to series resonant frequency, which makes the equivalent parallel of CHB AC-link capacitors, and provides a decoupling channel for ripple-power. Therefore, the horizontal SMs ripple-power can achieve mutual cancellation based on their own three-phase symmetry, which significantly reduces the size of AC-link capacitance. In addition, the elimination of SMs ripple-voltage achieves the elimination of grid zero-sequence harmonics from root cause, and the mutual clamping of parallel AC-link capacitors also achieves the voltages self-balancing, which reduces the complex of system control. The CHB-SST configuration, operating principle, ripple-power decoupling, SMs voltage self-balancing, system design, and evaluation are discussed in this paper. Finally, the effectiveness of the proposed CHB-SST is verified by simulation and experiment.