Submillimeter-wave Monolithic Integrated Circuit Research Articles

Broadband 400 GHz On-Chip Antenna With a Metastructured Ground Plane and Dielectric Resonator

The analysis, modeling, design, simulation, and experimental evaluation of a 400 GHz on-chip antenna is presented, with a novel combination of metastructures, a microstrip patch, a quartz-based dielectric resonator, and a diamond-based antireflex layer—all integrated on a 35 nm InGaAs metamorphic high-electron-mobility transistor (mHEMT) technology. The said combination represents a first-time implementation for all submillimeter-wave-capable semiconductor technologies. Circumventing a substrate-thickness limitation of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4.98 \mu \text{m}$ </tex-math></inline-formula> , a state-of-the-art broadband, efficient, and to-the-broadside radiating on-chip antenna solution is realized. It achieves a measured impedance bandwidth of 100 GHz, 25.6%, spanning from 340 to 440 GHz. A consistent pattern bandwidth of 75 GHz is recorded, with an efficiency of 50%–66% and a directivity of up to 10.4 dBi—or 27 dBi, with the utilization of a polypropylene-based dielectric lens. The theoretical analysis of the proposed on-chip antenna is presented, and two modeling approaches are shown and compared. Between the analytical and the 3-D electromagnetic (EM) model, the latter is chosen as it offers greater precision in defining the metastructure unit cell and enables the inclusion of the remaining components of the proposed antenna setup. The measured reflection coefficient and far-field patterns are compared to simulations via the utilized model, and a strong agreement is observed. These far-field patterns are acquired with the on-chip antenna inserted within a broadband 400 GHz transmitter submillimeter-wave monolithic integrated circuit, processed on the 35 nm mHEMT technology.

Broadband 400-GHz InGaAs mHEMT Transmitter and Receiver S-MMICs

The modeling, design, and experimental evaluation of both a 400-GHz transmitter and receiver submillimeter-wave monolithic integrated circuit (S-MMIC) is presented in this article. These S-MMICs are intended for a radar-based system in the aforementioned operating frequency. The transmitter occupies a total chip area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$750\times 2750\,{\mu {\rm m}^2}$</tex-math></inline-formula> . It consists of a multiplier-by-four, generating the fourth-harmonic of the WR-10 input signal, which drives the integrated WR-2.2 power amplifier. The latter has an output-gate width of 128 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula> m. The receiver S-MMIC, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$750\times 2750\,{\mu {\rm m}^2}$</tex-math></inline-formula> , consists of a multiplier-by-two, providing the second harmonic of the WR-10 input signal for the local-oscillator port of the subsequent integrated subharmonic mixer. The radio-frequency port of the latter, connects via a Lange coupler to a WR-2.2 low-noise amplifier (LNA). All the components included, are processed on a 35-nm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\text{InAlAs}}/{\text{InGaAs}}$</tex-math></inline-formula> metamorphic high-electron-mobility transistor integrated-circuit technology, utilizing two-finger transistors and thin-film microstrip lines (TFMSLs). The modeling approach of the amplifier cores and the respective design decisions taken are listed and elaborated-on in this work. Accompanying measurements and simulations of the transmitter and receiver are presented. The individual components of the aforementioned S-MMICs, are characterized and the results are included in this article. The state-of-the-art, for S-MMIC based circuits operating in the WR-2.2 band, is set by the LNA, on one side, spanning an operational 3-dB bandwidth (BW) of 310 to 475 GHz, with a peak gain of 23 dB and, on the other side, by the final transmitter design, which covers an operating range of 335 to 425 GHz with a peak-output power of 9.0 dBm and accompanying transducer gain of 11 dB. The included transmitter- and receiver-designs represent a first-time implementation in the mentioned technological process, utilizing solely TFMSLs, boasting the integration level, operating in the WR-2.2 frequency band, and setting the state of the art—to the authors’ best knowledge—for all S-MMIC based solutions in the respective frequency band, in terms of output power and gain over the operating 3-dB BW.

Analysis and Development of Submillimeter-Wave Stacked-FET Power Amplifier MMICs in 35-nm mHEMT Technology

This paper reports on the first stacked field-effect transistor (stacked-FET) submillimeter-wave monolithic integrated circuit (S-MMIC) power amplifier cell operating at 0.3 THz and the first stacked-FET medium power amplifier (MPA) at 240 GHz. Both circuits are fabricated using a 35-nm InGaAs-on-GaAs metamorphic high electron mobility transistor (mHEMT) technology with grounded coplanar waveguide lines. In both cases, compactness and performance are enhanced thanks to the use of an in-house process, based on three-metallization layers, instead of the usual two-layer process. The single-stacked cell exhibits an ultrawide small-signal 3-dB relative bandwidth (RBW) of $\hbox{47.3}{\%}$ , with output power levels higher than 4.3 dBm from 280 to 308 GHz (9.5%). The MPA MMIC combining four triple-stacked mHEMT cells in parallel achieves a small-signal 3-dB RBW of 24.2%, 10.8 dBm of output power, and a power-added efficiency of 5.02%. These values outperform the state-of-the-art results of MPAs published within a comparable technology.

A Submillimeter-Wave HEMT Amplifier Module With Integrated Waveguide Transitions Operating Above 300 GHz

In this paper, we report on the first demonstration of monolithically integrated waveguide transitions in a submillimeter-wave monolithic integrated circuit (S-MMIC) amplifier module. We designed the module for a targeted frequency range of 300-350 GHz, using WR2.2 for the input and output waveguides. The waveguide module utilizes radial -plane transitions from S-MMIC to waveguide. We designed back-to-back radial probe transitions separated by thru transmission lines to characterize the module, and have incorporated the radial -plane transitions with an S-MMIC amplifier, fabricated monolithically as a single chip. The chip makes use of an S-MMIC process and amplifier design from the Northrop Grumman Corporation, Redondo Beach, CA, using 35-nm gate-length InP transistors. The integrated module design eliminates the need for wire bonds in the RF signal path, and enables a drop-in approach for minimal assembly. The waveguide module includes a channel design, which optimizes the -plane probe bandwidth to compensate for an S-MMIC width, which is larger than the waveguide dimension, and is compatible with S-MMIC fabrication and design rules. This paper demonstrates for the first time that waveguide-based S-MMIC amplifier modules with integrated waveguide transitions can be successfully operated at submillimeter-wave frequencies.

Submillimeter-Wave InP MMIC Amplifiers From 300–345 GHz

In this letter, we describe the design, fabrication, simulation, and measured performance of a single-stage and three-stage 320 GHz amplifier using Northrop Grumman Corporation's (NGC) 35-nm InP high electron mobility transistor submillimeter-wave monolithic integrated circuit (S-MMIC) process. On-wafer S-parameter measurements using an extended waveguide band WR3 vector network analyzer system were performed from 210-345 GHz. We measured 5 dB of gain for the single-stage amplifier at 340 GHz and 13-15 of gain from 300-345 GHz for the three-stage S-MMIC amplifier.