Stripline Inductors Research Articles

Scalability of Superconductor Electronics: Limitations Imposed by AC Clock and Flux Bias Transformers

Flux transformers are the necessary component of all superconductor digital integrated circuits utilizing ac power for logic cell excitation and clocking, and flux biasing, e.g., Adiabatic Quantum Flux Parametron (AQFP), Reciprocal Quantum Logic, superconducting sensor arrays, qubits, etc. We consider limitations to the integration scale (device number density) imposed by the critical current of the ac power transmission lines and cross coupling between the adjacent transformers. The former sets the minimum line width and the mutual coupling length in the transformer, whereas the latter sets the minimum spacing between the transformers. Decreasing linewidth of superconducting (Nb) wires increases kinetic inductance of the transformer's secondary, decreasing its length and mutual coupling to the primary. This limits the minimum size of transformers. As a result, there is a minimum linewidth ~100 nm which determines the maximum achievable scale of integration. Using AQFP circuits as an example, we calculate dependence of the AQFP number density on linewidth for various types of transformers and inductors available in the SFQ5ee fabrication process developed at MIT Lincoln Laboratory, and estimate the maximum circuit density as a few million AQFPs per cm^2. We propose an advanced fabrication process for a 10x increase in the density of AQFP and other ac-powered circuits. In this process, inductors are formed from a patterned bilayer of a geometrical inductance material (Nb) deposited over a layer of high kinetic inductance material (e.g., NbN). Individual pattering of the bilayer layers allows to create stripline inductors in a wide range of inductances, from the low values typical to Nb striplines to the high values typical for NbN thin films, and preserve sufficient mutual coupling in stripline transformers with extremely low crosstalk.

A Novel Thin Film Cascade Matrix Coupled Inductor for Integrated Voltage Regulators

This letter demonstrates an on-silicon integrated thin film coupled inductor using a novel cascade matrix concept to suit multiphase integrated voltage regulator (IVR) applications. The novel cascade matrix coupled (CMC) stripline inductor facilitates all-phase-coupled configuration to reduce the phase ripple current in IVRs. It also shows excellent scalability and neat floor planning. Moreover, the proposed CMC inductor uses double layer metal scheme for windings and interconnects, which significantly reduces the ac winding resistance. A four-phase CMC inductor has been successfully fabricated on-silicon substrate and characterized, which uses conventional thin film magnetic core deposition process to achieve in-plane magnetic uniaxial anisotropy. The device occupies 3.2 × 1.7 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> floor area and provides 19.5 nH phase inductance with 120 mΩ dc resistance. The saturation current for each phase is up to 0.4 A when the phase inductance drops by approximately 20%. The coupling coefficient between any two phases of the proposed CMC inductor is 0.27, much higher and more controllable than that of toroid core-based coupled inductors.

Inductance of superconductor integrated circuit features with sizes down to 120 nm

Data are presented on the inductance of various features used in superconductor digital integrated circuits: microstrip and stripline inductors with linewidths down to 120 nm and different combinations of ground plane layers, effect of perforations of various sizes in the ground planes and their distance to the inductors on inductance, inductance of vias of various sizes between adjacent layers, inductance of composite vias between distant superconducting layers. Test circuits used for the measurements were fabricated in a new 150 nm node of a fully planarized process with eight niobium layers developed at MIT Lincoln Laboratory for superconductor electronics as well as in our standard SFQ5ee and SC1 fabrication processes with 250 nm minimum feature size. The new SC2 process utilizes 193 nm photolithography in combination with plasma etching and chemical mechanical planarization of interlayer dielectrics to define inductors with linewidth down to about 100 nm on critical layers. The standard processes use 248 nm photolithography. The measured data are compared with the results of inductance extraction using software packages InductEx and wxLC. Variations of circuit inductors caused by the fabrication processes are discussed. Magnetic flux trapping in ground plane moats and its coupling to nearby inductors are discussed for circuit cooling in a residual field of several configurations.

High DC Current Density On-Chip Strip-Line Inductors Integrated With Magnetic Film

The integration of voltage regulator on the chip substrate in system on chip can reduce interconnect resistive losses, facilitates real-time power management with control of the supply voltage, and requires to manufacture small inductors with high inductance density, power density, and efficiency with large current carrying capability. In this paper, we fabricated a strip-line on-chip inductor with separate conductive windings wrapped by boron-incorporated amorphous Co–Zr–Ta–B film. We examined its response of inductance and quality factor as a function of an applied dc current and its large current density capability.

AC Winding Loss of Phase-Shifted Coupled Windings

In circuits where there is an inherent phase shift angle between coupled winding currents such as in coupled inductors, it is important to accurately calculate the ac winding loss at the correct phase shift and frequency. Phase shift between winding currents can cause the ac winding loss to vary significantly due to changes in the magnetic field distribution. This paper presents an analysis of winding loss for the general case of coupled windings with arbitrary phase-shifted currents and its effect in a number of practical devices. A detailed approach to analytically calculate ac winding loss in microfabricated-coupled stripline inductors is presented along with a derivation of the resistance matrix for the device. The analysis and methodology are then validated using finite element analysis and experimental results.

Design and Fabrication of On-Chip Coupled Inductors Integrated With Magnetic Material for Voltage Regulators

On-chip strip-line coupled inductors integrated with magnetic material are a promising technology option to enable on-chip voltage regulators for improving power management in microelectronics. We report on design methodologies where several examples of parameter tradeoffs are presented. When considered with practical integration constraints, these result in an optimized structure. Strip-line inductors integrated with Ni <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">80</sub> Fe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">20</sub> were then fabricated, electrically characterized, and compared to models. Electrical characterization included frequency dependent measurements of effective self and mutual inductance, effective resistance, coupling coefficient, and saturation effects.

Quasi-optical log-periodic antenna SIS mixers for the 100 GHz band

We designed and tested a quasi-optical SIS mixer that incorporates a substrate lens for the 100 GHz band. The mixer uses a planar self-complementary log-periodic antenna with an integrated tuning circuit. The antenna has a frequency independent impedance of around over several octaves. The tuning circuit consists of two SIS junctions connected in parallel through a superconducting stripline inductor for tuning out the junction capacitances and a impedance transformer for matching the junction resistance to the antenna impedance. The SIS junctions are and have an area of and a current density of . The IF output from the mixer is brought out in a balanced way at each edge of the antenna, and is coupled to a cooled low-noise amplifier through a balun transformer by using a hybrid coupler. A double-sideband receiver noise temperature less than 130 K was measured from 85 to 110 GHz. The best noise temperature was 90 K at 101 GHz, which is the same as for waveguide receivers.

An SIS mixer using two junctions connected in parallel

We have fabricated a superconductor-insulator-superconductor (SIS) mixer using a couple of junctions connected in parallel through a stripline inductor. The junctions have significantly larger area, i.e. larger capacitance, and smaller normal resistance than conventional ones. In order to obtain a good impedance matching between the source and the junctions, an impedance transformer made of a superconducting stripline was integrated with the junctions. The capacitance of the junctions was tuned out by the inductor to obtain a broadband operation without mechanical tuning elements. It was shown that the double sideband noise temperature of the receiver employing this type of mixer device was less than 40 K over the bandwidth of 90-115 GHz. The lowest receiver noise temperature of /spl sim/20 K, which is only 4 times as large as the quantum limited photon noise of hv/k/sub B/, was obtained around 105 GHz.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Temperature dependence of penetration depth in thin film niobium

A novel technique is presented which should allow precise determination of the temperature dependence of the inductance, and hence of the penetration depth, of superconducting niobium thin-film structures. Four niobium thin-film stripline inductors are arranged in a bridge configuration, and inductance differences are measured using a potentiometric technique with a SQUID (superconducting quantum interference device) as the null detector. Numerical simulations of the stripline inductances are presented which allow the performance of the measurement technique to be evaluated. The prediction of the two-fluid model for the penetration-depth temperature dependence is given for reduced temperatures of 0.3 to 0.9. The experimental apparatus and its resolution and accuracy are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Characterization of spiral microstripline inductors

Equations for estimating the true inductance, the apparent inductance and the self-resonant frequency of spiral stripline inductors are presented. Estimates of the unloaded Q and the frequency at which the maximum unloaded Q will appear are found both experimentally and analytically. It is also shown that optimizing the properties of the inductors for a given application is straightforward.