Model For Stress-induced Leakage Current Research Articles

Deep-Trap Stress Induced Leakage Current Model for Nominal and Weak Oxides

We have developed a model of the stress-induced leakage current (SILC) based on the inelastic trap-assisted tunneling (ITAT) by introducing a trap with a deep energy level of 3.6 eV from the bottom of the conduction band. This model can explain both of two field dependencies, i.e., a field dependence of the direct tunneling (DT) for A-mode SILC and that of the Fowler–Nordheim (FN) tunneling for B-mode SILC by analytical equations of a common form. For simple analytical equations, we introduce the most favorable trap position (MFTP), which gives the largest contribution to the leakage current. The trap area density for A-mode SILC of around 1×1010 cm-2 and the area density of the leakage paths for B-mode SILC of 1×102 cm-2 were obtained by comparisons between the experimental results and the present model.

A statistical model for SILC in flash memories

The reliability of flash memories is strongly. limited by the stress-induced leakage current (SILC), which leads to accelerated charge-loss phenomena in a few anomalous cells. Estimating the reliability of large flash arrays requires that physically-based models for the statistical distribution of SILC are developed. In this paper, we show a physical model for the leakage mechanism in thin oxides, which is able us to explain the anomalous leakage-conduction in tail cells. The physical model is then used for a quantitative evaluation of the SILC distribution in large flash arrays. The new model can reproduce the statistics of SILC for a wide range of tunnel-oxide thickness, and can provide a straightforward estimation of the reliability for large flash arrays.

Modeling of stress-induced leakage current and impact ionization in MOS devices

Stress-induced leakage current (SILC) modeling requires consistency with a variety of experimental observations, like steady-state leakage, transient discharge currents and impact ionization characteristics observed after stress. Here we present a SILC model based on trap-assisted tunneling and recombination at deep-levels in the oxide, which successfully reproduces all SILC features. Based on a detailed analysis of SILC data, a two-band defect distribution is determined, in which the low- and high-energy ranges account for stationary SILC and transient currents, respectively. The stress-induced impact ionization (SIII) components associated with these defect distributions are then calculated, showing that the main contribution results from high-energy states. Simulation results are in good agreement with experimental data for leakage and SIII currents in p-channel devices with an oxide thickness of 8.2 nm. These results point out the limitation of the quantum yield method for measuring the mean energy loss in the SILC mechanism.

Improved model for the stress-induced leakage current in thin silicon dioxide based on conduction-band electron and valence-band electron tunneling

This article presents a detailed investigation on the stress-induced leakage current (SILC) conduction mechanism via conduction-band electron (CBE) and valence-band electron (VBE) tunneling in thin oxides. An improved SILC model that is able to reproduce the experimental SILC over a wide range of oxide fields, and yet give a realistic level of extracted neutral trap concentration, is proposed. Calculations performed with the improved SILC model suggest that SILC conduction via neutral traps is accompanied by energy relaxation (i.e., an inelastic mechanism), irrespective of the origin (i.e., whether CBE or VBE) of the tunneling species. For both CBE and VBE tunneling, inelastic tunneling with energy relaxation (Erelax) of 1.5 and 0.8 eV, was found to fit the experimental measurements well. These values of Erelax agree with those reported in the literature.

A recombination- and trap-assisted tunneling model for stress-induced leakage current

Charge-loss effects in device dielectric strongly limit the reliability of non-volatile memory cells. The explanation of the leakage mechanisms is therefore an essential condition for the establishment of scaled and reliable technology for data storage. This paper concerns with the physical interpretation of the stress-induced leakage current (SILC), based on both experimental and computational investigations on MOS capacitor structures. It is found that: (a) the leakage is partly due to electron–hole recombination mechanisms in the bulk oxide, (b) defect levels acting as recombination- and trap-assisted tunneling (RTAT) sites are located at deep energy levels in the SiO2 and (c) the SILC characteristics of thin oxide (tox<8.5 nm) MOS samples can be very well reproduced by a numerical model featuring RTAT as the leading mechanism of the leakage. As a result, the oxide-degradation effects can be monitored by the new numerical tool.