Stop Bits Research Articles

Universal Asyncronous Receiver Transmitter

Abstract: This project focuses on the Verilog-based design and implementation of a Universal Asynchronous ReceiverTransmitter (UART) communication module. The UART is a fundamental component in digital systems, facilitating serial data transmission between devices. Our objective is to develop a robust and efficient Verilog description of the UART module, emphasizing simplicity, modularity, and ease of integration. The baud rate generator allows for flexible communication speeds, accommodating diverse applications. The module ensures accurate framing of transmitted and received data through the proper generation of start and stop bits. Error-detection mechanisms are implemented to enhance data integrity. The project enhances the digital design field by delivering a Verilog implementation of a UART communication module that is both dependable and efficient.

Design, refinement, and enhancement of FPGA-implemented UART circuitry

This article provides an overview of the universal asynchronous receiver/transmitter, commonly referred to as Universal Asynchronous Receiver/Transmitter (UART). The UART stands as a noteworthy exemplar of a serial communication protocol, facilitating the exchange of data within a serial connection while accommodating full-duplex communication. The architecture of the UART hinges upon three principal constituents: the transmitter, the receiver, and the baud rate generator, the latter essentially a frequency divider. Each of these elements is meticulously crafted using the Verilog hardware description language, thereby ensuring distinct and efficient design. Furthermore, this discourse delves into refined iterations of these implementations. For instance, it introduces the concept of a baud rate self-adaptive function and expounds upon multibyte transmission techniques. In a concerted effort to streamline circuit design and curtail the electro circuit's footprint, a deliberate decision is made to forgo the integration of a parity check module. Consequently, the chosen data format is the widely adopted 8N1 (8 data bits, 1 stop bit and no parity bit) configuration.

Combustion behavior of electrically controlled solid propellant with tungsten additive

In recent times, there is a growing interest in utilizing the controllable solid propellant combustion that facilitates multiple start and stop bits of the electrically controlled solid propellant (ECSP) combustion at will. This paper is an attempt to understand the effect of tungsten metal additive in the ECSP. The tungsten metal powder (1 μm size) is blended with the lithium perchlorate (LP) and polyvinyl alcohol (PVA) along with other ingredients. LP and PVA form the baseline composition, and metal content is added between 5 and 15% by weight. Thermal analysis of the ECSP samples were conducted at 5 °C/min utilizing differential scanning calorimetry (DSC) and thermogravimetry (TGA) in the temperature range of 30 °C–600 °C, and the results showed that the dominant exothermic peaks occur around 260 °C. High speed imaging facilitates in understanding the combustion characteristics of the ECSP samples. The ignition is achieved by applying 300 V DC supply across the molybdenum electrodes. ECSP combustion can be divided into two distinct phases of burning that can be designated as the transient burning and the steady phase burning. It is found that the burning rate was 38.2% faster for 15%-metalized ECSP than 5%-metalized. In addition, multi-wavelength pyrometry was used to obtain the average flame temperature, and it was observed that the flame temperature was 9% lower for 15%-metalized than 5%-metalized. Hence, this study enunciates the burning characteristics of tungsten based ECSP and helps in realizing the potential use of tungsten as a metal additive in the ECSP for micro thrust generation.

공중 폭발 탄에 탄속 및 거리정보를 입력하기 위한 전자석 Yoke의 자기장 해석

원하는 거리에서 공중에서 탄을 폭발시키는 방법(ABM: Air Busting Munition)이 개발되고 있다. 이 방식은 원하는 표적만을 정밀 타격할 수 있는 능력을 확보하는 것으로 전장에서 건물, 참호 등과 같은 엄폐물에 차폐된 표적을 효과적으로 제압하기 위한 수단이다. 또한 공중에 있는 표적도 높은 확률로 제압할 수 있어서 최근에는 드론의 공격을 막는 방법으로도 ABM 기술이 개발되고 있다. 본 연구에서는 탄이 총구를 지나갈 때 공중폭발탄에 탄속과 폭발시키려는 목표물의 거리 정보를 탄에 입력하는 방식을 선택하였다. 총구에 여러 개의 전자석 yoke 장치를 이용하여 직렬통신 방식으로 정보를 입력하는 방식을 고안하였다. 직렬통신방법으로 start bit, stop bit, data bit 및 parity bit를 탄에 입력하면, 탄에 장착된 M CU가 start bit과 stop bit 사이의 시간을 측정하고 두 yoke사이의 간격으로 부터 탄의 총구 속도를 계산하여, data bit로부터 얻은 거리정보와 계산된 탄속 정보로 탄의 기폭시간을 설정하는 방식을 택하였다. 이 방식의 구현 가능성을 확인하기 위하여 F EM 시뮬레이션을 수행하였다. Yoke의 크기는 25mm 탄에 적합한 크기를 설정하였으며, yoke의 폭이 6 mm, yoke 사이의 간격이 4mm인 경우, yoke의 자극면에서 1 mm 거리에서 자기장을 측정할 경우 탄에 digital bit 정보를 잘 입력할 수 있음을 확인할 수 있었다.

Study of data and power transmission based on frequency-shift modulation in wireless charging

To ensure the reliability of the Wireless Power Transfer (WPT), the simultaneous wireless power and data transmission technology has gained more attention to realize real-time information exchange between the transmitter and receiver sides. In this paper, the shared channel technology and 2FSK modulation method are proposed to accomplish data and power transmission simultaneously. The theoretical analysis of the series-series compensation network is established, and the data modulation method through frequency-shifted modulation is analyzed. In order to reduce the bit error rate of transmitted data, a communication data format containing start and stop bits is proposed in this proposed system. Finally, an experimental prototype is constructed to validate the correctness and effectiveness of the proposed design and approach.

Reconfigurable wrapper architecture for UART CORE testing using FSM approach

The UART is a device used for communication of data either in asynchronous or synchronous mode. Nowadays, more number of designers introduces UART as a system on chip for various purposes. These UART SoC cores are to be checked on the basis of its compatibility and performance and a complete study is advisable. For this purpose, a reusable and reconfigurable wrapper architecture is designed, which is based on a finite machine called the wrapper finite state machine WFSM in Verilog and its baud rate as well as frame bit rate is computed. This WFSM monitors and verifies bit rate, packet transmission with single stop bit and two stop bits, with and without parity bits, distance coverage, frame transmission time, junk handling, utilisation of CUP, utilisation of power by UART with wrapper in FPGA are studied at different baud rates. It is designed and implemented in Quarters II in CyclonII DEI FPGA with the help of Zero-Plus logic analyzer.

Cortex-M 계열 프로세서를 이용한 가시광 통신의 VPPM 구현

Visible light communication (VLC) is a short range optical communication technology using light emitting diodes. In this paper, we implement variable pulse position modulation (VPPM) defined in the IEEE 802.15.7 standard with a Cortex-M processor, which is a new modulation scheme for VLC providing a dimming control mechanism for flicker-free optical communication. The synchronization procedure between the transmitter and receiver is not defined clearly in the VPPM standard. In order to synchronize the transmitter and receiver easily, two overhead bits are used including one start bit and one stop bit modulated by on-off keying (OOK). Experimental results under various environmental conditions show that the proposed VPPM can support a seamless 100 Kbps data rate with 10 levels in the dimming control.

Packet switching start–stop bits generation based on bifurcation behavior of light in a micro ring resonator

This paper proposes the interesting nonlinear behavior of light known as bifurcation, where the use of such behavior in a micro ring resonator to form the secure digital codes for optical packet switching application is demonstrated. A new concept of the stop–start bits in an optical packet switching protocol is formed by using the bifurcation codes. Bifurcation is introduced when light is input into a nonlinear micro ring device, where the refractive index of an InGaAsP/InP is one of device parameters. The other parameters of the device are coupling coefficient ( K) and the ring radius ( R), where the ring radii used are ranged from 5 to 10 μm. Simulation results obtained have shown that the packet switching data can be secured by using the generated start–stop bits as the secured codes.

Systems Engineering Principles and Applications for the Design of a Whole-Farm Information System

The integration of agricultural research results into information management and information transfer technologies can aid agricultural practitioners and farm managers in understanding complex interactions among farming systems components, and in improving whole-farm resource management. Systems approaches discussed in agricultural literature can be classified as being science-driven or technology-driven. Although specific objectives associated with these approaches may be fundamentally different, they share many similar principles. Our main objectives are to identify the common principles of several different systems design and development approaches, and to discuss how we applied these principles to develop the farm management information system entitled Farmbook [...]

COMPUTER-BASED INFORMATION TRANSFER FOR AGRICULTURE IN HAWAII

AgNet-Hawaii is a computer-based information transfer system (CBIS) established at the Beaumont Agricultural Research Center in Hilo, Hawaii to improve communication among research, extension and farmers on the island of Hawaii and with the island of Oahu. AgNet-Hawaii is one node of a Pacific-wide network of CBIS nodes, whose hub is the Coconut Telegraph CBIS on the Manoa Campus of the University of Hawaii on Oahu. AgNet-Hawaii has file and conference areas, the capability of uploading and downloading files, issuing bulletins, and sending files attached to messages. Access is by computer and modem with the following modem protocols: Telephone (808) 969-3025 (AgNet-Hawaii), (808) 956-2626 (Coconut Telegraph), Data Bits: 8, Parity: N, Stop Bits: 1, Speed: 300/1200/2400/9600/14.4K bps.

Electrical

Up to four independent programmable power sources can be controlled via the PC4400B power controller claims Powerbox, the international power conversion specialists who have recently established their UK base in Andover. Suitable as either a stand alone bench top unit or rack mounted in a standard 3U half width Eurorack the PC4400B incorporates a fullimplementation of the IEE 488/IEC 625 parallel interface with both talker and listener functions and parallel/serial polling. Output of the bus drivers are open collectors with pulse rate capability up to 100 kHz. The various address and interface functions are selected on a rear panel DIL switch with clearly marked standard IEC 625 (GPIB) legends. Alternatively the PC4400B can be supplied with a standard RS232/V24 serial communications interface with selectable baud ratesfrom 50 to 19200 bauds and full duplex operation. A rear panel DIL switch enables simple selection of baud rate, word length, polarity and stop bits.

Communication between the PC and laboratory instruments

In this paper we describe communications between a personal computer and any instrument with a serial port for the purpose of collecting data or controlling equipment and a program for performing this task. From a user-defined file, the software reads the communication parameters: baud rate, data bits, stop bits and parity. The communication protocol is also read: echo, acknowledge and end-of-transmission characters. The software can be used to determine the protocol, to check the integrity of the communications, and can form the basis of a program for more specific applications.

Instructions for Using the A. A. T. S. P. Electronic Bulletin Board

In the March 1987 issue of Hispania, Christopher Davison reported the results of the first efforts to establish an electronic bulletin board for the American Association of Teachers of Spanish and Portuguese. Building upon these efforts, an electronic bulletin board now exists on the University of Toledo's VAX 11/785 mini-computer and is available for anyone to use twenty-four hours a day, seven days a week. You are cordially invited to do so. The following information will help you get started. In addition to your computer, you will need a modem (a device that translates the computer's electronic signals into sounds that can be transmitted over the telephone lines), and a communications program (software capable of generating and interpreting those sounds). Some of the more popular programs are ASCII Express, Softerm, Apple Access II (Apple IIe), CrossTalk, Hayes Smartcom, PC Talk, ProComm (IBM family), MacTerminal, Red Ryder Hayes Smartcom II, and Microphone (Macintosh). For additional information, you may wish to consult Howard Cohen's article Telecommunications and the Foreign Language Teacher in the May, 1986 issue of Hispania. The A.A.T.S.P. Electronic Bulletin Board is designed to allow several people access at the same time, so there should be no problems with busy signals when you dial in. You can use virtually any microcomputer, modem and communications program, provided you follow the appropriate protocols, e.g., the baud rate, the number of data and stop bits, the parity, and the duplex. Although these terms might seem complicated to the computer novice, their technical definitions are unnecessary: they are simply settings which determine the manner and speed with which information flows through the phone lines from one computer to another. In order to connect to the bulletin board, you should set your communications program as follows: * 300, 1200 or 2400 baud; * 7 data bits; * 1 stop bit; * space parity; * full duplex.

An error-controlling device for HF channels

Practical biprocessor error-controling equipment (ECE) realised by the INTEL 8085 micro-processors has been demonstrated. Several shorter BCH codes for correction of 1 to 3 errors (codeword length is less or equal to 15) are chosen. The look-up table method both for the encoding and for the decoding is used. The ECE is intended for use on simplex, half and full duplex channels for the transmission rates of 50–9600 b/s, so both forward error correction and hybrid techniques are implemented. Variable modes of operation such as synchronous and asynchronous transmission with variable stop bit length, different character lengths with or without parity control, different transmission rates can be easily chosen by the switches on the front panel.

HTERM/CIM and HTERM/BAS: “Smart” terminal enabling programs for the TRS-80 microcomputer

HTERM/CIM and HTERM/BAS: “Smart” terminal enabling programs for the TRS-80 microcomputer

An Efficient Technique for Transmitting Data Serially from a High-Speed Tape Reader to a Microcomputer

A technique is proposed for an efficient two-way serial communication between a high-speed tape reader and a microcomputer. This technique makes use of the time slot allocated to the second STOP bit of each transmitted character to send back to the reader on the data line start-stop commands as well as a retransmission command in case a parity error is detected.

New Light Link System for High Voltage Terminal

A new light link system has been running to control the ion source more than 2,500 hours without trouble at the 750 kV preinjector. It has two optical fiber cables and two microprocessors (CPU's). Triggering pulses and control signals are sent serially through one optical fiber cable to the high voltage terminal. Analog parameters of the ion sources are converted to digital data and sent through the other cable from the high voltage terminal. Pre-arc pulses, which synchronize with the booster synchrotron of 20 pps, start cycles of data transfer. To avoid jitter, the arc trigger pulses are not processed in the CPU's, which only regulate gates for the pulses. A word of the control signal consists of 10 bits, a start bit, 8 bit data and a stop bit. The light link is checked in every cycle. When error is detected, then the control signals are not delivered to the ion source and the error is indicated at the control desk. Since the error is mainly caused by noise due to breakdown in the accelerating column, the program does not stall and the next pre-arc pulse starts the data transfer again.