Solder Paste Stencil Printing Research Articles

Effect of alloy particle size and stencil aperture shape on solder printing quality

PurposeReflow solder joint quality is significantly affected by the ability of the solder to perfectly fill pad space and retain good solder joint shape. This study aims to investigate solder joint quality by quantitatively analyzing the stencil printing-deposited solder volume, solder height and solder coverage area.Design/methodology/approachThe dispensability of different solder paste types on printed circuit board (PCB) pads using different stencil aperture shapes was evaluated. Lead-free Type 4 (20–38 µm particle size) and Type 5 (15–25 µm particle size) solder pastes were used to create solder joints according to standard reflow soldering.FindingsThe results show that the stencil aperture shape greatly affects the solder joint quality as compared with the type of solder paste. These investigations allow the development of new strategies for solving solder paste stencil printing issues and evaluating the quality of solder joints.Originality/valueThe reflow soldering process requires the appropriate selection of the stencil aperture shape according to the PCB and the solder paste according to the particle-size distribution of the solder alloy powder. However, there are scarce studies on the effects of stencil aperture shape and the solder alloy particle size on the solder paste space-filling ability.

Predictive model of the solder paste stencil printing process by response surface methodology

PurposeThis paper aims to establish the predictive equations of height, area and volume of printed solder paste during solder paste stencil printing (SPSP) process in surface mount technology (SMT) to better understand the effect of process parameters on the printing quality.Design/methodology/approachAn experiment plan is proposed based on the response surface method (RSM). Experiments with 30 different combinations of process parameters are performed using a solder paste printer. After printing, the volume, area and height of the printed SAC105 solder paste are measured by a solder paste inspection machine. Using RSM, the predictive equations associated with the printing parameters and the printing quality of the solder paste are formed.FindingsThe optimal printing parameters are 175.08 N printing pressure, 250 mm/s printing speed, 0.1 mm snap-off height and 15.7 mm/s stencil snap-off speed if the target height of solder paste is 100 µm. As the target printing area of solder paste is 1.1 mm × 1.3 mm, the optimized values of the printing parameters are 140.29 N, 100.52 mm/s, 0.63 mm and 20.25 mm/s. When both the target printing height and area are optimized together, the optimal values for the four parameters are 86.67 N, 225.76 mm/s, 0.15 mm and 1.82 mm/s.Originality/valueA simple RSM-based experimental method is proposed to formulate the predictive polynomial equations for height, area and volume of printed solder paste in terms of important SPSP parameters. The predictive equation model can be applied to the actual SPSP process, allowing engineers to quickly predict the best printing parameters during parameter setting to improve production efficiency and quality.

Recurrent Neural Network-Based Stencil Cleaning Cycle Predictive Modeling

This paper presents a real-time predictive approach to improve solder paste stencil printing cycle decision making process in surface mount assembly lines. Stencil cleaning is a critical process that influences the quality and efficiency of printing circuit board. Stencil cleaning operation depends on various process variables, such as printing speed, printing pressure, and aperture shape. The objective of this research is to help efficiently decide stencil printing cleaning cycle by applying data-driven predictive methods. To predict the printed circuit board quality level, a recurrent neural network (RNN) is applied to obtain the printing performance for the different cleaning aging. In the prediction model, not only the previous printing performance statuses are included, but also the printing settings are used to enhance the RNN learning. The model is tested using data collected from an actual solder paste stencil printing line. Based on the predicted printing performance level, the model can help automatically identify the possible cleaning cycle in practice. The results indicate that the proposed model architecture can predictively provide accurate solder paste printing process information to decision makers and increase the quality of the stencil printing process.

Robust parameter design for the micro-BGA stencil printing process using a fuzzy logic-based Taguchi method

Solder paste is the main soldering material used to form strong solder joints between printed circuit boards (PCB) and surface mount devices in the surface mount assembly (SMA). On average 60% of end-of-line soldering defects can be attributed to inadequate performance of solder paste stencil printing. Recently, lead-free solder paste has been adopted by electronics manufacturers in compliance with the RoHS directive. However, soldering defects in the ball grid array (BGA) packages used in lead-free SMA have become more prevalent and are difficult to detect. In this study, a fuzzy logic-based Taguchi method is proposed to optimize the fine-pitch stencil printing process with multiple quality characteristics for the micro ball grid array (micro-BGA) packages using a lead-free solder paste. A structured data set is first collected from an L18 (21×37) fractional factorial design experiment, followed by multi-response optimizations and analysis of variance (ANOVA) for identifying significant factors. The optimization performance gained by the proposed fuzzy logic-based Taguchi method is compared with the results of other two hybrid methods including a combination of neural networks and genetic algorithms, and the integration of the response surface methodology with a desirability function. The confirmation experiments show that the proposed fuzzy logic-based Taguchi method outperforms the other two methods in terms of the signal-to-noise ratios and process capability index.

Statistical analysis of stencil technology for wafer-level bumping

Purpose – Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 μm pitch using three different stencil manufacturing technologies: laser cutting, DC electroforming and micro-engineered electroforming. This investigation looks at stencil differences in printability, pitch resolution, maximum achievable bump height, print co-planarity, paste release efficiency, and cleaning frequency. The paper aims to discuss these issues. Design/methodology/approach – In this paper, the authors present a statistical evaluation of the impact of stencil technology on type-6 tin-silver-copper paste printing. The authors concentrate on performances at 200 and 150 μm pitch of full array patterns. Key evaluated criteria include achievable reflowed bump heights, deposit co-planarity, paste release efficiency, and frequency of stencil cleaning. Box plots were used to graphically view print performance over a range of aperture sizes for the three stencil types. Findings – Fabrication technologies significantly affect print performance where the micro-engineered electroformed stencil produced the highest bump deposits and the lowest bump height deviation. Second in performance was the conventional electroformed, followed by the laser-cut stencil. Comparisons between the first and fifth consecutive print demonstrated no need for stencil cleaning in the case for the micro-engineered stencil for all but the smallest spacings between apertures. High paste transfer efficiencies, i.e. above 85 per cent, were achieved with the micro-engineered stencil using low aperture area ratios of 0.5. Originality/value – Stencil technology influences the maximum reflowed solder bump heights achievable, and bump co-planarity. To date, no statistical analysis comparing the impact of stencil technology for wafer-level bumping has been carried out for pitches of 200 μm and below. This paper gives new insight into how stencil technology impacts the print performance for fine pitch stencil printing. The volume of data collected for this investigation enabled detailed insight into the limitations of the printing process and as a result for suitable design guidelines to be developed. The finding also shows that the accepted industry guidelines on stencil design developed by the surface mount industry can be broken if the correct stencil technology is selected, thereby increasing the potential application areas of stencil printing.

The behaviour of solder pastes in stencil printing with electropolishing process

PurposeThe purpose of this paper is to study the effect of the electropolishing time of stencil manufacturing parameters and solder‐mask definition methods of PCB pad design parameters on the performance of solder paste stencil printing process for the assembly of 01005 chip components.Design/methodology/approachDuring the study, two types of stencils were manufactured for the evaluations: electroformed stencils and electropolished laser‐cut stencils. The electroformed stencils were manufactured using the standard electroforming process and their use in the paste printing process was compared against the use of an electropolished laser‐cut stencil. The electropolishing performance of the laser‐cut stencil was evaluated twice at the following intervals: 100 s and 200 s. The performance of the laser‐cut stencil was also evaluated without electropolishing. An optimized process was established after the polished stencil apertures of the laser‐cut stencil were inspected. The performance evaluations were made by visually inspecting the quality of the post‐surface finishing for the aperture wall and the quality of that post‐surface finishing was further checked using a scanning electron microscope. A test board was used in a series of designed experiments to evaluate the solder paste printing process.FindingsThe results demonstrated that the length of the electropolishing time had a significant effect on the small stencil's aperture quality and the solder paste's stencil printing performance. In this study, the most effective electropolishing time was 100 s for a stencil thickness of 0.08 mm. The deposited solder paste thickness was significantly better for the enhanced laser‐cut stencil with electropolishing compared to the conventional electroformed stencils. In this printing‐focused work, print paste thickness measurements were also found to vary across different solder‐mask definition methods of printed circuit board pad designs with no change in the size of the stencil aperture. The highest paste value transfer consistently occurred with solder‐mask‐defined pads, when an electropolished laser‐cut stencil was used.Originality/valueDue to important improvements in the quality of the electropolished laser‐cut stencil, and based on the results of this experiment, the electropolished laser‐cut stencil is strongly recommended for the solder paste printing of fine‐pitch and miniature components, especially in comparison to the typical laser‐cut stencil. The advantages of implementing a 01005 chip component mass production assembly process include excellent solder paste release, increased solder volume, good manufacture‐ability, fast turnaround time, and greater cost saving opportunities.

Developments in Stencil Printing Technology for 0.3mm Pitch CSP Assembly

As electronics assemblies continue to shrink in form factor, forcing designers towards smaller components with decreasing pitches, the Surface Mount assembly process is becoming increasingly challenged. A new “active” squeegee printing process has been developed to assist in the stencil printing of solder pastes for next generation ultra fine pitch components such as 0.3mm pitch CSP’s. Results indicate that today’s accepted stencil area ratio rules, which govern solder paste transfer efficiency can be significantly pushed to extend stencil printing process capabilities to stencil apertures having area ratios as low as 0.4. Such a breakthrough will allow the printing of ultra fine pitch components and additionally will assist with heterogeneous assembly concerns, to satisfy up and coming mixed technology demands.

Mask and mask-less injection molded solder (IMS) technology for fine pitch substrate bumping

We report the results of a new pre-solder bumping technology of injection molded solder (IMS) for fine pitch organic substrates. Pure molten solder is injected through a reusable film mask (mask IMS) or directly injected without a mask (mask-less IMS) on the pads of an organic substrate to overcome the limitation of current pre-solder bumping technologies such as solder paste stencil printing and micro-ball mounting. In the case of mask IMS, targeted solder height over the solder resist (SR) is designed into the mask which has desirable thickness and hole sizes. Three different solder bump heights such as 30, 50, and 70 microns over SR were demonstrated for commercial organic substrates which have a pitch of 150 μm for 5,000 area array pads. To show the extendibility of the mask IMS bumping method to very fine pitch applications, 100 μm pitch bumping of 10,000 pads and 80 μm pitch bumping of 15,000 pads were demonstrated. In mask-less IMS, the pure molten solder is directly filled into the opening volume of the SR. After the injection of molten solder, solidification of the solder under low oxygen leads to solder protrusions above the SR surface because 100 % pure solder is filled into the whole SR opening volume. For a 150 μm pitch commercial substrate, we demonstrated minimum bump heights of 15 μm over the 20 μm thick SR. Since there is no need to align mask and substrate, the maskless IMS method lowers process costs and makes the process more reliable. By manipulating the opening in the SR, it is possible to enable variations in the height of the solder bumps. Flux or formic acid is not needed during solder injection of both described processes, but a low oxygen environment must be maintained. In this paper, we will discuss laboratory scale processes and bump inspection data, along with the discussion of manufacturing strategies for IMS solder bumping technology for fine pitch organic substrates.

Finding and optimising the key factors for the multiple-response manufacturing process

With the advent of modern technology, manufacturing processes became so sophisticated that a single quality characteristic cannot reflect the true product quality. Thus, it is essential to perform the key factor analysis for the manufacturing process with multiple-input (factors) and multiple-output (responses). In this paper, an integrated approach of using the desirability function in conjunction with the Mahalanobis-Taguchi-Gram Schmit (MTGS) system is proposed in order to find and optimise the key factors for a multiple-response manufacturing process. The aim of using the MTGS method is to standardise and orthogonalise the multiple responses so that the Mahalanobis distance for each run can be calculated and the multi-normal assumption for the correlated responses can be relaxed. A realistic example of the solder paste stencil printing process is then used to demonstrate the usefulness of our proposed approach in a practical application.

Modeling and optimization of stencil printing operations: A comparison study

This paper presents a comparison study for the optimization of stencil printing operations using hybrid intelligence technique and response surface methodology (RSM). An average 60% of soldering defects are attributed to solder paste stencil printing process in surface mount assembly (SMA). The manufacturing costs decrease with increasing first-pass yield in the stencil printing process. This study compares two hybrid intelligence approaches with RSM as methods of solving the stencil printing optimization problem that involves multiple performance characteristics. The optimization process is threefold. A data set obtained from an experimental design following data preprocessing process provides an accurate data source for RSM study and training neural networks to formulate the nonlinear model of the stencil printing process with/without combining multiple performance characteristics into a single desirability value, followed by a genetic algorithm searching the trained neural networks for obtaining the optimal parameter sets. The empirical defect-per-million-opportunities (DPMO) measurements demonstrate that the two hybrid intelligence methods can provide satisfactory performance for stencil printing optimization problem.

Ultra-Fine Pitch Stencil Printing for a Low Cost and Low Temperature Flip-Chip Assembly Process

This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process

A KNOWLEDGE-BASED SYSTEM FOR STENCIL PRINTING PROCESS PLANNING AND CONTROL

ABSTRACT Surface mount technology (SMT) is one of the most important developments in electronic industry. A surface mount assembly (SMA) has three consecutive manufacturing steps: solder paste stencil printing, component placement, and solder reflow. Stencil printing process (SPP) involves highly operation complexity and has multiple quality characteristics, and averagely accounts for 60% of soldering defects in SMA. This work presents a knowledge-based system for SPP planning and control to upgrade soldering quality level and system performance. A hybrid data set contains a 38-3 experimental design and statistical process control (SPC) records was collected firstly, and followed by data processing for removing conflicted, inconsistent, and redundant samples through a fuzzycluster algorithm. The output columns of the clustered data were then transformed using fuzzy quality loss function (FQLF) with respect to the dissatisfaction of printing performance. The neuro-fuzzy technique was adapted to model and learn SPP knowledge from the transformed data set into a SPP knowledge base. Finally, a GUI man-machine interface was developed to help engineers in predicting responses and evaluating the overall SPP performance. The empirical evaluations of soldering quality and productivity demonstrate the effectiveness and efficiency of this proposed system.

Evaluation of displacement rate effect in shear test of Sn–3Ag–0.5Cu solder bump for flip chip application

An experimental investigation was combined with a non-linear finite element analysis using an elastic–viscoplastic constitutive model to study the effect of ball shear speed on the shear forces of flip chip solder bumps. A solder composition used in this study was Sn–3mass%Ag–0.5mass%Cu. A low cost bumping process has been employed using electroless Ni and immersion Au followed by solder paste stencil printing. A thin layer of intermetallic compound, (Ni 1− x Cu x ) 3Sn 4, was formed by the reaction between the solder and electroless Ni with a thickness of about 1.4 μm, while some discontinuous (Cu 1− y Ni y ) 6Sn 5 particles were also formed at the interface. The compositions of the resulting compounds were identified using energy dispersive spectrometer (EDS) and electron microprobe analysis (EPMA). Shear tests were carried out over a shear speed range from 20 to 400 μm/s at a shear ram height of 20 μm. The shear force was observed to linearly increase with shear speed and reach the maximum value at the fastest shear speed in both experimental and computational results. The optimum shear speeds for the shear test of solder bumped flip chip were recommended to be not exceeding 200 μm/s. The failure mechanisms were discussed in terms of von Mises stresses and plastic strain energy density distributions.

A neural network-based prediction model for fine pitch stencil-printing quality in surface mount assembly

The soldering problems in surface mount assembly can represent considerable production cost increases and yield loss. About 60% of the soldering defect problems can be attributed to the solder paste stencil printing process. This paper proposes to solve a solder-paste stencil-printing quality problem by a neural network approach. Employment of a neuro-computing approach allows multiple inputs to the generation of multiple outputs. In this study, the inputs are composed of eight important factors in modeling the nonlinear behavior of the stencil-printing process for predicting deposited paste volumes. A 3 8-3 fractional factorial experimental design is conducted to efficiently collect structured data used for neural network training and testing. The results show that the proposed neural-network model is effective in solving a practical application.

A neurofuzzy-based quality-control system for fine pitch stencil printing process in surface mount assembly

Surface mount assembly defect problems can cause significant production-time losses. About 60% of surface mount assembly defects can be attributed to the solder paste stencil printing process. This paper proposes a neurofuzzy-based quality-control system for the fine pitch stencil printing process. The neurofuzzy approach is used to model the nonlinear behavior of the stencil printing process. Eight control variables are defined for process planning and control, including stencil thickness, component pitch, aperture area, snap-off height, squeegee speed, squeegee pressure, solder paste viscosity, and solder paste particle size. The response variables are the volume and height of solder paste deposited. The values of the response variables provide indicators for identifying potential quality problems. A 38–3 fractional factorial experimental design is conducted to collect structured data to augment those collected from the production line for neurofuzzy learning and modeling. Visual basic programming language is then used for both rule retrieval and graphical-user-interface modeling. The effectiveness of the proposed system is illustrated through a real-world application.

Critical Variables of Solder Paste Stencil Printing for Micro-BGA and Fine-Pitch QFP

Stencil printing continues to be the dominant method of solder deposition in high-volume surface-mount assembly. Control of the amount of solder paste deposited is critical in the case of fine-pitch and ultrafine-pitch surface-mount assembly. The process is still not well understood as indicated by the fact that industry reports 52-71% surface-mount technology (SMT) defects are related to the solder paste stencil printing process. The purpose of this paper is to identify the critical variables that influence the volume, area, and height of solder paste deposited. An experiment was conducted to investigate the effects of relevant process parameters on the amount of solder paste deposited for ball grid arrays (BGAs) and quad flat packages (QFPs) of five different pitches ranging from 0.76 mm (30 mil) to 0.3 mm (12 mil). The effects of aperture size, aperture shape, board finish, stencil thickness, solder type, and print speed were examined. The deposited solder paste was measured by an inline fully automatic laser-based three-dimensional (3-D) triangulation solder paste inspection system. Analysis of variance (ANOVA) shows that aperture size and stencil thickness are the two most critical variables. A linear relationship between transfer ratio (defined as the ratio of the deposited paste volume to the stencil aperture volume) and area ratio (defined as the ratio of the area of the aperture opening to the area of the aperture wall) is proposed. The analysis indicates that the selection of a proper stencil thickness is the key to controlling the amount of solder paste deposited, and that the selection of maximum stencil thickness should be based on the area ratio. The experimental results are shown to be consistent with a theoretical model, which are also described.

Critical factors affecting paste flow during the stencil printing of solder paste

The paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on the printing performance. As the current product miniaturisation trend continues, area array type package solutions are now being designed into products. The assembly of these devices requires the printing of very small solder paste deposits. The printing of solder pastes through small stencil apertures typically results in stencil clogging and incomplete transfer of paste to the PCB pads. At the very narrow aperture sizes required for flip‐chip applications, the paste rheology becomes crucial for consistent paste withdrawal. This is because, for smaller paste volumes, surface tension effects become dominant over viscous flow. Proper understanding of the effect of the key material, equipment and process parameters, and their interactions, is crucial for achieving high print yields. During the aperture filling and emptying sub‐process, the solder paste experiences forces/stresses as it interacts with the stencil aperture walls and the pad surfaces, which directly impact the paste flow within the apertures. As the substrate and stencil separate, the frictional/adhesive force on the stencil walls competes directly with the adhesives/pull force on the PCB pads, often resulting in incomplete paste transfer or skipping/clogged apertures. In this paper, we investigate the effect of stencil design on the printing process and in particular the effect on paste transfer efficiency.

The rheological properties of solder and solar pastes and the effect on stencil printing

Solar and solder pastes are widely used in the electronics industry. Solder paste is the principal joining medium in the assembly of surface mount components, whilst solar paste is used in the manufacture of semiconductor solar cells in the photo-voltaic industry. The stencil printing of both solder and solar pastes is a very important and critical stage in the assembly process. With miniaturisation of components, this is likely to continue. The challenge in stencil printing at such dimensions is in achieving repeatable deposition of both solar and solder pastes from print to print. To meet this challenge requires an understanding of the flow behaviour of both solar and solder pastes. The rheological properties of solar and solder pastes have been evaluated through three different types of experiments. Existing models were applied to compare their rheological behaviour under these schemes. One striking difference was that solar paste showed a higher viscosity than solder paste. Both solar and solder pastes were found to be non-Newtonian materials, showing a decrease in viscosity with increasing shear rates. In this paper we investigate the rheological properties of both solder and solar paste under steady shear and creep-recovery tests.

Monitoring the effects of storage on the rheological properties of solder paste

Solder paste is widely used as a bonding medium for surface mount assemblies in the electronics industry. The stencil printing of solder paste is a potentially low cost method of depositing solder paste onto printed circuit boards. It is very important to use the right paste, as a high proportion of all surface mount assemblies defects are related to the printing process. This is likely to continue with the drive to further miniaturization and the implementation of die-size devices. One of the key factors affecting solder paste print quality is its rheology. The rheological properties such as viscosity of solder paste are dependent on its “history” (i.e. paste storage). Key factors that influence solder paste viscosity have been identified over the years. In this paper, we examine the effects that storing solder paste at two different temperature and humidity conditions has on its rheological properties. Viscosity measurements at different storage intervals reveal about 60% increase for samples kept at room temperature conditions after 5 months. A model of the change in viscosity at both storage conditions is also presented. From this model, the shelf life of the solder paste can be determined. This model can also be used during quality control.

Analysis of Solder Paste Release in Fine Pitch Stencil Printing Processes

Advanced electronics packaging technologies such as chip scale packages, fine pitch ball grid arrays, and flip chip are pushing solder paste stencil printing to the limit. In order to achieve solder print deposits of the sizes required for emerging electronic packaging technology, a rigorous understanding of the process is required. This paper seeks to expand our understanding of the physical characteristics of stencil printing specifically focusing on the solder paste release process based on experimental and analytical approaches. First, designed experiments were conducted to identify the main process variables affecting final print quality. An in-situ measurement system using a high speed imaging system monitored the solder paste release process. Based on experimental observations, different modes of solder paste release and their corresponding mechanisms were identified. A model was developed to predict print quality for fine pitch applications. The proposed model was experimentally verified showing good agreement with measured values for fine pitch and very fine pitch printing. It was found that the cohesive and adhesive forces acting on the paste tend to govern the release process rather than the viscous and inertial forces.