Standard Gate Research Articles

A computational approach to optimize the linearity in dual-gate InAlGaN/AlN/GaN HEMTs

Abstract This paper investigates the effect of the proposed dual gate structures in enhancing the linearity of InAlGaN/AlN/GaN high-electron-mobility transistors (HEMTs) using TCAD analysis. Through the comprehensive analysis of the dual gate structure with the additional gate placed between the gate-source (DG-GS) and gate-drain (DG-GD) regions, the impact on the linearity performance has been compared with that of a standard single gate (SG) structure. The dual gate configuration exhibits a flatter and broader transconductance (gm) profile than the single gate configuration. The reduction in the third-order intermodulation levels is confirmed with the polynomial fitting method. The fT/fmax of the DG-GS case is simulated to be 52/102 GHz, which shows that such configuration does not deteriorate the RF performance. Comprehensive simulations are carried out to study the device physics and assess the mechanism behind the linearity improvement. The large signal model has been developed to examine the large signal RF performance as well as linearity performance metrics. An improvement of 9.6 dB in the carrier-to-intermodulation (C/I) ratio and that of 2.4 degrees in the amplitude-to-phase modulation (AM-to-PM) at 6-dB backoff from Psat have been observed as compared to the SG configuration. Such characteristics have evidenced that the optimized dual-gate configuration with the second gate placed between the source and gate can effectively improve the linearity performance of the InAlGaN/AlN/GaN HEMT configurations.

Procedure for reducing cross-resonance gate errors using pulse-level control

Abstract Current implementations of superconducting qubits are often limited by the low fidelities of multiqubit gates. We present a reproducible and runtime-efficient pulse-level approach for calibrating an improved cross-resonance gate CR(θ) for arbitrary θ. This CR(θ) gate can be used to produce a wide range of other two-qubit gates via the application of standard single-qubit gates. By performing an interleaved randomised benchmarking sequence, we demonstrate that our approach leads to significantly lower incoherent errors than the circuit-level approach currently used by IBM. Hence, our procedure provides a genuine improvement for applications where noise remains a limiting factor.

Pseudo twirling mitigation of coherent errors in non-Clifford gates

The conventional circuit paradigm, utilizing a small set of gates to construct arbitrary quantum circuits, is hindered by significant noise. In the quantum Fourier transform, for instance, the standard gate paradigm employs two CNOT gates for the partial CPhase. In contrast, some quantum computers can directly implement such operations using their native interaction, resulting in less noisy gates. Unfortunately, coherent errors degrade the performance of these gates. In Clifford gates such as the CNOT, these errors can be addressed through randomized compiling (RC). However, RC does not apply to the non-Clifford multi-qubit native implementations described above. The present work introduces and experimentally demonstrates a technique called ‘Pseudo Twirling’ (PST) to address coherent errors. We demonstrate experimentally that integrating PST with the ‘Adaptive KIK’ quantum error mitigation method enables the simultaneous mitigation of noise and coherent errors in multi-qubit non-Clifford gates.

Ansatz optimization of the variational quantum eigensolver tested on the atomic Anderson model

We present a detailed analysis and optimization of the variational quantum algorithms required to find the ground state of a correlated electron model, using several types of variational ansatz. Specifically, we apply our approach to the atomic limit of the Anderson model, which is widely studied in condensed matter physics since it can simulate fundamental physical phenomena, ranging from magnetism to superconductivity. The method is developed by presenting efficient state preparation circuits that exhibit total spin, spin projection, particle number and time-reversal symmetries. These states contain the minimal number of variational parameters needed to fully span the appropriate symmetry subspace allowing to avoid irrelevant sectors of Hilbert space. Then, we show how to construct quantum circuits, providing explicit decomposition and gate count in terms of standard gate sets. We test these quantum algorithms looking at ideal quantum computer simulations as well as implementing quantum noisy simulations. We finally perform an accurate comparative analysis among the approaches implemented, highlighting their merits and shortcomings.

Study of MoN gate impact on GaN high electron mobility transistor

AbstractIn this letter, molybdenum nitride (MoN) gate AlGaN/GaN HEMT has been investigated with MoN developed in various physical vapour deposition (PVD) conditions. The Schottky gate is studied through forward and reverse characteristics with different processed MoN, which is compared with the standard Ni gate. Similar DC and radio frequency (RF) performances are obtained with MoN and Ni gate, while MoN demonstrated higher reliability than Ni gate through RF aging test.

Operational Markovianization in randomized benchmarking

A crucial task to obtain optimal and reliable quantum devices is to quantify their overall performance. The average fidelity of quantum gates is a particular figure of merit that can be estimated efficiently by randomized benchmarking (RB). However, the concept of gate-fidelity itself relies on the crucial assumption that noise behaves in a predictable, time-local, or so-called Markovian manner, whose breakdown can naturally become the leading source of errors as quantum devices scale in size and depth. We analytically show that error suppression techniques such as dynamical decoupling (DD) and Pauli-twirling can operationally Markovianize RB: (i) fast DD reduces non-Markovian RB to an exponential decay plus longer-time corrections, while on the other hand, (ii) Pauli-twirling generally does not affect the average, but (iii) it always suppresses the variance of such RB outputs. We demonstrate these effects numerically with a qubit noise model. Our results show that simple and efficient error suppression methods can simultaneously tame non-Markovian noise and allow for standard and reliable gate quality estimation, a fundamentally important task in the path toward fully functional quantum devices.

A 3-step method for preparing cryopreserved samples of apheresis products for post-thaw analysis yields a higher percentage of viable cells.

Standard flow cytometry protocols for CD34+ cell enumeration designed for fresh samples are not appropriate for cryopreserved products. Special protocols have been developed to remove the cryoprotectant by quickly washing a freshly thawed sample. Exposing cells to a large volume of hypotonic solution and subsequent washing process was hypothesized to cause lab-induced cell death. Moreover, standard gating strategies must be altered to avoid reporting falsely high viabilities. We developed a novel method whereby thawed samples were diluted step-wise to 1:2 by 3 additions of 1/3 sample volume using 1% Human Albumin in Dextran 40 (10% Low Molecular Weight Dextran in 0.9% NaCl) separated by 5 min between each addition. An additional 1:10 dilution was required to obtain a desired cell concentration for flow cytometry testing resulting in a 1:20 dilution. Twenty samples were tested simultaneously in a method comparison; the new method demonstrated significant increases in mean cell viabilities for white blood cells, hematopoietic progenitor cells, and T cells as well as reduced standard deviations for each parameter. Slow, step-wise dilutions of freshly thawed samples of cryopreserved apheresis products to 1:20 yielded higher and more precise viability measurements compared to quickly washing samples to remove DMSO.

Study on Resin-based 3D Printed Product for Spin Casting Mold Making

Spin casting (centrifugal rubber mold casting) is well known process to produce castings by utilizing inertia. A vulcanized rubber mold is typically used by spinning it at an optimum speed along its central axis. There are many factors influence the quality of casting product, including the quality of mold, the temperature of molten material, the speed and duration of rotation, as well as the pressure upon the mold. This research aims to investigate the quality of casting product when a resin-based 3D printing is utilized to make a model for vulcanized rubber mold. The model is designed by using CAD software and printed layer by layer by using Selective Laser Sintering (SLS) method. Curing process is employed in order to harden the model before placed in the disc-shape silicone rubber. The rubber is then vulcanized so that the mold is formed. Standard edge gate and straight runner are then made to let the molten material flow during casting process. Zinc alloy is used as raw material in the casting process with five variations of rotation speed. Based on the experiment results it is observed that the resin-based 3D printed product can be used as a master model in rubber mold making with some limitations. The resin could not maintain its shape due to the high temperature and pressure during vulcanization process. However, for simple design without any need of very small and detail features, the resin-based 3D printed product still can be used as an alternative.

Here comes the SU(N): multivariate quantum gates and gradients

Variational quantum algorithms use non-convex optimization methods to find the optimal parameters for a parametrized quantum circuit in order to solve a computational problem. The choice of the circuit ansatz, which consists of parameterized gates, is crucial to the success of these algorithms. Here, we propose a gate which fully parameterizes the special unitary group SU(N). This gate is generated by a sum of non-commuting operators, and we provide a method for calculating its gradient on quantum hardware. In addition, we provide a theorem for the computational complexity of calculating these gradients by using results from Lie algebra theory. In doing so, we further generalize previous parameter-shift methods. We show that the proposed gate and its optimization satisfy the quantum speed limit, resulting in geodesics on the unitary group. Finally, we give numerical evidence to support the feasibility of our approach and show the advantage of our gate over a standard gate decomposition scheme. In doing so, we show that not only the expressibility of an ansatz matters, but also how it's explicitly parameterized.

Sub-50 mV power supply, recursive stacking body bias NAND gate for extremely low-voltage CMOS LSIs

This paper presents a recursive stacking body-bias NAND for extremely low voltage application. Our proposed NAND utilizes recursive-stacking and body-bias techniques to achieve extremely low-voltage operation. The former suppresses off-leakage current of MOSFETs and enhances the voltage gain of the NAND gate. The latter achieves on-current enhancement and the voltage gain improvement of the NAND gate. Performance improvements of our proposed NAND gate are theoretically analyzed and discussed. Simulation of our proposed NAND gates showed that voltage transfer curves, voltage gains, and voltage swings were improved significantly. A prototype chip was fabricated in a 180 nm CMOS process and demonstrated that the voltage swing of the proposed NAND was 44.1 mV at 50 mV power supply, which was 16.4 mV improvement compared to that of the standard NAND gate, at the cost of area, power, and delay time.

With a Few Square Roots, Quantum Computing Is as Easy as Pi

Rig groupoids provide a semantic model of Π, a universal classical reversible programming language over finite types. We prove that extending rig groupoids with just two maps and three equations about them results in a model of quantum computing that is computationally universal and equationally sound and complete for a variety of gate sets. The first map corresponds to an 8th root of the identity morphism on the unit 1. The second map corresponds to a square root of the symmetry on 1+1. As square roots are generally not unique and can sometimes even be trivial, the maps are constrained to satisfy a nondegeneracy axiom, which we relate to the Euler decomposition of the Hadamard gate. The semantic construction is turned into an extension of Π, called √Π, that is a computationally universal quantum programming language equipped with an equational theory that is sound and complete with respect to the Clifford gate set, the standard gate set of Clifford+T restricted to ≤2 qubits, and the computationally universal Gaussian Clifford+T gate set.

Unravelling B cell heterogeneity: insights into flow cytometry-gated B cells from single-cell multi-omics data.

B cells play a pivotal role in adaptive immunity which has been extensively characterised primarily via flow cytometry-based gating strategies. This study addresses the discrepancies between flow cytometry-defined B cell subsets and their high-confidence molecular signatures using single-cell multi-omics approaches. By analysing multi-omics single-cell data from healthy individuals and patients across diseases, we characterised the level and nature of cellular contamination within standard flow cytometric-based gating, resolved some of the ambiguities in the literature surrounding unconventional B cell subsets, and demonstrated the variable effects of flow cytometric-based gating cellular heterogeneity across diseases. We showed that flow cytometric-defined B cell populations are heterogenous, and the composition varies significantly between disease states thus affecting the implications of functional studies performed on these populations. Importantly, this paper draws caution on findings about B cell selection and function of flow cytometric-sorted populations, and their roles in disease. As a solution, we developed a simple tool to identify additional markers that can be used to increase the purity of flow-cytometric gated immune cell populations based on multi-omics data (AlliGateR). Here, we demonstrate that additional non-linear CD20, CD21 and CD24 gating can increase the purity of both naïve and memory populations. These findings underscore the need to reconsider B cell subset definitions within the literature and propose leveraging single-cell multi-omics data for refined characterisation. We show that single-cell multi-omics technologies represent a powerful tool to bridge the gap between surface marker-based annotations and the intricate molecular characteristics of B cell subsets.

Investigation of a standard gate valve in terms of flow rate, opening distance and wedge angle with CFD

Investigation of a standard gate valve in terms of flow rate, opening distance and wedge angle with CFD

Decomposing (n+1)$(n+1)$‐Qubit Toffoli Gate with Shallow Circuit Depth and No Ancilla

AbstractCircuit depth optimization is crucial for implementing quantum algorithms in practical systems. The decomposition of ‐qubit Toffoli gate is continually optimized since this gate is a fundamental component for many quantum algorithms. Without any ancilla, ‐qubit Toffoli gate can be decomposed by standard gates with circuit depth . Here, the decomposition is further optimized and its circuit depth is reduced to . The decomposition is equivalent to ‐qubit Toffoli gate up to an overall phase and also does not need any ancilla.

Proposing a Algorithm for Optimizing Energy Consumption

The purpose of this paper is to use the social spider algorithm to improve energy consumption in wireless sensor networks. In this regard, finding a suitable place for routers was done with a social spider algorithm in the system by selecting and optimally placing elements in the network and revising the Objective function. To use it, the initial number was 12, and the maximum number of loop iterations in the algorithm was 100 replications. We achieved these values with several runs and errors. Besides, to achieve the best results, to solve the problem, they can be considered as the default algorithm. In this research, the MATLAB implementation language was used to implement the spider algorithm, and then NS 2.35 tool was used to simulate the network environment and use the algorithm. In this study, three standard gate placement algorithms were used for comparisons, including BRP, RDP, and RGP. The results showed that the proposed method could have the lowest energy consumption. It can cause fair and uniform energy consumption between all nodes. It will also increase the lifetime of the network. Optimization of routing algorithms for such networks by using the spider algorithm also reduced the number of errors (failures) in the system and increased the life of the network with the help of the mentioned method. The proposed method, compared to the techniques presented before this study, is acceptable and, while creating the desired capabilities in terms of security, does not impose much time overhead on the system

Proficiency tests to evaluate the impact on assay outcomes of harmonized influenza-specific Intracellular Cytokine Staining (ICS) and IFN-ɣ Enzyme-Linked ImmunoSpot (ELISpot) protocols

The magnitude and quality of cell-mediated immune responses elicited by natural infection or vaccination are commonly measured by Interferon-ɣ (IFN-ɣ) Enzyme-Linked ImmunoSpot (ELISpot) and Intracellular Cytokine Staining (ICS). To date, laboratories apply a variety of in-house procedures which leads to diverging results, complicates interlaboratory comparisons and hampers vaccine evaluations. During the FLUCOP project, efforts have been made to develop harmonized Standard Operating Procedures (SOPs) for influenza-specific IFN-ɣ ELISpot and ICS assays. Exploratory pilot studies provided information about the interlaboratory variation before harmonization efforts were initiated. Here we report the results of two proficiency tests organized to evaluate the impact of the harmonization effort on assay results and the performance of participating FLUCOP partners.The introduction of the IFN-ɣ ELISpot SOP reduced variation of both background and stimulated responses. Post-harmonization background responses were all lower than an arbitrary threshold of 50 SFU/million cells. When stimulated with A/California and B/Phuket, a statistically significant reduction in variation (p < 0.0001) was observed and CV values were strongly reduced, from 148% to 77% for A/California and from 126% to 73% for B/Phuket. The harmonizing effect of applying an ICS SOP was also confirmed by an increased homogeneity of data obtained by the individual labs. The application of acceptance criteria on cell viability and background responses further enhanced the data homogeneity. Finally, as the same set of samples was analyzed by both the IFN-ɣ ELISpot and the ICS assays, a method comparison was performed. A clear correlation between the two methods was observed, but they cannot be considered interchangeable.In conclusion, proficiency tests show that a limited harmonization effort consisting of the introduction of SOPs and the use of the same in vitro stimulating antigens leads to a reduction of the interlaboratory variation of IFN-ɣ ELISpot data and demonstrate that substantial improvements for the ICS assay are achieved as comparable laboratory datasets could be generated. Additional steps to further reduce the interlaboratory variation of ICS data can consist of standardized gating templates and detailed data reporting instructions as well as further efforts to harmonize reagent and instrument use.

Upstream vortices of a sluice gate: An experimental and numerical study

Abstract This paper aims to explore the effects of a sill under a standard sluice gate on the development of the intake vortices. In total, 200 experiments were carried out. Sills with different shapes and widths were considered both numerically and experimentally. Results indicated that using a sill changes the flow depth and upstream pressure. Using a silled gate causes a decrease in the amount of air entering the fluid. By increasing the sill width, the vortex intensity reduces and this reduction is further amplified by increasing the approach discharge. The experimental findings are also compared to the results from the numerical model Flow-3D with interesting agreements.

Design of ternary full-adder and full-subtractor using pseudo NCNTFETs

Now-a-days, the binary logic system has intensified by scaling the field effect transistor (FET). However, due to the effectiveness of scaling the FET, ternary logics became more popular. Out of numerous ternary logic devices, carbon nanotube (CNT) FET (CNTFET) is considered a good candidate over silicon FETs. Hence, in this study, ternary schematics are developed based on Pseudo N-type CNTFETs. The ternary basic designs such as standard ternary inverter (STI), AND and OR gates are presented. Then, using the proposed basic logic gates, the complex designs such as full adder and full subtractor are also proposed. The HSPICE simulator is utilized to design proposed circuits and analyze different performance parameters. The performance such as delay, power and power delay product (PDP) are analyzed for the proposed circuits. Moreover, the proposed schematics performances are also compared to complementary schematics. It investigated that Pseudo N-type CNTFET schematics improved the overall performance on an average up to 65.82% over the complementary ternary circuits.

Formation of Highly Conductive Interfaces in Crystalline Ionic Liquid-Gated Unipolar MoTe2/h-BN Field-Effect Transistor.

2H MoTe2 (molybdenum ditelluride) has generated significant interest because of its superconducting, nonvolatile memory, and semiconducting of new materials, and it has a large range of electrical properties. The combination of transition metal dichalcogenides (TMDCs) and two dimensional (2D) materials like hexagonal boron nitride (h-BN) in lateral heterostructures offers a unique platform for designing and engineering novel electronic devices. We report the fabrication of highly conductive interfaces in crystalline ionic liquid-gated (ILG) field-effect transistors (FETs) consisting of a few layers of MoTe2/h-BN heterojunctions. In our initial exploration of tellurium-based semiconducting TMDs, we directed our attention to MoTe2 crystals with thicknesses exceeding 12 nm. Our primary focus centered on investigating the transport characteristics and quantitatively assessing the surface interface heterostructure. Our transconductance (gm) measurements indicate that the very efficient carrier modulation with an ILG FET is two times larger than standard back gating, and it demonstrates unipolarity of the device. The ILG FET exhibited highly unipolar p-type behavior with a high on/off ratio, and it significantly increased the mobility in MoTe2/h-BN heterochannels, achieving improvement as one of the highest recorded mobility increments. Specifically, we observed hole and electron mobility values ranging from 345 cm2 V-1 s-1 to 285 cm2 V-1 s-1 at 80 K. We predict that our ability to observe the intrinsic, heterointerface conduction in the channels was due to a drastic reduction of the Schottky barriers, and electrostatic gating is suggested as a method for controlling the phase transitions in the few layers of TMDC FETs. Moreover, the simultaneous structural phase transitions throughout the sample, achieved through electrostatic doping control, presents new opportunities for developing phase change devices using atomically thin membranes.

Analysis and Stabilization of Signal Reflections in Gate-to-Gate Connections for AQFP Circuits

Signal integrity of transmitted data is critical for achieving highly dense, large-scale superconductor circuits. Transmission line effects, such as signal reflections, are investigated and concepts from microwave circuit theory and conventional digital logic circuits are applied to AQFP circuits. The lossless transmission line model is used for interconnection modelling. The frequency content and timing characteristics of data signals are used to analytically predict a maximum propagation delay of 6.1 ps before failure due to reflections. This coincides well with our own results, and with those obtained in a separate study using simulation techniques. The investigation then extends towards the design of an impedance matching network with the aim of reducing reflections. The input impedance of a standard buffer gate is derived, and then matched to an 8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Omega$</tex-math></inline-formula> transmission line. The proposed impedance matching network maintains data signal integrity up to 3 millimetres. Energy analysis of the matching network is also performed and a 36 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> increase in length for similar energy consumption is achieved over alternative solutions.