Split-gate Technology Research Articles

A Novel High-Speed Split-Gate Trench Carrier-Stored Trench-Gate Bipolar Transistor with Enhanced Short-Circuit Roughness.

A novel high-speed and process-compatible carrier-stored trench-gate bipolar transistor (CSTBT) combined with split-gate technology is proposed in this paper. The device features a split polysilicon electrode in the trench, where the left portion is equipotential with the cathode. This design mitigates the impact of the anode on the trench gate, resulting in a reduction in the gate-collector capacitance (CGC) to improve the dynamic characteristics. On the left side of the device cell, the P-layer, the carrier-stored (CS) layer and the P-body are formed from the bottom up by ion implantation and annealing. The P-layer beneath the trench bottom can decrease the electric field at the bottom of the trench, thereby improving breakdown voltage (BV) performance. Simultaneously, the highly doped CS layer strengthens the hole-accumulation effect at the cathode. Moreover, the PNP doping layers on the left form a self-biased pMOS. In a short-circuit state, the self-biased pMOS turns on at a certain collector voltage, causing the potential of the CS-layer to be clamped by the hole channel. Consequently, the short-circuit current no longer increases with the collector voltage. The simulation results reveal significant improvements in comparison with the conventional CSTBT under the same on-state voltage (1.48 V for 100 A/cm2). Specifically, the turn-off time (toff) and turn-off loss (Eoff) are reduced by 38.4% and 41.8%, respectively. The short-circuit current is decreased by 50%, while the short-circuit time of the device is increased by 2.46 times.

Quantized conductance in hybrid split-gate arrays of superconducting quantum point contacts with semiconducting two-dimensional electron systems

A quantum point contact (QPC)—a constriction in a semiconducting two-dimensional electron system with a quantized conductance—is a building block of novel spintronic and topological electronic circuits. QPCs can also be used as readout electronics, charge sensors, or switches in quantum nanocircuits. A short and impurity-free constriction with superconducting contacts is a Cooper-pair QPC analogue known as a superconducting quantum point contact (SQPC). The technological development of such quantum devices has been prolonged due to the challenges of maintaining their geometrical requirement and near-unity superconductor-semiconductor interface transparency. Here, we develop advanced nanofabrication, material and device engineering techniques and report on an innovative realization of nanoscale hybrid SQPC arrays with split gate technology in semiconducting 2D electron systems. We exploit the special gate tunability of the quantum wells, and demonstrate the first experimental observation of conductance quantization in hybrid InGaAs-Nb SQPCs. We observe reproducible quantized conductance at zero magnetic fields in multiple quantum nanodevices fabricated in a single chip and systematically investigate the quantum transport of SQPCs at low and high magnetic fields for their potential applications in quantum metrology, for extremely accurate voltage standards, and fault-tolerant quantum technologies. Published by the American Physical Society 2024

A High Performance Normally-Off AlGaN/GaN Split-Gate Metal-Insulator-Semiconductor High Electron Mobility Transistor (MIS-HEMT) Using Piezo Neutralization Technique

In this paper, we propose a novel normally-off MIS-HEMT structure, mainly using Split-Gate Technology, Piezo Neutralization Technique (PNT), Field Plate Technology. By analyzing the effects of different Al composition in the PNT layer and buffer layer on devices, the Piezo Neutralization Technique is optimized. The current turn-on/off is controlled by changing gate voltage to regulate the horizontal conduction band between the double gates. The effects of gate length and block barrier size between the double gates on device performance are studied. Through two-dimensional device simulation, the operation principle and internal mechanism are analyzed. An improved device with good performance is presented. The threshold voltage Vth is 4.1 V, the peak transconductance is 0.3 S/mm, the maximum drain current is 1.1 A/mm and the breakdown voltage is 1200 V.

Transport regimes of a split gate superconducting quantum point contact in the two-dimensional LaAlO3/SrTiO3 superfluid

One of the hallmark experiments of quantum transport is the observation of the quantized resistance in a point contact in GaAs/AlGaAs heterostructures. Being formed with split gate technology, these structures represent in an ideal manner equilibrium reservoirs which are connected only through a few electron mode channel. It has been a long standing goal to achieve similar experimental conditions also in superconductors. Here we demonstrate the formation of a superconducting quantum point contact (SQPC) with split gate technology in a two-dimensional superconductor, utilizing the unique gate tunability of the superfluid at the LaAlO3/SrTiO3 interface. When the constriction is tuned through the action of metallic split gates we identify three regimes of transport: First, SQPC for which the supercurrent is carried only by a few quantum transport channels. Second, superconducting island strongly coupled to the equilibrium reservoirs. Third, charge island with a discrete spectrum weakly coupled to the reservoirs.

MoS2 based dual input logic AND gate

Crystalline monolayers of CVD MoS2 are used as the active semiconducting channel in a split-gate field effect transistor. The device demonstrates logic AND functionality that is controlled by independently addressing each gate terminal with ±10V. When +10V was simultaneously applied to both gates, the device was conductive (ON), while any other combination of gate voltages rendered the device resistive (OFF). The ON/OFF ratio of the device was ∼ 35 and the charge mobility using silicon nitride as the gate dielectric was 1.2cm2/V-s and 0.1cm2/V-s in the ON and OFF states respectively. Clear discrimination between the two states was observed when a simple circuit containing a load resistor was used to test the device logic AND functionality at 10Hz. One advantage is that split gate technology can reduce the number of devices required in complex circuits, leading to compact electronics and large scale integration based on intrinsic 2-D semiconducting materials.

Split-gate dual-electron waveguide device

A split-gate technology on an AlGaAs/GaAs heterostructure is used to implement a novel quantum-effect device which allows two electron waveguides to come into very close proximity to each other over a certain length. The field-effect action of a middle gate controls the height and width of the energy barrier between the waveguides. This allows a gradual transition from two isolated waveguides to two closely spaced waveguides and finally to the merging of both waveguides into a single broad waveguide. Two side gates can control the number of occupied subbands in each waveguide. This is confirmed by the observation of sharp 2e2/h conductance steps in each waveguide at 1.8 K as the side-gate voltage is modulated.