Space Vector PWM Method Research Articles

Hybrid PLM and ADRC Control for Sensorless Induction Motor Drive with Nine-Level Converter Employing SVPWM

This paper outlines the design of a predictive controller combined with an active disturbance rejection control (ADRC)-type controller to enhance the dynamic performance of the induction motor powered by a nine-level converter. The predictive control law proposed is derived from the Poisson Laguerre model, based on predictive control. The motor is controlled using indirect field-oriented control, both with and without a speed sensor. For speed estimation, the Luenberger observer of order 4 is used. The predictive method utilized allows for the dynamic adjustment of control parameters based on those of the induction motor. The paper aims to eliminate internal and external disturbances and reduce total harmonic distortion (THD) through the use of a Nine-level cascaded H-bridge inverter. Space vector pulse width modulation (SVPWM) signals are generated using the logic of hexagon decomposition. The SVPWM method operates by decomposing higher-level hexagons into multiple two-level hexagons. The Poisson-Laguerre model (PLM) is also compared with the ADRC and the proportional-integral (PI) control. Simulations with MATLAB/SIMULINK software for an induction motor are performed to test the performance of each controller and the validity of the observer.

An Active Virtual Space Vector Modulation Scheme for Three‐Level Neutral‐Point‐Clamped Converters

The performance of neutral‐point‐clamped (NPC) converters is subject to the regulation of neutral point balance. In the literature, researchers have addressed two main modulation methods: the active space vector PWM (SVPWM) technique and the virtual SVPWM (VSVPWM) method. However, those two approaches respectively suffer from reduced DC‐link voltage utilization and poor active regulation capability. To address this, an improved VSVPWM modulation scheme with actively strong voltage regulation capability is proposed in this paper. The fast and precise control of capacitor voltages is achieved by optimizing the synthesis scheme of the virtual vectors. When there is a voltage imbalance, the proposed technique can quickly restore and maintain the capacitor voltage balance till the full DC‐link voltage utilization without affecting the converter output quality. The experimental validation results on the NPC converter have demonstrated the benefits of the proposed active VSVPWM method. © 2024 Institute of Electrical Engineers of Japan and Wiley Periodicals LLC.

Five-phase space vector carrier-based PWM for third harmonic injection

Five-phase AC drives allow a third harmonic voltage to be fed into the stator winding – in addition to the fundamental voltage – to generate a third harmonic magnetic air gap field. This allows the generation of an additional small constant torque. Furthermore, the undesirable saturation harmonics that occur with saturated iron can be compensated. The desired third harmonic voltage is commonly generated via time-consuming space vector PWM algorithms, which are not well-suited for real-time application, or via look-up tables, which require an increased storage capacity. In our case, the desired third harmonic voltage is generated in the five-phase voltages by adding a non-sinusoidal zero-sequence voltage with five times the fundamental frequency to the fundamental voltage reference signals in carrier-based pulse width modulation (PWM) with a constant switching frequency. This is equivalent to a space vector PWM method (SVPWM) and avoids a significantly high calculation effort. The PWM algorithm programmed in MATLAB in real time allows the fast generation of a third harmonic voltage per phase with freely definable amplitude and phase shift without requiring a lot of storage capacity.

A Low Common-Mode SVPWM for Two-Level Three-Phase Voltage Source Inverters

In order to reduce the common-mode voltage (CMV) generated by the use of space vector pulse width modulation (SVPWM) in two-level three-phase voltage source inverters, a low common-mode SVPWM method is proposed. In this method, the voltage plane is divided into 12 sectors, and on each sector, two non-zero vectors of the same class and one single zero vector are adopted for synthesis. The action time of the zero vector is placed at both ends of each switching cycle, the currents are sampled at the beginning of each switching cycle, and the action time and sequence of vectors on each sector is provided. Simulation and experimental results show that, in the vector control system of a permanent magnet synchronous motor fed by the inverter, compared with the conventional SVPWM, the proposed method reduces the CMV peak-to-valley value by 33.333%, the CMV jump frequency by three times, and the performance of the line voltage and line current. The electromagnetic torque and rotor speed remain good, which has good application value in high-performance drives.

Efficiency analysis of the SVPWM control using the simulink electrical library and implemented in the Lucas Nulle practice modules

The purpose of this research is to analyze the efficiency of an induction motor controller, using space vector pulse width modulation (SVPWM) in open loop. With a constant torque of 1.5 Newton per meter. It is carried out by applying the mathematical model, the formulas for commutation times and space vectors in Simulink taking into account the maximum and minimum values of operation by applying the SVPWM method to generate the trigger signal in the Insulated Gate Bipolar Transistor bridge. (IGBT's), implementing the model in the Lucas Nulle practice module, taking the power data and calculating the efficiency to compare with the mathematical model and validate, resulting that the controller efficiency varies according to the switching speed of the semiconductor block, with the operation of a motor of 0.37kW and 1KW at a speed of 200rpm the efficiency of the controller reaches a value of 72.67% in the physical model that consists of 6 IGBT's of 1 kVA and 69% in the simulated model presenting an error of 5% and a switching speed of the IGBT's of 248.641ms.

SVPWM Strategy With Minimum Common-Mode Voltage for Multilevel Converter Combining the Concept of the Nearest Level

Multilevel converters are widely used in medium- and high-voltage high-power industrial applications. Space vector pulse width modulation (SVPWM) is one of the very promising modulation strategies for multilevel converters. However, the SVPWM strategy is difficult to implement as the number of levels increases. The output common-mode voltage (CMV) of the converter is another problem in the implementation of SVPWM strategy. In this paper, a new SVPWM strategy with minimum CMV for multilevel converter is proposed by combining the concept of the nearest level. The proposed SVPWM strategy only utilizes simple arithmetic operations and logical judgments, and completely avoids trigonometric functions and irrational number operations. Compared with the existing SVPWM methods, the proposed SVPWM strategy can quickly calculate the switching state with the minimum CMV in real-time by the concept of the nearest level, and avoids solving the non-homogeneous linear equations in the process of calculating the switching state corresponding to the space vector. It can be extended to any level converter without additional computational burden. Finally, the proposed SVPWM strategy is verified with extensive simulation and experimental studies.

A space vector pulse width modulation method for switched reluctance motor driven by full bridge power converter

AbstractThis study proposes a space vector pulse width modulation (SVPWM) driving method for the switched reluctance motor (SRM), which enables the use of a standard full‐bridge power converter to drive a three‐phase SRM with a ring structure, in place of the traditional asymmetric H‐bridge (AHB). Based on this driving topology, the SVPWM approach is employed to drive the SRM, and its performance is compared with that of the conventional SRM driving method utilising the AHB. The findings indicate that the SVPWM method can effectively reduce torque ripple in the SRM. Moreover, the experimental validation performed to verify the proposed driving topology and method yields results that closely align with the simulated outcomes.

Hybrid-Clamping SVPWM Scheme for a Four-Level Open-End Winding Induction Motor Drive

An open-end winding arrangement is fed with two typical 2-level voltage source inverters (VSIs) on either side to accomplish multilevel inversion. Two voltage source modules (VSIs) DC-link voltages are kept at a 2:1 ratio to realize the open-end winding induction motor (OEW-IM) power circuit’s four-level configuration. However, the higher DC-link voltage capacitor overcharges its lower DC-link voltage counterpart in the 4-level power circuit configuration. This article proposes a new hybrid-clamping space vector PWM (SVPWM) approach to prevent overcharging. Based on the sample moment, the suggested SVPWM technique clamps one inverter and switches to another inverter. Additionally, it clamps one of the inverter’s switching phases. The proposed PWM method has been found to reduce switching power loss in contrast to earlier SVPWM methods. The proposed SVPWM scheme for the 4-level OEW-IM drive is tested and verified using an experimental laboratory setup.

A space vector PWM fed SRM with full bridge power converter

In order to reduce the torque ripple of a switched reluctance motor in the electric vehicles, a space vector pulse width modulation (SVPWM) driving method for the switched reluctance motor (SRM) is proposed. With a ring structure, a three-phase SRM can be driven by using a standard full-bridge power converter instead of the conventional asymmetric H-bridge. Based on this type of driving topology, an SVPWM method is applied for driving the SRM. The SVPWM method is compared to the conventional SRM driving method by using the asymmetric H-bridge, the results show that the SVPWM can reduce the torque ripple in the SRM effectively. The experimental validation is also made to verify the proposed driving topology and method, of which the results match well with the simulated results.

Comprehensive Investigation of Space-Vector PWM Including Novel Switching Sequences for Dual Three-Phase Motor Drives

The increasing interest in dual three-phase motor drives has led to the corresponding research on pulsewidth modulation (PWM) techniques. Compared to carrier-based PWM (CPWM), space-vector PWM (SVPWM) attracts more attention because of clear physical meaning and high design flexibility. However, it is difficult to design the method from the space-vector concept due to the complexity in the selection and the arrangement of the space vectors. In this article, with the unified comprehension of the space-vector and carrier-based approaches to PWM, a straightforward approach is proposed to develop various switching sequences. As a result, a total of ten different switching sequences are presented, including five novel switching sequences. In addition, the time distribution schemes of the applied vectors for the derived switching sequences are explored to obtain the acceptable harmonic performance with low computation burden. With the benefit of the derived switching sequences, a comprehensive investigation on the design of PWM methods can be carried out. As a result, an SVPWM method using five active vectors is proposed with excellent harmonic performance. Simulation and experimental results on a 7.5-kW dual three-phase induction motor drive are given to confirm the correctness of the theoretical analysis and the validity of the proposed method.

SVPWM Strategy Based on the 45$^\circ$ Coordinates to Suppress Common-Mode Voltage for Multilevel Converters

This article proposes an optimized space vector pulsewidth modulation (SVPWM) strategy with minimum common-mode voltage (CMV). Compared with earlier SVPWM methods, the proposed optimized strategy is implemented in the 45 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> coordinates. Locating the sector triangle, calculating the duty cycles, and determining the switching sequences require only basic arithmetic operations, which greatly reduces the computational complexity. The switching state with minimum CMV corresponding to the space vector can be calculated directly. The proposed optimized modulation strategy effectively solves the problem that the traditional SVPWM is difficult to be implemented as the number of levels increases. It can be easily extended to any level converters without additional computational burden. Based on the proposed optimized SVPWM strategy with minimum CMV, the SVPWM strategy for eliminating CMV is proposed. The proposed SVPWM strategy for eliminating CMV improves the utilization of the redundant cells and reduces the total harmonic distortion of phase voltages without increasing the difficulty of implementing the SVPWM algorithm. Finally, the proposed two SVPWM strategies are verified with extensive simulations and experiments.

ANFIS based AZSPWM methods for reduction common mode voltage in asynchronous motor drive

&lt;div class="keywords"&gt;Space vector pulse width modulation (SVPWM) is a popular technique in the field of variable frequency induction motor drives. It gives better working and good direct current bus utilization in comparison to the sinusoidal PWM (SPWM) method. However, it decreases harmonic fluctuations and generates high common mode voltage (CMV) fluctuations, which results in common mode currents inside the motor. Hence, the performance of the motor may be deteriorated. To reduce the CMV, this paper presents a family of active zero state PWM (AZSPWM) methods using an adaptive neuro-fuzzy interference system (ANFIS). The proposed approach uses a five-layer hybrid learning algorithm for training the network. The training data is obtained from the classical SVPWM method. To analyze the proposed PWM methods, simulation is carried out using MATLAB and evaluated.&lt;/div&gt;

A novel SVPWM for 3-phase to 5-phase conversion using matrix converter

&lt;span&gt;A novel matrix converter has been developed for 3-phase to 5-phase conversion using a novel space vector pulse width modulation. The matrix converter organized to generate 5-phase AC output voltage from 3-phase input voltage with help of SVPWM method; bidirectional power switches placed in matrix converter controlled by appropriate switching pulse. Space vector pulse width modulation (SVPWM) provides better utilization of applied input voltage, improved output voltage, reduced total harmonic distortion. The bidirectional switch used by the matrix converter decreases stress on the power switch and the influence of harmonic fluctuation in AC output voltage. When compared to traditional approaches, the suggested system offers improved output voltage and current control. Using MATLAB/Simulink and FPGA-cyclone controller, respectively, modelling and experimental results have been given to validate the proposed methodology.&lt;/span&gt;

A seven-level cascaded multilevel inverter based on simplified SVPWM method

The multilevel converters are extremely widespread alternatives within megawatt power level as well as medium voltage level applications due to their excellent execution than the typical two-level converters. The widely applied control strategies aimed at inverters are Sine Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM) strategies. In between these two PWM methods, the SVPWM strategy has excellent execution as compared to the SPWM strategy as a result of improved DC link voltage use as well as a decrease in Total Harmonic Distortion (THD) in output voltages. A traditional SVPWM strategy owns numerous weaknesses like computational complications in terms of identification of the reference voltage vector position, to identify sector, triangle and also it requires large memory for storing look up tables used for switching vectors. This paper presents, an innovative modified SVPWM strategy aimed at Cascaded H-Bridge Multilevel Inverter (CHBMLI). The novel modified SVPWM strategy has overwhelm the downsides of traditional SVPWM strategy. A seven-level CHBMLI is used for the implementation of this simplified SVPWM method to assess performance and as well to made comparison with the SPWM strategy. A MATLAB software is used for the simulation.

A Simplified and Generalized SVPWM Scheme for Two-Level Multiphase Inverters With Common-Mode Voltage Reduction

Multiphase space vector pulsewidth modulation (SVPWM) method has gained much attention with the growing interest in multiphase motor drives. Conventional multiphase SVPWM becomes more complex with the increase of phases, while simplified multiphase SVPWM is required for industrial applications. In addition, common-mode voltage (CMV) is the main cause of motor bearing damage and winding insulation breakdown for electrical drives. In this article, a simplified and generalized SVPWM method with CMV reduction is proposed for multiphase drives. The proposed SVPWM is intuitive and universal for arbitrary two-level multiphase inverters with odd phases, and CMV is restricted within ± <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> /2 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> is phase number). Experimental results verify theoretical analysis and effectiveness of the proposed method.

A New Decentralized Space Vector PWM Method for Multilevel Single-Phase Full Bridge Converters

This paper proposes a decentralized control structure and method for a multilevel single-phase power converter using space vector pulse width modulation (SVPWM). The focus of this paper is on the decentralized control structure for the power converter cells that will exchange information with neighboring cells in order to adjust the switching vector and switching time for each cell. In this study, the switching vectors and the corresponding switching times of each cell will be self-determined based on the phase angle of two neighboring cells. Normally, SVPWM applied to the multilevel power converters need complete information about the total cells and cell’s position to build a control algorithm. Meanwhile, a decentralized space vector pulse width modulation (DSVPWM) method is proposed that can be applied to power converters with any number of cells and can be considered as a multilevel SVPWM method. In addition, the decentralized multilevel single-phase power converter has high flexibility with which it is possible to easily adjust the number of active cells, so that the output voltage can be adjusted quickly; this provides the ability to dynamically reconfigure without interrupting the power energy supply process. The proposed control structure and method are effectively verified based on simulation and experimental results. Experimental results are evaluated based on a 9-level single-phase power converter, which has an RL load with rated parameters 220 V/500 W.

Voltage-Balancing Control in Stacked Multicell Converter Based on Single Space-Vector Modulation

This article introduces voltage-balancing control methods in stacked multicell converters based on single space-vector modulation. Two different control strategies for capacitors voltage are presented. The basic vectors with the smallest common-mode voltage are chosen to accomplish the voltage-balancing control. The nearest vector is selected for the first proposed method, and the appropriate switch combinations of each phase are determined by the cost function of floating-capacitor voltages and neutral point (NP) voltage. For the second proposed method, we consider sacrificing a little current performance to provide more possibility of switching state selection. The switching state of each phase is determined according to the voltage-balancing control of floating capacitors, and the optimal switching state with the smallest NP voltage is selected from the two nearest adjacent basic vectors. Experimental results compared with the existing space vector pulsewidth modulation method are presented to verify the effectiveness of the proposed methods.

240$^\circ$-Clamped PWM Applied to Transformerless Grid Connected PV Converters With Reduced Common Mode Voltage and Superior Performance Metrics

Transformerless voltage source inverters (VSIs) are one of the popular topologies for photovoltaic (PV) grid-connected applications due to the lowest component count and simple design. Because of the absence of galvanic isolation in such systems, problem of electromagnetic interference (EMI) due to high leakage current is highly pronounced. Recently various reduced common mode voltage (CMV) PWM (RCMV-PWM) methods which address these issues of CMV, and leakage current have been proposed. These schemes typically function at the expense of increased total harmonic distortion (THD), higher switching loss, high DC link current stress along with limited modulation index range. In this work, 240<inline-formula><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> clamped PWM (240CPWM) is selected as an ideal candidate for grid connected VSIs in terms of all round performance of switching loss, THD, DC link current stress, CMV and leakage current. 240CPWM is a relatively new space vector based PWM method which can attain much superior performance by avoiding the zero states. After a brief overview of the 240CPWM concept, the paper provides a detailed comparison of 240CPWM with conventional space vector PWM (CSVPWM) and discontinuous PWM (DPWM1) methods in terms of each of the above metrics. A 3-phase 208 V 3 kW silicon IGBT based hardware prototype is built to validate the performance of 240CPWM and compared with other popular schemes under grid-connected mode. Experimental results show a 66.7&#x0025; reduction in the peak CMV and 50&#x0025; reduction in leakage current with the proposed scheme as compared to CSVPWM. Also, THD, DC link current stress and inverter switching loss are greatly reduced as an added advantage using the proposed method. A new, combined performance index is proposed to compare the performance of different PWM schemes, and it is shown that the 240CPWM achieves the best value for this index among the PWM methods studied.

A simplified SVPWM method for cascaded multilevel inverters

A highly popular alternative in medium voltage and high-power applications is multilevel converters because of their superior performance over conventional two-level converters. The most commonly used control methods in the case of multilevel inverters are sine pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) methods. Among these two control strategies, SVPWM has superior performance over SPWM in terms of DC bus voltage utilization along with a reduction in total harmonic distortion (THD) of line voltages. The classical SVPWM method has various drawbacks such as computational complexity for identifying the location of reference voltage vector, sector identification, region identification, memory requirement to store lookup tables for switching vectors. The novel simplified SVPWM technique is presented for cascaded H-Bridge multilevel inverter (CHBMLI) in this paper. This simplified SVPWM method has overcome the drawbacks of the classical SVPWM method. This new technique has been implemented into a five-level CHBMLI to evaluate performance and also to compare with the SPWM method. The simulation has been performed in MATLAB software.

Fault-tolerant deadbeat model predictive current control for a five-phase PMSM with improved SVPWM

The main drawbacks of traditional finite set model predictive control are high computational load, large torque ripple, and variable switching frequency. A less complex deadbeat (DB) model predictive current control (MPCC) with improved space vector pulse-width modulation (SVPWM) under a single-phase open-circuit fault is proposed. The proposed method predicts the reference voltage vector in the α-β subspace by employing the deadbeat control principle on the machine predictive model; thus, the exhaustive exploration procedure is avoided to relieve the computational load. To perform the constant switching frequency operation and achieve better steady-state performance, a modified SVPWM strategy is developed with the same conventional structure, which modulates the reference voltage vector. This new approach is based on a redesigned and adjusted post-fault virtual voltage vector space distribution that eliminates the y-axis harmonic components in the x-y subspace and ensures the generation of symmetrical PWM pulses. Meanwhile, the combined merits of the DB, MPCC, and SVPWM methods are realized. To verify the effectiveness of the proposed control scheme, comparative experiments are performed on a five-phase permanent magnet synchronous motor (PMSM) drive system.