Space Vector PWM Scheme Research Articles

Novel Space-Vector PWM Schemes for Enhancing Efficiency and Decoupled Control in Quasi-Z-Source Inverters

This paper investigates the development of pulse width modulation (PWM) schemes for three-phase quasi-Z-source inverters (qZSIs). These inverters are notable for their voltage boost capability, built-in short-circuit protection, and continuous input current, making them suitable for low-voltage-fed applications like photovoltaic or fuel cell-based systems. Despite their advantages, qZSIs confront challenges such as increased control complexity and a larger number of passive components compared to traditional voltage source inverters (VSIs). In addition, most existing PWM schemes for qZSIs lack the capability for independent control of the amplitude modulation index and duty cycle, which is essential in closed-loop applications. This study introduces innovative space-vector PWM (SVPWM) schemes, addressing issues of independent control, synchronization, and unintentional short-circuiting in qZSIs. It evaluates several established continuous and discontinuous PWM schemes, and proposes two novel decoupled SVPWM-based schemes that integrate dead time and in which the shoot-through occurrence is synchronized with the beginning of the zero switching state. These novel schemes are designed to reduce switching losses and improve qZSI controllability. Experimental validation is conducted using a custom-developed electronic circuit board that enables the implementation of a range of PWM schemes, including the newly proposed ones. The obtained results indicate that the proposed PWM schemes can offer up to 6.8% greater efficiency and up to 7.5% reduced voltage stress compared to the closest competing PWM scheme from the literature. In addition, they contribute to reducing the electromagnetic interference and thermal stress of the related semiconductor switches.

Asymmetrical multi‐level inverter by using space vector pulse width modulation technique for low and medium power applications

SummaryA DC to AC converter is developed in this paper. This proposes a single‐phase five‐level inverter is developed in such a way that one DC source is used. The structure of the inverter is modular and the capacitor has self‐voltage balancing capability, which eliminates the need for sensors or an additional control loop. This paper presents the schematic diagram of the proposed topology, principle of operation, and the concepts of sinusoidal pulse width modulation (SPWM) for single‐phase and space vector pulse width modulation (SVPWM) for three‐phase. To further prove the advantage, power loss, and parameter computations are calculated mathematically. Low‐voltage stress is achieved in the proposed topology because the blocking voltages of all the switches are constrained to the input voltage. A comparison table is presented between SPWM and SVPWM schemes in three‐phase inverter. The proposed asymmetrical five‐level configuration setup is constructed, and experiments are performed inside the laboratory. The controller of the converter has been implemented in the field‐programmable gate array (FPGA) platform. In order to confirm the viability of the suggested topology, experimental results are provided for single‐phase arrangement. By using the FPGA platform, real‐time implementation is done for a three‐phase inverter topology.

Analytical modelling and implementation of a new four-switch hybrid power filter topology.

This paper presents a new three-phase four-switch shunt hybrid power filter with the new circuit topology aimed at compensating reactive power and higher harmonics of the load. A space-vector PWM scheme is adopted to reduce the switching state of power switches. In the proposed control scheme, proper voltage vectors are generated on the ac terminal for drawing nearly sinusoidal line currents with controllable power factor. An original closed-form solution of line currents, based on the mixed p-z approach is presented. The analytical procedure is verified by experimental results to confirm the effectiveness of the proposed control scheme

The voltage feedforward based pulse width modulation strategy under the fluctuated dc‐link voltage for a unidirectional five‐level ac motor drive system with open‐end winding connection

SummaryIn a unidirectional five‐level ac motor drive system with open‐end winding connection, because of the variation of operating frequency of ac motor, the instantaneous power fluctuation of rectifier stage and inverter stage will generate larger voltage ripple on each phase dc‐link capacitors, and further lead to a large amount of current harmonics in output currents of inverter. To cope with this problem, an improved space vector pulse width modulation (SVPWM) strategy based on dc‐link voltage feedforward is proposed. In this paper, the effects of zero sequence current harmonics caused by dc‐link voltage ripple on ac motor are firstly analyzed, including the stator winding flux linkage equation, voltage equation, and electromagnetic torque. Then, the generating mechanism of dc‐link voltage ripple and the current harmonics are discussed in detail in terms of instantaneous power fluctuation of each single‐phase converter. Based on this, an improved SVPWM strategy by modifying the modulation signal is proposed to suppress the generation of current harmonics. Finally, a 2.2 kW prototype experimental results are given, which verify the feasibility and advancement of the proposed modulation strategy.

SVPWM Strategy With Minimum Common-Mode Voltage for Multilevel Converter Combining the Concept of the Nearest Level

Multilevel converters are widely used in medium- and high-voltage high-power industrial applications. Space vector pulse width modulation (SVPWM) is one of the very promising modulation strategies for multilevel converters. However, the SVPWM strategy is difficult to implement as the number of levels increases. The output common-mode voltage (CMV) of the converter is another problem in the implementation of SVPWM strategy. In this paper, a new SVPWM strategy with minimum CMV for multilevel converter is proposed by combining the concept of the nearest level. The proposed SVPWM strategy only utilizes simple arithmetic operations and logical judgments, and completely avoids trigonometric functions and irrational number operations. Compared with the existing SVPWM methods, the proposed SVPWM strategy can quickly calculate the switching state with the minimum CMV in real-time by the concept of the nearest level, and avoids solving the non-homogeneous linear equations in the process of calculating the switching state corresponding to the space vector. It can be extended to any level converter without additional computational burden. Finally, the proposed SVPWM strategy is verified with extensive simulation and experimental studies.

Design and Analysis of Universal Natural Fault-Tolerant SVPWM Strategy With Simplified Fault Diagnosis for Multiphase Motor Drives

Conventional space vector pulse width modulation (SVPWM) would degrade the operating performance of the multiphase motor drives under open-phase fault. To resolve this issue, existing solutions require the reconfiguration of transformation matrices. However, for the variable positions of faulty phases, the structure of matrices needs to be redefined, which is a restraint to the industrial implementation of such technologies. This study examined the offset of the voltage vectors after fault occurrence. Accordingly, a universal fault-tolerant SVPWM strategy is proposed for the purpose of natural fault-tolerance, as well as a simplified fault detection scheme. Compared with conventional fault-tolerant SVPWM, it is highlighted with the characteristics of minimum reconfiguration, torque-ripple free operation, and applicability to handle various types of open-phase faults using a single transformation matrix. Besides, proposed strategy eliminates the redundant controllers and also reduces the degree of difficulty for fault diagnosis. Finally, the effectiveness of proposed approach is evaluated experimentally with a seven-phase induction machine, which shows that the torque ripple could be reduced by about 40% in the presence of multiple faults compared to the conventional SVPWM strategy.

Multiaverage Random Switching Frequency Space Vector Pulsewidth Modulation Strategy for High-Order Harmonics Dispersion

A multi-average random switching frequency space vector pulse width modulation (MARSF-SVPWM) strategy is proposed in this paper, in order to further disperse the high-order harmonics concentrated at the switching frequency and its integer multiplies in the output voltage of the inverter. The proposed strategy divides the fundamental period equally, with different stages corresponding to different average switching frequencies and spread-spectrum ranges, in contrast with the conventional random switching frequency space vector pulse width modulation (RSF-SVPWM), under the premise of maintaining the same overall average switching frequency and spread-spectrum range. The simulation and experimental results demonstrate that, even in the case of a narrow spread-spectrum range, the proposed MARSF-SVPWM strategy can obtain a better effect of high-order harmonic dispersion.

Hybrid-Clamping SVPWM Scheme for a Four-Level Open-End Winding Induction Motor Drive

An open-end winding arrangement is fed with two typical 2-level voltage source inverters (VSIs) on either side to accomplish multilevel inversion. Two voltage source modules (VSIs) DC-link voltages are kept at a 2:1 ratio to realize the open-end winding induction motor (OEW-IM) power circuit’s four-level configuration. However, the higher DC-link voltage capacitor overcharges its lower DC-link voltage counterpart in the 4-level power circuit configuration. This article proposes a new hybrid-clamping space vector PWM (SVPWM) approach to prevent overcharging. Based on the sample moment, the suggested SVPWM technique clamps one inverter and switches to another inverter. Additionally, it clamps one of the inverter’s switching phases. The proposed PWM method has been found to reduce switching power loss in contrast to earlier SVPWM methods. The proposed SVPWM scheme for the 4-level OEW-IM drive is tested and verified using an experimental laboratory setup.

Space Vector Pulsewidth Modulation Strategy for ANPC-5L Inverter Based on Model Predictive Control

SVPWM strategies for active neutral-point-clamped five-level (ANPC-5L) inverters have multiple control degrees of freedom and control objectives. However, traditional SVPWM strategies are hard to realize optimal control of multiple objectives due to the objectives are coupled with each other. To address this problem, an SVPWM strategy based on model predictive control (MPC) is proposed. In the pulse generation process of the proposed SVPWM, all control degrees of freedom are utilized to achieve optimal control of multiple objectives through MPC. Firstly, voltage vector sequences that meet the requirements of CMV are selected. Then, a cost function is constructed to realize optimal control of the neutral point potential (NPP) and three floating capacitors (FCs) voltage. The proposed strategy has advantages such as high control accuracy and producing low CMV. Finally, the effectiveness of the proposed strategy is validated by a 150kW three-phase ANPC-5L inverter prototype.

Experimental Investigation of Decoupled Discontinuous PWM Strategies in Open-End Winding Induction Motor Supplied by a Common DC-Link

Currently open-end winding induction motors fed by a dual inverter (OEWIM-DI) present an innovative approach to enhance the performance of modern electric drive systems; such as electrical vehicles and electric aircraft applications. However, the dual inverter topology requires a proper switching control strategy to enable the OEWIM drive to fully achieve its performance. This work aims to investigate experimentally the impact of different Decoupled Discontinuous Pulse Width Modulation (DDPWM) control strategies on the performance of the OEWIM-DI supplied by a common DC-link. The criteria performance adopted in this study are: (i) the Total Harmonic Distortion (THD) of the current and voltage, (ii) the Zero Sequence Voltage (ZSV), (iii) the Common Mode Voltage (CMV), and (iv) the dual inverters losses. The various DDPWM control schemes for the 1.5 kW OEWIM-DI motor drive are implemented on a dSPACE 1104 board and the results are compared with the popular and widely used Space-Vector PWM (SVPWM) strategy. From the results, it can be concluded that the optimised DDPWM technique gives the best performance. This technique has reduced the CMV by one level and reduce the losses by 50% while having the same THD and ZSV obtained with the SVPWM technique.

A Novel Discrete Hybrid Dual Random SVPWM Scheme for Reducing PMSM Harmonic Intensity

Aiming at suppressing the switching frequen-cy harmonics, a novel discrete hybrid dual random control (DHDRC) technique is proposed in this article. Based on the space vector pulsewidth modulation (SVPWM) strategy, the DHDRC-SVPWM technique is applied to randomize the switching period and pulse position by selecting dual discrete random factors from predefined discrete sequences. Accordingly, the original switching narrowband harmonic energy of SVPWM is extended to a wide range of frequencies. To analyze the harmonic dispersion degree quantitatively, the power spectrum is deduced to assess the performance of the discrete random SVPWM. Then, the connection between the discrete sequence and the harmonic energy distribution is obtained under random variables following a discrete uniform distribution. The obtained results demonstrate that the proposed technique significantly expands harmonic clusters in the frequency domain, thereby reducing the harmonic intensity. The present study provides a reference to investigate random SVPWM and improve electromagnetic interference and noise in power converters.

Space vector pulse width modulation strategy for modular multilevel converters in power system

AbstractAs a superior modulation strategy, space vector pulse width modulation (SVPWM) provides redundant voltage vectors and adjustable action time, which can achieve multi‐objective control of modular multilevel converter (MMC). An SVPWM strategy suitable for MMC is proposed. The strategy is divided into three stages. In the first stage, the appropriate voltage vector, the action time and the basic sub‐module (SM) input number are quickly calculated to ensure the output quality by equating MMC as a 2‐level inverter. In the second stage, a finite set of the circulating current suppression is established on the basis of the basic SM input number. The optimal SM input number is selected through rolling optimisation. In the last stage, according to the SM voltage sorting and the optimal SM input number, the optimal switching state is determined to realise the SM voltage balance control. The proposed control strategy simplifies the design of the control system, reduces the computational burden and can be easily extended to MMC with any SM number. The simulation and experimental results show that the proposed SVPWM strategy can reduce the circulating current and balance the SM capacitor voltage while ensuring the output quality.

A Simplified PWM Strategy for Open-Winding Flux Modulated Doubly-Salient Reluctance Motor Drives With Switching Action Minimization

In this article, a simplified pulsewidth modulation (PWM) strategy is proposed for open-winding flux modulated doubly-salient reluctance motor (FMDRM) drives for switching action minimization and common-mode voltage (CMV) reduction. Conventionally, the open-winding converter topology is utilized to achieve the zero-sequence current flow path and dc-biased sinusoidal current excitation for the FMDRM, where the switching actions of power switches are doubled compared to the conventional modular three-phase converter, leading to higher switching losses. Different from the conventional space vector PWM scheme, the reference voltages of converter legs are directly calculated by the reference phase voltages in the proposed PWM scheme. In addition, a rotor-position-based sector division method is proposed to deal with the sector imbalance caused by the distorted back electromotive force (back EMF). Furthermore, different leg voltage clamping methods are respectively developed in odd and even sectors for switching action minimization, which can achieve voltage stress balance and CMV reduction. With the proposed scheme, the switching actions in each switching cycle can be reduced by half, which effectively increases the system efficiency of the FMDRM drive. Experiments are carried out on a three-phase 12/8 FMDRM prototype to verify the effectiveness of the proposed scheme.

SVPWM Strategy Based on the 45$^\circ$ Coordinates to Suppress Common-Mode Voltage for Multilevel Converters

This article proposes an optimized space vector pulsewidth modulation (SVPWM) strategy with minimum common-mode voltage (CMV). Compared with earlier SVPWM methods, the proposed optimized strategy is implemented in the 45 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> coordinates. Locating the sector triangle, calculating the duty cycles, and determining the switching sequences require only basic arithmetic operations, which greatly reduces the computational complexity. The switching state with minimum CMV corresponding to the space vector can be calculated directly. The proposed optimized modulation strategy effectively solves the problem that the traditional SVPWM is difficult to be implemented as the number of levels increases. It can be easily extended to any level converters without additional computational burden. Based on the proposed optimized SVPWM strategy with minimum CMV, the SVPWM strategy for eliminating CMV is proposed. The proposed SVPWM strategy for eliminating CMV improves the utilization of the redundant cells and reduces the total harmonic distortion of phase voltages without increasing the difficulty of implementing the SVPWM algorithm. Finally, the proposed two SVPWM strategies are verified with extensive simulations and experiments.

A Novel SVPWM for Open Winding Permanent Magnet Synchronous Machine With Extended Operation Range

In this article, a novel space vector pulsewidth modulation (SVPWM) with the zero sequence current (ZSC) control strategy is proposed to extend the operation range for an open winding (OW) permanent magnet synchronous machine (PMSM). The proposed SVPWM can achieve the ZSC control and extend the operation range by considering voltages in the zero sequence axis and voltage vectors in the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\alpha \beta $ </tex-math></inline-formula> -plane, both of which are mapped by switching combinations in an OW drive. The effect of switching combinations with non-null zero sequence voltage (ZSV) on the modulation region of a common-dc bus OW-PMSM is investigated for the first time. The proposed SVPWM has optimal selection of switching combinations on the large hexagon rather than on the small hexagon in the conventional SVPWM for ZSC control and still maintains the controllability of ZSC in the overmodulation region. Compared with the conventional SVPWM strategy, the operation range of OW-PMSM can be extended over 10% with the proposed SVPWM strategy. The performance of both the conventional and proposed SVPWMs is compared experimentally.

A novel design for balancing capacitor voltage of multilevel inverter using space vector pulse width modulation (SVPWM)

The multi objective control of modular multilevel converter (MMC) can be achieved by a superior modulation strategy (SVPWM), In this paper, a novel -fangled control technique is employed on the multilevel inverters to attain the balance in the capacitor voltage using the SVPWM strategy. A MLI used for higher-power mid-voltage schemes. The proposed methodology includes the single-phase modulator for which we attain the balance in the voltage of flying capacitors. The efficacy and practicality of the SVPWM are estimated using the simulation models for steady and transient state analysis with given modulating indexes and loads. The efficiency of the proposed model for a pulse with modulation is analyzed using results attained by balancing the voltages of flying capacitors.

A hysteresis current control PWM for PV tied Z-source NPC-MLI fed induction motor with neutral point balancing

Photo-voltaic (PV) tied Z-source Neutral-point clamped NPC-MLI (Z-NPC-MLI) is used in solar grid connected applications due to its improved performance related to conservative inverters due to its single stage power conversion. Though the Z source inverters adaptation is accepted in grid connected technology, the need for appropriate controller to meet out the grid/standalone requirements is becoming necessary. The space vector pulse width modulation (SVPWM) strategy is a prominent modulation technique for Z-source NPC-MLIs due to their appropriate voltage vector selection opportunity. The current controller (CC) based SVPWM is not attempted, which is the most essential consideration for the grid connected inverter to provide a low harmonic distortion, high quality current. With all this aim, the paper presents a PV tied Z-NPC-MLI grid connected system with a unique hysteresis current control SVPWM (HSVM) strategy with neutral point (NP) balancing control. The simulation results are confirmed the feasibility and reliability of the proposed CC for the PV tie grid connected Z- Source MLI.

A New Space Vector Pulse Density Modulation Scheme for Two-Level Five Phase Induction Motor Drive

Variable speed drives incorporating multiphase motors have started gaining attention in recent years due to their benefits over three-phase counter parts. In this article, we propose a digital control scheme based on space vector pulse density modulation for two-level five phase induction motor drive. The scheme combines principles of digital signal processing techniques, such as sigma delta modulation and vector quantization, along with space vector modulation to form computationally efficient motor drives. In this article, vector space is divided into ten nonoverlapping regions, with each region partitioned into three voronoi regions. The reference vector is vector quantized to the nearest switching vector. Absence of dwell time calculations, less memory requirements, and reduced computational complexity of the scheme along with reduced acoustic noise and electromagnetic interference in the drive are the core advantages of the scheme. The work has been experimentally implemented with 2 HP five-phase induction motor drive and the results are compared with space vector pulsewidth modulation scheme for validation purpose.

A Modified Space Vector Modulation for DC-Side Current Ripple Reduction in High-Frequency Link Matrix Converter

A high-frequency link matrix converter (HFLMC) has been increasingly used in power conversion for its distinct advantages of high efficiency and compact volume. However, the conventional six-segment space vector PWM (SVPWM) scheme leads to high current ripple on the dc side and distortion on the ac side, which can inevitably destroy the battery load and decrease power quality. This article proposes a modified SVPWM scheme with dwell time and sequence compensation (MC-SVPWM) to reduce the current ripple and distortion under high modulation index conditions. The proposed MC-SVPWM allocates the vector sequence and adjusts the duration of the vector, simultaneously. First, the reasons for the current ripple and distortion under the conventional six-segment SVPWM (6S-SVPWM) scheme are analyzed in detail. The relationship between the vector duration and the dc-side current ripple is revealed. Then, the derivation process of the proposed MC-SVPWM scheme is introduced. Compared with the conventional 6S-SVPWM scheme, the dc-side current ripple is decreased greatly, and the ac-side current distortion is reduced consequently under the proposed MC-SVPWM scheme. Simulation and experimental results verify the effectiveness of the proposed modulation strategy.

An Optimized Asymmetric Modulation Scheme for Three-Phase Buck Rectifier Without Input Current Distortion at the Sector Boundaries

Space vector pulsewidth modulation (SVPWM) is usually utilized in a three-phase buck rectifier to obtain low total harmonic distortion (THD) and low switching losses. When the conventional SVPWM scheme is applied, the input currents of the three-phase buck rectifier are distorted during the transition from even sector to odd sector, which will deteriorate the harmonics of input currents. In this letter, an asymmetric modulation scheme is proposed to eliminate the distortion of input currents of the three-phase buck rectifier during the transition from even sector to odd sector. The proposed modulation scheme combines two kinds of traditional asymmetric modulations in different sectors. A 1.5 kW experimental prototype of the three-phase buck rectifier with an ac input voltage of 115 V/400 Hz is built for more electric aircraft applications. The experimental results show that the THD of 1.3% can be achieved for the three-phase buck rectifier.