Sophisticated Processing Capabilities Research Articles

Latency Control in Software-Defined Mobile-Edge Vehicular Networking

A cloud radio access network deployed on top of edge networks as a software-defined radio access network architecture has been regarded as a promising paradigm for the next generation mobile networks, but it has not received considerable attention in the vehicular industry due to distinct design needs. For mobile networks, infrastructures provide powerful computation capability for universal radio resource optimization, and therefore an inherent cloud-down design is favorable. On the contrary, to deploy vehicular technologies, sophisticated processing capability has been a baseline feature for the next generation driving machines, which may not solely rely on wireless infrastructures to guarantee driving safety, so an design is preferred. Consequently, this article surveys the recent works on software-defined vehicular networks and proposes a series of edge-up software-defined networking designs, particularly emphasizing the most crucial function of latency control to support possible wireless applications for the next generation driving machines. The proposed designs thus create a paradigm shift to enable software-defined mobileedge vehicular networking.

The embedded superscalar revolution

As embedded system costs are driven further down the learning curve and the demand for faster and more sophisticated processing capabilities increase, it is envisaged that future high performance real-time embedded controllers will need to address a ‘virtual multiprocessor’ environment. Multi-tasking embedded systems will become not only more cost effective for the next generation of embedded control applications but will offer more highly optimised system partitioning to satisfy the needs of embedded system designers well into the next century. Siemens new 32-bit microcontroller-DSP architecture, named TriCore, has been specifically designed to address such future system requirements. TriCore will exploit the advantages of a unified instruction set supporting both control and DSP tasks in a single compact RISC based core and complemented with a rich set of data types and uniform register set.