Software Tradeoffs Research Articles

Social Sustainability Approaches for a Sustainable Software Product

Sustainability is the use of existing resources without compromising them for future generations. Resources must be guaranteed in the environmental, economic, and social dimensions. Sustainable Software Engineering is an emerging research field aiming to minimize software development's negative impacts on society. Furthermore, software sustainability can be defined as a way of keeping something running at a certain level of quality in relation to these dimensions. From the social dimension perspective, it is necessary to confirm software's trade-offs, benefits, and impacts on society since it lacks empirical evidence of its achievements in software. In this research thesis, we will explore how the literature addresses the aspect of social sustainability during software development and understand how social sustainability approaches can be integrated into the context of agile software development. In the end, we expect to have a set of guidelines, activities, and practices that can be adopted by agile teams.

REVIEWING AND APPLYING SECURITY SERVICES WITH NON-ENGLISH LETTER CODING TO SECURE SOFTWARE APPLICATIONS IN LIGHT OF SOFTWARE TRADE-OFFS

Important software applications need to be secured by choosing the suitable security services. In this paper, a shopper program is designed and implemented using VB.NET to follow up the movement of goods in the store and the shopping place. The program uses five files to store: the passwords, the information of goods in the store and the shopping place. A literature review is carried out to collect the information system and software trade-offs. The applied security services are then analyzed in light of these trade-offs. For security purposes, files and folders are hidden and files are set to Read-Only. The files' contents are encrypted by applying XOR operation with a random key generator. The file's contents are hashed and signed by the user to protect the integrity and authenticity of the files' contents. The applied security services do not result in much complexity and thus it does not affect the system resources. The program usability is easy to handle. The software is not freely available and in case of hunting a copy, it would be hard to run it without disclosing the needed keys. Applying the Arabic letter coding adds more credit to the program usability and availability. Keywords: Software Protection; Security services; Encryption/decryption; Hashing; Digital signature

Exploring performance and energy tradeoffs for irregular applications: A case study on the Tilera many-core architecture

High performance, parallel applications with irregular data accesses are becoming a critical workload class for modern systems. In particular, the execution of such workloads on emerging many-core systems is expected to be a significant component of applications in data mining, machine learning, scientific computing and graph analytics. However, power and energy constraints limit the capabilities of individual cores, memory hierarchy and on-chip interconnect of such systems, thus leading to architectural and software trade-offs that must be understood in the context of the intended application’s behavior. Irregular applications are notoriously hard to optimize given their data-dependent access patterns, lack of structured locality and complex data structures and code patterns.We have ported two irregular applications, graph community detection using the Louvain method (Grappolo) and high-performance conjugate gradient (HPCCG), to the Tilera many-core system and have conducted a detailed study of platform-independent and platform-specific optimizations that improve their performance as well as reduce their overall energy consumption. To conduct this study, we employ an auto-tuning based approach that explores the optimization design space along three dimensions—memory layout schemes, GCC compiler flag choices and OpenMP loop scheduling options. We leverage MIT’s OpenTuner auto-tuning framework to explore and recommend energy optimal choices for different combinations of parameters. We then conduct an in-depth architectural characterization to understand the memory behavior of the selected workloads. Finally, we perform a correlation study to demonstrate the interplay between the hardware behavior and application characteristics.Using auto-tuning, we demonstrate whole-node energy savings and performance improvements of up to 49.6% and 60% relative to a baseline instantiation, and up to 31% and 45.4% relative to manually optimized variants.

ExaSAT: An exascale co-design tool for performance modeling

One of the emerging challenges to designing HPC systems is understanding and projecting the requirements of exascale applications. In order to determine the performance consequences of different hardware designs, analytic models are essential because they can provide fast feedback to the co-design centers and chip designers without costly simulations. However, current attempts to analytically model program performance typically rely on the user manually specifying a performance model. We introduce the ExaSAT framework that automates the extraction of parameterized performance models directly from source code using compiler analysis. The parameterized analytic model enables quantitative evaluation of a broad range of hardware design trade-offs and software optimizations on a variety of different performance metrics, with a primary focus on data movement as a metric. We demonstrate the ExaSAT framework’s ability to perform deep code analysis of a proxy application from the Department of Energy Combustion Co-design Center to illustrate its value to the exascale co-design process. ExaSAT analysis provides insights into the hardware and software trade-offs and lays the groundwork for exploring a more targeted set of design points using cycle-accurate architectural simulators.

Material-centric modeling of PWB fabrication: an economic and environmental comparison of conventional and photovia board fabrication processes

This paper presents an activity-based cost model for printed wiring board (PWB) fabrication in which the process steps are defined by material processing activities. The model is designed to be used during system planning and tradeoff analysis prior to physical design. In many activity-based manufacturing cost models, activities are based on equipment and facilities (equipment-centric). In the present model, the process steps are based on material processing activities (material-centric). Equipment-centric models are appropriate for integrated circuit (IC) manufacture where the processing cost is driven by facilities and equipment; however, in PWB manufacturing, where a significant portion of the cost is materials, it is more appropriate to focus the process modeling around material activities. The models presented in this paper compute the volume of materials used and wasted by the activities associated with the fabrication of PWBs, and in turn, use the computed volumes as inputs for predicting fabrication and waste disposition costs. Activities included in the model are open- and closed-loop plating, coating, etching, stripping, desmearing, plasma etching, lamination, drilling, filling, singulation, and scrapping. Additionally, waste disposition activities that operate on the waste inventory are supported. The models presented here have been integrated into a software tradeoff environment that concurrently performs cost and performance analysis for electronic systems. A tradeoff study is presented that compares the cost and waste associated with fabricating mechanically drilled and plated through-hole PWBs with conventional and alternative resists and two fully-additive photolithographic microvia PWB fabrication processes.

Performance evaluation tools for nuclear based interrogation techniques — an application of the PFNA technology

To facilitate the design and tuning of the Pulsed Fast Neutron Analysis (PFNA) system, under development for non-intrusive inspection of large cargo containers, Science Applications International Corporation (SAIC) has developed and utilized a family of computational tools to encapsulate the essential physics and system characteristics and to serve as a framework for hardware and software trade-off studies. One such tool is the PFNASIM code, a physics based, end-to-end simulator of the entire PFNA technology that maps the atomic densities of any material container to the observed γ-ray counts in each detector. Another tool is the PFNA Performance Evaluation Tool (PFNAPET) that utilizes estimation theory and the output of PFNASIM to predict the minimum error in estimated atomic densities inside the container. These two codes are described and an example of performance evaluation on a cargo container is included.

Concurrent error detection on programmable systolic arrays

Two concurrent error detection (CED) methods are presented. The methods, skewed replicated computation streams and interleaved replicated computation streams, are both well-suited for shared register and other systolic arrays. They allow software tradeoffs between time- and space-multiplexing with no special hardware. The methods can be automatically applied to any systolic program.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

PProto: An environment for prototyping parallel programs

This paper describes Parallel Proto (PProto), an integrated environment for constructing prototypes of parallel programs. Using functional and performance modeling of dataflow specifications, PProto assists in analysis of high-level software and hardware architectural tradeoffs. Facilities provided by PProto include a visual language and an editor for describing hierarchical dataflow graphs, a resource modeling tool for creating parallel architectures, mechanisms for mapping software components to hardware components, an interactive simulator for prototype interpretation, and a reuse capability. The simulator contains components for instrumenting, animating, debugging, and displaying results of functional and performance models. The Pproto environment is built on top of a substrate for managing user interfaces and database objects to provide consistent views of design objects across system tools.

An interactive environment for hardware/software system design at the specification level

An integrated environment, called System Design Workbench (SDW), is under development. SDW is a collection of tools oriented to system specification acquisition, analysis and mapping to alternative architectures. The behavioral description model is based on the Occam 2 language. The innovative idea in SDW is to explore the design space mainly at the behavioral specification level by symbolic processing, according to the rules of an algebra of processes. Transformation and synthesis tasks are controlled by a performance-driven strategy based on timed Petri nets. Hardware versus software tradeoffs are considered in the translation. A visual front-end provides interactive and user-friendly editing of Occam specifications, also supporting early consistency checking.

An eclectic 5th generation architecture for ultra high speed computing

Ultra High Speed Computing will be addressed in the form of a new computing architecture using networks of processors, program partition/allocation techniques, and with specific design elements of the type that would be used for database acceleration. This optimum networking architecture will merge commercially available components and support coordinated algorithms and software methodology to fully exploit potential gains in computational speed through parallel computing. The network of processors to be investigated will be of value at the fine grain level for computational processes and at the large grain level for database and communication processes. The complimentary relationship of dataflow and database technology will be sued to focus the investigations with an emphasis placed on hardware implementation. A Phase I program, described in this paper, would analyze the proposed architecture, including hardware and software tradeoffs, and would define an appropriate simulation based methodology for a future Phase II program in which the candidate designs would be tested.

The Effect of Complexity on Software Trade-Off Equations

(1984). The Effect of Complexity on Software Trade-Off Equations. Journal of Parametrics: Vol. 4, No. 4, pp. 23-32.

Menu-Driven User Interfaces for Videographics

A menu is an array of choices of action or objects available to a user at any given time. At a videographics creation station, this array can be displayed graphically or with text only, on a video monitor or terminal screen. This article describes types of menus, and hardware and software tradeoffs in menu design for videographics creation systems. A typical implementation in software is described. Menus are discussed in terms of user interface design principles and criteria such as clarity, machine attitude, use of modes, hierarchies and branching, feedback, and safety checks.

Maintenance of reliable real time systems: hardware versus software tradeoffs : Inder M. Soi and K. K. Aggarwal. Microelectron. Reliab.22 (3), 357 (1982)

Maintenance of reliable real time systems: hardware versus software tradeoffs : Inder M. Soi and K. K. Aggarwal. Microelectron. Reliab.22 (3), 357 (1982)

Maintenance of reliable real time systems: Hardware versus software tradeoffs

The maintenance features in a high reliability real time control system form an important component in the total system. It is essential that software and hardware maintenance features function in an effective manner to ensure a high level of reliability in real time systems. Hardware maintenance features include redundant processors, self-checking circuits, diagnostic microcode etc., while software maintenance features include fault recovery programmes, audits, diagnostics etc. In this paper, we examine briefly the relationship of maintenance software to hardware in current high reliability real time systems, and how this relationship is likely to change in the future. Discussion in the paper centres around issues such as: factors that contribute to effective maintenance design; hardware characteristics that affect software; partitioning of maintenance functions between software, firmware and hardware; and current trends in maintenance of real time systems.

Hardware/software tradeoffs in a variable word width, variable queue length buffer memory

This paper describes a buffer memory design which is integratable on a single 40 pin package. The memory consists of four variable word width, variable length queues, address logic, and logic for configuring the data widths and queue lengths. Simple program commands input on the data lines reconfigure the memories when the circuit is in program mode. In data mode, WRITE and READ requests to a particular buffer enable the memory to load and access itself, update its pointers, and check for full, empty, and bottom of queue conditions. This design is compared to software methods for queue maintenance. Speed of operation, in terms of memory cycles and register transfers is compared for the two methods, and the hardware complexity of both methods is discussed. A short discussion of hard and software tradeoffs is followed by conclusions.

Communication interface for high-speed synchronous telephone line connection of a master computer with several interactive video terminals

The paper presents the study and prototyping of a suitable interface to connect over a high-speed synchronous telephone line (9600 bps.) a general purpose large computer with a peripheral station equipped with several interactive video-terminals. The interface to be implemented at the peripheral station must realize a typical synchronous transmisson towards the modem and an asynchronous transmission towards the available user terminals. The interfacing system is organized around a suitable microprocessor. The configuration of the system is presented and hardware software trade-offs are discussed in detail. A particular attention is dedicated to the description of a functional unit called peripheral handler, whose main task is the concentration and vectorization of all the interrupt requests coming from the peripheral devices. The proposed design solution is intended to match the different interrupt requests to the rigid time framing imposed by the high-speed synchronous transmission. A particular realization of the system is presented and discussed in detail.

Hardware and Software Trade-offs in Digital Avionic Systems

Many papers have dealt with the advantages of using digital techniques and digital hardware in avionic systems. Attention has also been devoted to the special problems of software and the programming of digital computers, although not much of it has been devoted to specifically avionic applications. Very little has been published on the interaction between the hardware and software aspects of the design of avionic systems or on the trade-offs which are possible between the two. This paper deals with various aspects of these trade-offs.

The challenge of computer graphics in Continental Western Europe

Computer graphics applications, software, and hardware research, are examined and evaluated in Continental Western Europe. Growth has been slow. The reasons are the high cost of hardware and the complexity of the required software. The past reveals a rather dim picture. Mechanical engineering applications have shown some promising success. Electrical engineering applications have been effective mainly for PCB and IC mask layout only. Interactive graphic software has not yet effectively found its way outside Fortran. APL-G seems an interesting graphic extension of the language APL. Promising trends appear to be on the horizon. They are related to hardware and software trade-offs, as, for example, in the TALENT System.The need for computer graphics still exists. The hardware and software tradeoffs will receive more attention. Success in computer graphics will depend upon advances in computer systems design, especially programming languages and systems. Computer graphics has yet to come of age.

The challenge of computer graphics in continental western Europe

Computer graphics applications, software, and hard-ware research, are examined and evaluated in Continental Western Europe. Growth has been slow. The reasons are the high cost of hardware and the complexity of the required software. The past reveals a rather dim picture. Mechanical engineering applications have shown some promising success. Electrical engineering applications have been effective mainly for PCB and IC mask layout only. Interactive graphic software has not yet effectively found its way outside Fortran. APL-G seems an interesting graphic extension of the language APL. Promsing trends appear to be on the horizon. They are related to hardware and software tradeoffs, as, for example, in the TALENT System. The need for computer graphics still exists. The hardware and software tradeoffs will receive more attention. Success in computer graphics will depend upon advances in computer systems design, especially programming languages and systems. Computer graphics has yet to come of age.

Software for automatic testing using minicomputers

Software implementation for automatic test systems controlled by minicomputers can be a costly and time-consuming process. A procedure for implementing software which tends to minimize costs and avoid delays caused by unexpected problems is described. The procedure consists of completely defining the test system functions and performing a series of hardware versus software tradeoffs during the design and implementation process. The purpose of the tradeoffs is to determine the least costly method of implementing tester functions by either hardware, software, or some combination of hardware and software. Delays caused by unexpected problems are reduced by including hardware and software debugging aids which shorten the time to validate the tester system functions. An example of implementing an automatic test system in accordance with these procedures is provided.