Smaller Output Current Ripple Research Articles

Paralleled Variable Inductor Phase-Shifted Full-Bridge Converter With Full-Load Range ZVS and Low Duty Cycle Loss

This paper presents a new phase-shifted full-bridge topology using a new variable inductor. In this topology, a variable inductor is connected in parallel with a near-ideal transformer. The ZVS of the switches is achieved over the full load range using the parallel current provided by the variable inductor. And the adjustable parallel current reduces conduction losses. Under the orthogonal DC magnetic potential, the variable inductor has similar characteristics to the saturated inductor, which is beneficial to reduce the conduction loss caused by the parallel current. Since the topology has no series inductor and the leakage inductor is extremely small, the proposed converter has the advantages of extremely small duty cycle loss, larger transformer turns ratio, smaller primary current stress, smaller secondary voltage stress, and smaller output current ripple, which are beneficial to improve the efficiency and frequency of the converter. An experimental platform was established. Theoretical analysis and experimental verification were carried out.

A High Efficiency Δ-Lr-Y Type Three-Phase Interleaved LLC Converter With Less Transformer Loss

Y-type three-phase interleaved LLC has advantages in high-power applications with small output current ripple. However, the traditional Y-type three-phase interleaved LLC has large winding current under low output voltage and high power (LVHP) applications, which affects the efficiency and power density. In this paper, a high efficiency delta-type three-phase interleaved LLC topology with less transformer losses was proposed. This paper verifies that the transformer loss of the proposed topology is lower than that of the traditional Y-type topology based on the loss model and simulation. Furthermore, considering the coupling between three-phase transformers, a more accurate soft-switching analysis method and the first harmonic gain formula of the proposed topology are given. According to the analysis results, compared with the traditional Y-type topology, only half of the magnetizing current was needed to achieve soft-switching. Meanwhile, the length of the transformer air gap is one-third of the traditional Y-type topology, which can reduce the fringing loss. Finally, a 3 kW prototype was designed and verified. Compared with the Y-type, this paper achieves 19.2% loss reduction.

Minimum-Output-Current-Ripple Control of Current-Fed Three-Level Phase-Shift Full-Bridge Converter

Electrified ports using medium-voltage DC (MVDC) renewable energy microgrids require current-fed dc/dc converters in application scenarios such as battery or ultracapacitor charging units and hydrogen production systems. This paper designs a three-level phase-shift full-bridge (TL-PSFB) converter that interfaces with the MVDC microgrid. Its operation in the current source mode requires a wide output voltage range and small output current ripple. Firstly, the dual-output TL-PSFB topology is introduced, and the principle of phase-shift pulse width modulation (PS-PWM) is presented. Secondly, the principle of the traditional constant-conduction-duty-cycle (CCDC) strategy is analyzed. Then, a minimum-output-current-ripple (MOCR) strategy is proposed by analyzing the relationship between output current ripple, conducting-duty cycle, and phase-shift duty cycle, and a constant current control combined with the MOCR strategy is designed. The output current ripple of the MOCR strategy is smaller than that of the CCDC strategy in a full range of operating conditions. Under the same output current ripple design index, the value and loss of the filter inductor can be reduced with the MOCR strategy. In addition, the MOCR strategy can widen the output voltage regulation range and increase the bus voltage utilization without causing significant changes to the total harmonic distortion (THD) of primary voltage. Finally, experimental results verify the correctness of the theoretical analysis.

2-Phase 3-Level ETSM With Mismatch-Free Duty Cycles Achieving 88.6% Peak Efficiency for a 20-MHz LTE RF Power Amplifier

This letter presents a 2-phase 3-level (2P3L) envelope tracking supply modulator (ETSM) for a long-term evolution 20 MHz (LTE20) radio frequency power amplifier as a solution for the ET system. This 2P3L ETSM that is composed of only switching converters achieves high efficiency, fast transient response, and a small output current ripple. To properly operate the proposed 2P3L ETSM, 4 pulse width modulatiop (PWM) signals with a 90° phase shift from each PWM signal are required without any mismatch between duty cycles. To remove the mismatch, a time-division multiplexing comparator and a duty-cycle calibrator are proposed. Thanks to the proposed techniques, the proposed ETSM fabricated in 0.18-μm CMOS achieved the highest peak dynamic efficiency of 88.6% with an LTE20 signal, which is superior to the state-of-the-art systems.

Soft-Switching Step-Up Converter with Small Output Current Ripple

A soft-switching step-up converter with small output current ripple is proposed in this paper. The proposed converter is based on a voltage-boosting converter, named KY converter which has features such as small output voltage ripple, fast transient response, non-pulsating output current and clamped switch voltage stresses to input voltage. In addition to the features of the KY converter, the proposed converter provides soft-switching of all power semiconductor devices and reduces switching losses by utilizing a small additional inductor. Power switches operate with zero-voltage-switching (ZVS) and a power diode operates with zero-current switching (ZCS). Therefore, the system efficiency is improved and electrical noises are reduced significantly. The operational principle and a steady-state analysis of the proposed converter are provided in detail. In order to verify the theoretical analysis, experimental results based on a 60W prototype at a constant switching frequency of 200 kHz are presented.

Interleaved Flyback Converter with a Lossless Snubber

In this paper, an interleaved flyback converter with a lossless snubber is presented. By freewheeling the energy stored in a snubber, the overall efficiency is improved. In addition, the proposed converter has small output current ripple due to its interleaving structure. Since the proposed converter operates in discontinuous-conduction mode (DCM), the output diodes turned off under zero-current-switching (ZCS) condition and their reverse-recovery problems are alleviated. In order to reduce the current ripple, interleaving operation scheme is adopted. The operational principle and a steady-state analysis of the proposed converter are provided in detail. In order to verify the theoretical analysis, experimental results based on a 90W prototype at a constant switching frequency of 100 kHz are presented.

Design of a single-stage single-switch PFC circuit with a small output current ripple for an LED lamp

A new single-stage power factor correction (PFC) circuit for driving a light-emitting diode (LED) is proposed in this paper. This circuit makes it possible to have a low output ripple due to the energy storage capacitor on the primary side. The proposed circuit is compatible with a primaryside regulation (PSR) chip. The operating principle of the proposed circuit is analyzed, design guidelines for the proposed circuit are presented, and prototype of the proposed circuit was built. The results of the experiment showed that this proposed circuit could achieve a significant reduction in the LED current ripple and could maintain a reasonable efficiency and power factor.

A Four-Phase Forward Converter Using an Integrated Transformer

The interleaved converter topology has attractive features that include high output current, small output-current ripple, and fast transient response. In this paper, an interleaved four-phase forward converter using an integrated transformer is proposed for telecommunication and computer applications. The proposed converter requires only one integrated transformer instead of four step-down transformers. The z-parameter (gyrator) model and the equivalent-circuit model of the integrated transformer are derived. The circuit operation and design criteria are described. Theoretical analyses are verified by simulated and experimental results.