Thermal noise requires careful consideration during the design process of RSFQ circuits since it reduces circuit operating margins and can cause switching errors. Bit error rate (BER) provides a useful means of analysing the effect of this noise on a circuit. With tools developed under the IARPA SuperTools project, we present an implementation of the Monte-Carlo technique for determining BER via simulation. The Monte-Carlo method has been considered previously but not widely implemented due to slow simulation times preventing the determination of small BER values. We use JoSIM – an efficient simulator with SPICE syntax that allows for the simulation of superconducting components and noise sources with improved speed over older superconductor simulators. This speed improvement makes the Monte-Carlo method viable. The simulated BER is plotted against bias current with values in the low-BER region interpolated from the simulated values using MATLAB. We show how the results need to be used as a further qualifier of circuit performance for the characterization of a logic cell library.
Read full abstract