Handling constraints imposed on physical dimensions of microwave circuits has become an important design consideration over the recent years. It is primarily fostered by the needs of emerging application areas such as 5G mobile communications, internet of things, or wearable/implantable devices. The size of conventional passive components is determined by the guided wavelength, and its reduction requires topological modifications, e.g., transmission line folding, or utilization of compact cells capitalizing on the slow-wave phenomenon. The resulting miniaturized structures are geometrically complex and typically exhibit strong cross coupling effects, which cannot be adequately accounted for by analytical or equivalent network models. Consequently, electromagnetic (EM)-driven parameter tuning is necessary, which is computationally expensive. When the primary objective is size reduction, the optimization task becomes far more challenging due to the presence of constraints related to electrical performance figures (bandwidth, power split ratio, etc.), which are all costly to evaluate. A popular solution approach is to utilize penalty functions. Therein, possible violations of constraints degrade the primary objective, thereby enforcing their satisfaction. Yet, the appropriate setup of penalty coefficients is a non-trivial problem by itself, and is often associated to extra computational expenses. In this work, we propose an explicit approach to constraint handling, which is combined with the trust-region gradient-search procedure. In our technique, the decision about the adjustment of the search radius is determined based on the reliability of rendering the feasible region boundary by linear approximation models of the constraints. Comprehensive numerical experiments conducted using three miniaturized coupler structures demonstrate superiority of the presented method over the penalty function paradigm. Apart from the efficacy, its appealing features include algorithmic simplicity, and no need for tailoring the procedure for a particular circuit to be optimized.
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