Single TFT Research Articles

A Capacitor-Based Synaptic Device with IGZO Access Transistors for Neuromorphic Computing

IGZO TFT has extremely low leakage current characteristics compared to Si-CMOS, so it can be applied not only to displays but also to various research fields. One of the important applications using IGZO TFT is analog-based synaptic device for the efficient implementation for deep learning. The application of IGZO TFT to a synaptic device was more widely studied after a synaptic device based on Si-CMOS and capacitor was devised in 2017(1). Since insufficient retention time was a remaining problem in Si-CMOS and capacitor-based storage synaptic devices, the combination of IGZO TFT with low leakage current and capacitor was a very attractive solution. However, because the viable p-type metal oxide TFT does not exist, linearity and symmetry of weight update, a major requirement of on-chip trainable synaptic devices, has been difficult to achieve. In our research, for the first time, we obtained linear and symmetric weight update characteristics by combining an IGZO TFT and a capacitor.In addition, we verified the leakage characteristics of IGZO TFT and the retention characteristics of synaptic devices, which are the most important characteristics. Through the single TFT measurement result, we were able to obtain a leakage current per channel width 1µm of 10-17A, which is much smaller than the Si transistor. Lower leakage current will lead to better retention characteristics than conventional Si-CMOS-based devices, which will result in higher accuracy in deep neural network training. Based on the published results, the IGZO TFT synapse is projected to be able to achieve the retention time of ~4×109s using only 10fF capcacitor.Another important factor that affects deep neural network training is cell-to-cell and device-to-device variation. As opposed to capacitive synaptic devices, resistive synaptic devices such as Resistive RAM and Phase Change Memory suffer from large device variation. We also verified the device variation characteristics, which are advantages of charge storage devices based on transistors and capacitors. The variation characteristics of the device were evaluated through the ΔG+3σ/ΔG-3σ(%) formula and an excellent result of ~200% was obtained.In our research, we verified the main characteristics for on-chip training of synaptic devices based on IGZO TFT and capacitor: linearity and symmetry of weight update, retention characteristics and variation characteristics. The remarkable characteristics of synaptic devices based on IGZO TFT and capacitor will be a good candidate for on-chip training.1. S. Kim, T. Gokmen, H. M. Lee, and W. E. Haensch, Midwest Symp. Circuits Syst., 2017-Augus, 422–425 (2017).AcknowledgementsThis research was supported by National R&D Program through the National Research Foundation of Korea(NRF) funded by Ministry of Science and ICT(NRF-2020M3F3A2A01081240)

Flexible IGZO TFT SPICE Model and Design of Active Strain-Compensation Circuits for Bendable Active Matrix Arrays

The detailed measurement and characterization of strain-induced performance variations in flexible InGaZnO thin-film transistors (IGZO TFTs) resulted in a SPICE TFT model able to simulate tensile and compressive bending. This model was used to evaluate a new concept, namely, the active compensation of strain-induced performance variations in pixel driving circuits for bendable active matrix arrays. The designed circuits can compensate the mobility and threshold voltage shifts in IGZO TFTs induced by bending. In a single TFT, a drain current of 1mA varies by $83~\mu \text{A}$ per percent of mechanical strain. The most effective compensation circuit design, comprising one additional TFT and two resistors, reduces the driving current variation to $1.1~\mu \text{A}$ per percent of strain. The compensation circuit requires no additional control signals and increases the power consumption by only $235~\mu \text{W}$ (corresponds to 4.7%). Finally, switching operation is possible for frequencies up to 200 kHz. This opens a way toward the fabrication of flexible displays with constant brightness even when bent.

A Low-Power Analog Adder and Driver Using a-IGZO TFTs

This paper presents a novel low-power analog circuit, with n-type IGZO TFTs that can function as an adder operator or be designed to operate as a driver. Experiments were set to show summation of up to four signals. However, the design can easily be expanded to add higher number of signals, by appending a single TFT at the input per each additional signal. The circuit is simple, uses a single power supply irrespective to the number of input voltage signals, and shows good accuracy over a reasonable range of input values. By choosing proper TFT dimensions, the topology can replace the typical output drivers of TFT amplifiers, namely the common-drain with current source biasing, or the common-source with diode connected load. The circuit was fabricated with a temperature that does not exceeds 200 °C. Its performance is characterized from measurements at room temperature and normal ambient, with a power supply voltage of 12 V and a load of $\approx ~4$ pF. The proposed circuit has shown a linearity error less than 3.2% (up to an input signal peak-to-peak value of 2 V), a power consumption of $78~ {\mu }\text {W}$ and a bandwidth of $\approx 115$ kHz, under worst case condition (when it is adding four signals with the same frequency). It has shown superior performance in terms of linearity when compared to the typical drivers considered in this study. In addition, it has shown almost the same behavior when measurements were repeated after one year. Therefore, the proposed circuit is a robust viable alternative to conventional approaches, being more compact, and contributes to increase the functionality of large-area flexible electronics.

42-4:Invited Paper: A Full-Color Electrophoretic Display

Full color electrophoretic displays utilizing colored particles, no color filter array, and a single TFT array backplane have been demonstrated for the first time. A full color gamut including all eight primary colors has been achieved with a single layer of electrophoretic fluid addressed with voltages compatible with commercially demonstrated TFT backplanes. Displays have been made with incorporation of the electrophoretic fluid into both Microcup® and microcapsule structures.

Thin Film Transistors as Driving Devices for Attached Devices

TFTs have been the most popular devices for the large area active matrix flat panel displays for the past 20 years. The a-Si:H TFT is suitable for driving the liquid crystal in the pixel level because of its characteristics of low power consumption, gray scale capability, low leakage current, etc. [1]. The a-Si:H TFT array can be easily fabricated on the large area glass substrate with a high throughput at a low temperature. However, the low mobility limits its applications in many areas. For example, the OLED has been widely studied as a potential replacement of the LCD for its low power consumption, contact size, and good color quality. However, for the high quality displays, TFTs are required to drive the OLED pixels [2]. It is difficult or impossible to drive each OLED pixel with a single a-Si:H TFT. The high mobility poly-Si or oxide TFTs are proper for this application. In addition, there are many studies on using the TFT as a driving or sensing device for purposes of chemical or biological sensing, detection, or imaging [2,3]. For some new applications, the high mobility is often required. In this paper, authors investigated limitations on applying a single TFT to driven a device.Figure 1 shows a simple system of a TFT attached with a resistor to the drain electrode. Since a large number of the attached devices change their conductivities upon exposure to selected chemicals, biological agents, optical intensity, or mechanical stress, the resistance is used as a reference of the change. Figure 2 shows the drain current change with the resistance (r) of the resistor attached to the TFT. The poly-Si TFT (W/L = 12m/6m) has a field effect mobility (meff ) of ~ 235 cm2/V.s, an on current (Ion ) of 1.8x10-4 A , a threshold voltage (Vt ) of 0.45V, and a subthreshold slope (S) of 0.26 V/dec. The TFT gate voltage (Vg ) was fixed at 9 V and the complete system was driven at VD’ = 10V. Both the current passing the resistor, i.e., ID , and the drain voltage (VD ) decrease monotonically with the increase of r. Since the ID ’s in Fig. 1 are below that of the TFT without the attached resistor, the performance of the system is controlled by the resistor. This kind of system can be used to detect the change of the environment, such as the light intensity or gas composition, when the resistor responds to the variation of a parameter. For the Fig. 1 system, the power applicable to the resistor is limited. For example, Figure 3 shows that the maximum power is obtained when the resistance is about 100 ohm. TFTs are usually used as switching devices. However, there are limits on the physical characteristics of the attached device. If the power required for the attached device is beyond the peak power in Fig. 3, it cannot be fully turned on although the complete system can be built. For certain applications, such as MEMS or LEDs, the peak power can be a good guideline on selecting the TFT or designing the attached device. The peak power can be increased with the improvement of the TFT characteristics, such as the meff or W/L ratio, however, with limits. The reliability of the TFT is an important issue in the Fig. 1 system. In addition to the environmental factors, e.g., humidity, light, and temperature, the lifetime has to be kept long. For example, the TFT can deteriorate, e.g., increasing the off current, the threshold voltage, or the subthreshold slope, during the driving of the attached device with a high current or for an extended period of time. Possible solutions and limitations will be discussed. Geng-Wei Chang thanks the National Science Council Graduate Students Study Abroad Program for supporting his study in Prof. Yue Kuo’s Thin Film Nano & Microelectronics Research Laboratory. [1] Y. Kuo, ECS Interface, 22(1), 55 (2013).[2] Y. Kuo, Chap. 13, Thin Film Transistors, Vol. 2, p. 464, Kluwer Academic Publishers (2004).[3] Y. Kuo, Chap. 11, Thin Film Transistors, Vol. 1, p. 485, Kluwer Academic Publishers (2004).

Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors.

Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and/or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of approximately 10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical fill factors that are close to unity. In addition, the greater complexity of PSI-2 and PSI-3 pixel circuits, compared to that of PSI-1, has no observable effect on spatial resolution. Both PSI-2 and PSI-3 exhibit high levels of additive noise, resulting in no net improvement in the signal-to-noise performance of these early prototypes compared to conventional AMFPIs. However, faster readout rates, coupled with implementation of multiple sampling protocols allowed by the nondestructive nature of pixel readout, resulted in a significantly lower noise level of approximately 560 e (rms) for PSI-3.

P-11: Integrated Gate Driver Circuit with One Conduction Path for Charge-Discharge

We developed a 12.1 inch SXGA (1280*800) prototype panel by integrated gate driver circuit using the single TFT to charge and discharge. By the confirmation of the simulation and measurement results, a fast response pulse, simple structure circuit and high performance panel by using the proposed circuit is feasible.