Single Front-end Research Articles

Digital twin of a city: Review of technology serving city needs

Digital twins (DTs) have been found useful in manufacturing, construction, and maintenance. Adapting DTs to serve cities, the question arises of what an urban digital twin should contain and how it should be orchestrated to serve a city’s dynamical ecosystem, along with how to enhance the efficiency of the city. We are aligning with the commonplace idea that the main advantage of using DTs is economical as, for example, DTs can improve the planning of activities thus saving money and time. But how can they be useful for a city? Instead of looking at the DTs as solutions in search of problems to be solved, we start from city needs. Our approach is two-fold. We start by briefly reviewing existing possibilities for meeting some specific needs, but keep the focus on identifying and attempting to close the gap between the needs arising from everyday city functions and the latest DT techniques useful for meeting those needs. DTs are technically different and serve different applications, yet they share a common identity and name, as well as several technical similarities. Adopting computer science terminology, we see a back-end city DT as the container of all information, while any single front-end, visualized or used either by humans or robots, offers a limited but meaningful representation of the DT for a specific application. Alas, there are multiple open questions regarding the realization and benefits of such back-end DT. Nevertheless, we discuss how the back-end DT (or any specific DT) could be updated autonomously from sensor data using artificial intelligence techniques, and how the front-ends could be used for large benefits to the entire city ecosystem. • There is a call to better match DT technology to meet overall city needs. • City DTs differ from DTs used in manufacturing, construction, and maintenance. • Differences include both technical (BIM-GIS) and human factor-induced complexities. • Novel AI methods could serve in automated updating of city DTs from sensor data. • Human factors and inclusion of third parties need to be considered for city DTs.

(Invited) Automated Multiscale Design Flow for Organic LED Design

Material scientists can synthesize many organic semiconductors and dopants. While this presents a unique opportunity to device designers, discovering carrier transport parameters becomes a challenge for simulators. To overcome this, a seamless flow that links quantum chemistry calculations to TCAD driven from a single front end GUI is presented here. The developed multiscale simulation workflow links the microscopic to device scale, thereby connecting fundamental chemistry with device design in a parameter-free simulation of a 5-layer red oLED stack with an α-NPD:Ir(MDQ)2(acac) emission layer.In materials development, quantum chemistry approaches are applied to compute fundamental molecular properties such as orbital energies (HOMO/LUMO) or excitation spectra. Continuum models such as drift diffusion on the other hand are efficient tools for device designers to simulate characteristics such I-V or quantum efficiency of multilayer OLED stacks, based on parametric models.There are shortcomings that hinder the full exploitation of virtual design for organic electronics. Quantum chemistry methods used to compute properties of single molecules in vacuum neglects the interaction between molecules in organic thin films. Examples include material specific shifts in transport levels (ionization potential, IP, and electron affinity, EA) due to polarization effects, or energy disorder. Mesoscopic material properties such as charge carrier mobility or accurate transport levels (IP/EA) cannot be computed with these methods. These material-specific quantities, however, are essential input parameters for drift diffusion models. Device level simulations of multilayer OLEDs therefore rely on time-consuming and costly measurements.Consequently, the translation of microscopic properties to the device level is not possible. Further, established methods do not allow developers to analyse chemical structure impact on device performance.Digital twins of organic layers, constructed by mimicking physical vapour deposition, the properties of molecules embedded in thin films are calculated by taking into account environmental effects on a full quantum-mechanical level.1–5 Besides ab-initio access to transport energies, these molecular quantities are used to compute rates for all microscopic processes that determine device performance, including charge hops between molecules, exciton formation or quenching events. Based on these rates, kinetic Monte-Carlo (KMC) simulations are used to compute material-specific macroscopic properties such as charge carrier mobilities, which are automatically fed to drift diffusion models.6–9Drift diffusion calculations were performed using Silvaco Atlas.10,11 Quantum mechanical and KMC calculations provided the affinity, LUMO and HOMO values, material disorder and carrier mobility for the OLED stack.This seamless workflow allows full virtual design that features: Linking fundamental chemistry to device design for accurate design rules.Insight into particle distributions and processes that cannot be measured experimentally.Discovery of the best material and device performance within the design space.No parametrization of drift diffusion models via experiment is required. All inputs computed from first principles.Steering the development of physics based SPICE compact models. Funding was received from the European Union Horizon 2020 research and innovation programme. Grant agreement No. 646176 (EXTMOS) Neumann, T., Danilov, D., Lennartz, C. & Wenzel, W. Modeling disordered morphologies in organic semiconductors. Journal of Computational Chemistry vol. 34 2716–2725 (2013).Friederich, P., Rodin, V., von Wrochem, F. & Wenzel, W. Built-In Potentials Induced by Molecular Order in Amorphous Organic Thin Films. ACS Appl. Mater. Interfaces 10, 1881–1887 (2018).Friederich, P., Symalla, F., Meded, V., Neumann, T. & Wenzel, W. Ab Initio Treatment of Disorder Effects in Amorphous Organic Materials: Toward Parameter Free Materials Simulation. Journal of Chemical Theory and Computation vol. 10 3720–3725 (2014).Friederich, P., Meded, V., Symalla, F., Elstner, M. & Wenzel, W. QM/QM Approach to Model Energy Disorder in Amorphous Organic Semiconductors. Journal of Chemical Theory and Computation vol. 11 560–567 (2015).Friederich, P. et al. Molecular Origin of the Charge Carrier Mobility in Small Molecule Organic Semiconductors. Advanced Functional Materials vol. 26 5757–5763 (2016).Symalla, F. et al. Multiscale Simulation of Photoluminescence Quenching in Phosphorescent OLED Materials. Advanced Theory and Simulations vol. 3 1900222 (2020).Symalla, F. et al. 19‐4: Boosting OLED Performance with Ab‐initio Modeling of Roll‐off and Quenching Processes. SID Symposium Digest of Technical Papers vol. 50 259–262 (2019).Symalla, F. et al. 26-4: Computer-Aided Optimization of Multilayer OLED Devices. SID Symposium Digest of Technical Papers vol. 49 340–342 (2018).Symalla, F. et al. Charge Transport by Superexchange in Molecular Host-Guest Systems. Phys. Rev. Lett. 117, 276803 (2016).Introduction to Silvaco© ATLAS TCAD Software. Modeling and Electrothermal Simulation of SiC Power Devices 19–50 (2019) doi:10.1142/9789813237834_0003.SILVACO, ATLAS User’s Manual-DEVICE SIMULATION SOFTWARE, USA, Santa Clara, 2020 Figure 1

Low-Complexity Adaptive Spatial Processing of ESPAR Antenna Systems

Accessing the spatial domain of wireless environments through antenna arrays has become key to improve the use of energy and, in light of this, there is an increasing need for low cost multi-antenna architectures. As one alternative, the Electronically Steerable Parasitic Array Radiator (ESPAR) was proposed as a coupling-based inexpensive option; allowing to significantly reduce the amount of required radio frequency (RF) front-ends. As a caveat, due to its inherent non-linear behavior, the required computational complexity can be prohibitive. Additionally, the unavailability of precise mutual coupling and channel state information (CSI) becomes a further issue difficult to avoid in practical setups. In this regard, the current work has two main contributions: a) it deals with the computational complexity by proposing the linearization of ESPAR’s system model through the truncated Taylor expansion of the admittance matrix; facilitating the spatial processing algorithm of interest. Also, the authors propose b) to face the mutual coupling and CSI unavailability issue via the joint estimation of the channel-ESPAR parameters as directly observed through the single RF front-end. Relying on the optimization of the linearized system model, the pilot-based algorithm to be introduced allows ESPAR to track the configuration that synthesizes coherent combination at a significantly low complexity. Particularly, as shown through Monte-Carlo simulation, the latter allows to obtain 4 dB of array gain with a single RF front-end via a 5-element ESPAR.

Multi-Mode 60-GHz Radar Transmitter SoC in 45-nm SOI CMOS

This article introduces an architecture for a millimeter-wave multi-mode radar transmitter IC, which supports three key radar waveforms: 1) continuous-wave (CW/FMCW); 2) pulse; and 3) phase-modulated continuous-wave (PMCW), all from a single front end. The proposed IC, implemented in a 45-nm CMOS silicon-on-insulator (SOI) process for operation in the 60-GHz band, integrates a broadband frequency tripler, a two-stage pre-amplifier, two power mixers, and mixed-signal baseband waveform generation circuitry. The transmitter radar operation in multiple modes is enabled by configuring the power mixers and the associated waveform baseband circuitry. An important advantage of this approach is that the overall signal bandwidth, a key performance metric in radar, is limited only by the RF output nodes in pulse generation. A novel broadband frequency tripler design technique based on a current-reuse topology is also proposed for LO generation with >59% output fractional bandwidth. On-wafer measurement results for the full TX IC in CW mode show an average output power of 12.8 dBm from 54 to 67 GHz with a peak power of 14.7 dBm and the harmonic rejection ratio >27 dB. The measurement in pulse mode demonstrates programmable pulsewidth from 20 to 140 ps, which translates to >40-GHz radar signal bandwidth. The PMCW mode operation is also demonstrated in this case with 10-Gb/s PRBS modulated radar signal. The IC consumes 0.51 W and occupies $2.3\times 0.85$ mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of die area excluding pads.

Single JFET Front-End Amplifier for Low Frequency Noise Measurements with Cross Correlation-Based Gain Calibration

We propose an open loop voltage amplifier topology based on a single JFET front-end for the realization of very low noise voltage amplifiers to be used in the field of low frequency noise measurements. With respect to amplifiers based on differential input stages, a single transistor stage has, among others, the advantage of a lower background noise. Unfortunately, an open loop approach, while simplifying the realization, has the disadvantage that because of the dispersions in the characteristics of the active device, it cannot ensure that a well-defined gain be obtained by design. To address this issue, we propose to add two simple operational amplifier-based auxiliary amplifiers with known gain as part of the measurement chain and employ cross correlation for the calibration of the gain of the main amplifier. With proper data elaboration, gain calibration and actual measurements can be carried out at the same time. By using the approach we propose, we have been able to design a low noise amplifier relying on a simplified hardware and with background noise as low as 6 nV/√Hz at 200 mHz, 1.7 nV/√Hz at 1 Hz, 0.7 nV/√Hz at 10 Hz, and less than 0.6 nV/√Hz at frequencies above 100 Hz.

A seven-port receiver for MIMO wireless communications

A single front-end seven-port receiver is proposed and analyzed for multiple-input and multiple-output (MIMO) systems. This new architecture uses a single front-end in order to recieve two input RF modulated signals with Alamouti coding which reduces cost and complexity in the RF section compared to classical six-port based receivers adapted for $$2\times 2$$ MIMO application. We also analyzed the capability of our proposed single front-end seven-port receiver for 2 $$\times$$ N MIMO application with Alamouti coding, and evaluated its advantages and disadvantages versus classical MIMO six-port receivers. The performance of our proposed seven-port receiver is assesed in terms of two input QPSK modulated signals; then calculating the bit error rates (BERs). The obtained results demonstrate that the proposed seven-port receiver can be a candidate for using in MIMO communication systems.

Research and Application of Micro Frontends

The content management system is an indispensable part of enterprise information construction. With the rise of the concept of front and rear separation and the maturity of related technologies, it is a better choice to create a multi-functional front-end web application in complex large-sized or medium-sized projects, which sits on top of a microservices-based architecture. As the business grows, the single front end becomes more and more bloated, resulting in a single page application that is not well scaled and deployed, and difficult to maintain. Based on the analysis of above problems, combined with the corresponding front-end technology, this paper applies the microservice concept to the development of front-end and proposes a design scheme of content management system based on micro frontends. Besides, the key issues in practice process, such as micro frontends design concept and implementation methods are described in detail.

A Micromegas-based telescope for muon tomography: The WatTo experiment

This paper reports about the first Micromegas-based telescope built for applications in muon tomography. The telescope consists of four, 50×50cm2 resistive multiplexed Micromegas with a 2D layout and a self-triggering electronics based on the Dream chip. Thanks to the multiplexing, the four detectors were readout with a single Front-End Unit. The high voltages were provided by a dedicated card using low consumption CAEN miniaturized modules. A nano-PC (Hummingboard) ensured the HV control and monitoring coupled with a temperature feedback as well as the data acquisition and storage. The overall consumption of the instrument yielded 30W only, i.e. the equivalent of a standard bulb. The telescope was operated outside during 3.5months to image the water tower of the CEA-Saclay research center, including a 1.5-month campaign with solar panels. The development of autonomous, low consumption muon telescopes with unprecedented accuracy opens new applications in imaging as well as in the field of muon metrology.

Implementation of the Timepix ASIC in the Scalable Readout System

We report on the development of electronics hardware, FPGA firmware and software to provide a flexible multi-chip readout of the Timepix ASIC within the framework of the Scalable Readout System (SRS). The system features FPGA-based zero-suppression and the possibility to read out up to 4×8 chips with a single Front End Concentrator (FEC). By operating several FECs in parallel, in principle an arbitrary number of chips can be read out, exploiting the scaling features of SRS. Specifically, we tested the system with a setup consisting of 160 Timepix ASICs, operated as GridPix devices in a large TPC field cage in a 1T magnetic field at a DESY test beam facility providing an electron beam of up to 6GeV.We discuss the design choices, the dedicated hardware components, the FPGA firmware as well as the performance of the system in the test beam.

Design of Single Phase Active Front End Converter With Reduced Line Current Harmonics for Power Factor Improvement

Low power factor and high harmonic content are the major drawbacks of conventional front end converters. This paper is based on the difference between the performance of single phase diode bridge rectifier and the active front-end converter in terms of the %THD of the line current and power factor improvement. There are some of the major disadvantage of conventional front-end rectifiers like low power factor and high harmonic content. Hence, there is a continuous need for improvement of power factor and reduction of line current harmonics. Development of new circuit topologies and control strategies for Power Factor Correction (PFC) and harmonic reduction has become still more essential with the introduction of strong technical IEC standards. This work is basically on Power Factor improvement using phase shifted Technique in which the two single phase converters are connected in parallel to meet the load demand as well as to improve the power factor. Power factor of the source side will be maintained nearly unity. Output DC link voltage will remain constant irrespective of load variation. The control strategy for single phase front end converter consists of inner current-loop and outer voltage-loop. The proposed converter operates in forward power as well as in reverse power conditions.

Dual-Carrier Aggregation Receiver With Reconfigurable Front-End RF Signal Conditioning

A reconfigurable receiver that can support dual-carrier aggregation is demonstrated. Switched Capacitor (SC) technique is explored at the receiver front-end for direct RF signal conditioning. By changing the connections of the switches and capacitors, various filtering profiles, including bandpass and notch functions, can be synthesized. On the other hand, complex-domain signal processing enables RF selectivity with controllable offset frequency relative to the LO frequency. Therefore, multiple RF channels can be selected simultaneously by multiple complex-domain signal processors and a shared single front-end. The scheme also enables a 4th-order RF bandpass transfer function by combining two 2nd-order bandpass transfer functions with slightly different center frequencies. In this work, a combination of a reconfigurable front-end passive SC network and two concurrent complex-domain signal processors enables the receiver to handle different signal scenarios. A proof-of-concept CMOS chip fabricated in a 65 nm CMOS technology is presented that supports single-channel and dual-carrier aggregation receiving modes. The receiver covers the frequency range from 0.1 to 1 GHz. The frequency distance between two concurrent RF channels can be tuned anywhere between 0 to +100 MHz. The near-band blocker resilience is improved by 15 dB when the front-end is configured as a notch filter.

Radar and GPS System Inter-Operability with UWB-OFDM Signals

Ultra-wideband (UWB) signals and systems find increasing use in the fields of high-resolution radar, communication and networking, precision navigation, and others. There is a valid concern, however, that these systems may impose undesirable interference on other services used in airborne platforms, e.g., GPS. This potential disadvantage complicates and even prohibits use of in-band UWB and GPS systems. To mitigate this limitation, it is proposed to use an UWB-orthogonal frequency-division multiplexing (OFDM) system concept which allows for dynamic spectrum adjustments. An OFDM signal model is derived, and a system model with a single antenna and analog front-end (AFE) for both UWB-OFDM radar and a GPS receiver is analyzed. It is shown that such a system would permit inter-operability of in-band OFDM and GPS for OFDM signals, given that the OFDM signal power does not exceed a critical level determined by the GPS receiver implementation. Conclusions regarding potential benefits and system implementations of the proposed concept are also discussed.

Avoiding Data Loss With Hard and Soft DVB-H Handovers

Digital Video Broadcasting-Handheld (DVB-H) allows the efficient transmission of rich multimedia services to small, handheld terminals. Such portable terminals pose specific requirements on the transmission technology, such as the need for seamless cell handover. This paper first presents mechanisms which allow loss-free hard handovers with DVB-H using only a single receiver front-end. It is then shown how even 3G-like soft handovers are possible with DVB-H, still using only a single receiver front-end. The proposed schemes are evaluated using simulations and field measurements.

The customer always comes first

As the number of payment systems proliferates, financial institutions can save millions if they give customers a single identification and verification front end. ActivCard's Andy Churley explains.

Code-division multiplexing of a sensor channel: a software implementation

This paper demonstrates the use of software radio techniques in the context of sensing, rather than communications. It describes code-division multiplexing (CDMA) and time-division multiplexing (TDMA) of a receiver channel in an electric field sensing system. The only hardware used is a front-end gain stage consisting of two opamps and a microcontroller. The modulation and demodulation operations are implemented entirely in the microcontroller software. Multiple coded waveforms are transmitted simultaneously, and induce a combined signal on a single receive electrode. The combined signal, after passing through a single analog front end terminating in an analog-to-digital converter, is separated into the four original component signals by a software demodulation operation. The signal-to-noise ratio (SNR) achieved by the code-division multiplexed system given a fixed measurement time is compared to the SNR achieved by a time-division multiplexed implementation given the same total measurement time. The paper also compares the scaling of TDMA and CDMA performance with the number of transmitted channels and the number of demodulated channels.

CODA: a scalable, distributed data acquisition system

A new data acquisition system has been designed for physics experiments scheduled to run at CEBAF starting in the summer of 1994. This system runs on Unix workstations connected via ethernet, FDDI, or other network hardware to multiple intelligent front end crates/spl minus/VME, CAMAC or FASTBUS. CAMAC crates may either contain intelligent processors, or may be interfaced to VME. The system is modular and scalable, from a single front end crate and one workstation linked by ethernet, to as many as 32 clusters of front end crates ultimately connected via a high speed network to a set of analysis workstations. The system includes an extensible, device independent slow controls package with drivers for CAMAC, VME, and high voltage crates, as well as a link to CEBAF accelerator controls. All distributed processes are managed by standard remote procedure calls propagating change-of-state requests, or reading and writing program variables. Custom components may be easily integrated. The system is portable to any front end processor running the VxWorks real-time kernel, and to most workstations supplying a few standard facilities such as rsh and X-windows, and Motif and socket libraries. Sample implementations exist for 2 Unix workstation families connected via ethernet or FDDI to VME (with interfaces to FASTBUS or CAMAC), and via ethernet to FASTBUS or CAMAC.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>