Single Crystalline Si Nanomembrane Research Articles

Self-Rolled-Up Ultrathin Single-Crystalline Silicon Nanomembranes for On-Chip Tubular Polarization Photodetectors.

Freestanding single-crystalline nanomembranes and their assembly have broad application potential in photodetectors for integrated chips. However, the release and self-assembly process of single-crystalline semiconductor nanomembranes still remains a great challenge in on-chip processing and functional integration, and photodetectors based on nanomembrane always suffer from limited absorption of nanoscale thickness. Here, a non-destructive releasing and rolling process is employed to prepare tubular photodetectors based on freestanding single-crystalline Si nanomembranes. Spontaneous release and self-assembly are achieved by residual strain introduced by lattice mismatch at the epitaxial interface of Si and Ge, and the intrinsic stress and strain distributions in self-rolled-up Si nanomembranes are analyzed experimentally and computationally. The advantages of light trapping and wide-angle optical coupling are realized by tubular geometry. This Si microtube device achieves reliable Ohmic contact and exhibits a photoresponsivity of over 330mA W-1 , a response time of 370 µs, and a light incident detection angle range of over 120°. Furthermore, the microtubular structure shows a distinct polarization angle-dependent light absorption, with a dichroic ratio of 1.24 achieved at 940nm. The proposed Si-based microtubes provide new possibilities for the construction of multifunctional chips for integrated circuit ecosystems in the More than Moore era.

Influence of Self-Heating Effect on Interface Trap Generation in Highly Flexible Single-Crystalline Si Nanomembrane Transistors.

We analyze the interface trap states generated by the self-heating effect in flexible single-crystalline Si nanomembrane (sc-Si NM) transistors. Despite the excellent device performance (Subthreshold swing: ~61 mV/dec, Ion/off: ~109, Nit: ~5 × 1010 cm-2, µeff: ~250 cm²/V·s) and mechanical flexibility (RB,min ═ 1 mm) of sc-Si NM transistors on a polymer substrate, they are vulnerable to thermal reliability issues due to the poor thermal conductivity (κ < 1 W/m·K) of the polymer substrate. Understanding the detailed mechanism driving heat-related device degradation is key to improving device reliability, life expectancy, and overall device performance. Thus, a charge pumping method was employed to systematically analyze the device degradation caused by the self-heating effect. This enabled the interface trap density to be investigated for the flexible sc-Si NM transistors on a polymer substrate after a bias stress. For comparison, a heat spreading layer (HSL) made using a 1-µm thick Ag film (κ~400 W/m·K) was integrated into the sc-Si NM device to mitigate the self-heating effect. The results showed that the interface trap density was proportional to the self-heating effect. This facilitated the fundamental understanding of the self-heating effect of flexible sc-Si NM transistors, opening a robust route to realizing high performance flexible devices using sc-Si NM.

Atomic-layer-deposited HfO2/Al2O3 laminated dielectrics for bendable Si nanomembrane based MOS capacitors

Flexible metal-oxide-semiconductor capacitors in a vertical structure using the single-crystalline Si nanomembrane (NM) with a HfO2/Al2O3 bilayer gate stack prepared by atomic layer deposition have been fabricated on plastic substrates by flip-transfer printing of Si NM/Ti/Au based trilayer heterostructures (1.3 cm × 0.9 cm × 360 nm). The electrical properties of the bilayer structure exhibit an excellent improved capacitance-voltage (C-V) frequency dispersion feature associated with an inhibited weak inversion hump and significantly larger accumulation capacitance, thus indicating the effectiveness of the passivation utilizing bilayer high-k dielectrics on a Si NM channel compared with monolayer HfO2. A comprehensive electromechanical characterization has been conducted for HfO2/Al2O3 stacked structures to investigate the effect of bending strain on C-V characteristics, leakage current density, and the associated evolution of interface charges. The presented research will be beneficial to realizing high performance thin-film transistors with lower operating voltage and higher driving current required in emerging flexible and stretchable electronics via optimized design of a nanolaminate gate stack and understanding the impact of mechanical strains on the electrical behavior of such MOS devices.

High-Performance Flexible Single-Crystalline Silicon Nanomembrane Thin-Film Transistors with High- k Nb2O5-Bi2O3-MgO Ceramics as Gate Dielectric on a Plastic Substrate.

A novel method of fabricating flexible thin-film transistor based on single-crystalline Si nanomembrane (SiNM) with high- k Nb2O5-Bi2O3-MgO (BMN) ceramic gate dielectric on a plastic substrate is demonstrated in this paper. SiNMs are successfully transferred to a flexible polyethylene terephthalate substrate, which has been plated with indium-tin-oxide (ITO) conductive layer and high- k BMN ceramic gate dielectric layer by room-temperature magnetron sputtering. The BMN ceramic gate dielectric layer demonstrates as high as ∼109 dielectric constant, with only dozens of pA current leakage. The Si-BMN-ITO heterostructure has only ∼nA leakage current at the applied voltage of 3 V. The transistor is shown to work at a high current on/off ratio of above 104, and the threshold voltage is ∼1.3 V, with over 200 cm2/(V s) effective channel electron mobility. Bending tests have been conducted and show that the flexible transistors have good tolerance on mechanical bending strains. These characteristics indicate that the flexible single-crystalline SiNM transistors with BMN ceramics as gate dielectric have great potential for applications in high-performance integrated flexible circuit.

High-performance flexible BiCMOS electronics based on single-crystal Si nanomembrane

In this work, we have demonstrated for the first time integrated flexible bipolar-complementary metal-oxide-semiconductor (BiCMOS) thin-film transistors (TFTs) based on a transferable single crystalline Si nanomembrane (Si NM) on a single piece of bendable plastic substrate. The n-channel, p-channel metal-oxide semiconductor field-effect transistors (N-MOSFETs & P-MOSFETs), and NPN bipolar junction transistors (BJTs) were realized together on a 340-nm thick Si NM layer with minimized processing complexity at low cost for advanced flexible electronic applications. The fabrication process was simplified by thoughtfully arranging the sequence of necessary ion implantation steps with carefully selected energies, doses and anneal conditions, and by wisely combining some costly processing steps that are otherwise separately needed for all three types of transistors. All types of TFTs demonstrated excellent DC and radio-frequency (RF) characteristics and exhibited stable transconductance and current gain under bending conditions. Overall, Si NM-based flexible BiCMOS TFTs offer great promises for high-performance and multi-functional future flexible electronics applications and is expected to provide a much larger and more versatile platform to address a broader range of applications. Moreover, the flexible BiCMOS process proposed and demonstrated here is compatible with commercial microfabrication technology, making its adaptation to future commercial use straightforward.

Microwave flexible transistors on cellulose nanofibrillated fiber substrates

In this paper, we demonstrate microwave flexible thin-film transistors (TFTs) on biodegradable substrates towards potential green portable devices. The combination of cellulose nanofibrillated fiber (CNF) substrate, which is a biobased and biodegradable platform, with transferrable single crystalline Si nanomembrane (Si NM), enables the realization of truly biodegradable, flexible, and high performance devices. Double-gate flexible Si NM TFTs built on a CNF substrate have shown an electron mobility of 160 cm2/V·s and fT and fmax of 4.9 GHz and 10.6 GHz, respectively. This demonstration proves the microwave frequency capability and, considering today's wide spread use of wireless devices, thus indicates the much wider utility of CNF substrates than that has been demonstrated before. The demonstration may also pave the way toward portable green devices that would generate less persistent waste and save more valuable resources.

Fast flexible electronics with strained silicon nanomembranes

Fast flexible electronics operating at radio frequencies (>1 GHz) are more attractive than traditional flexible electronics because of their versatile capabilities, dramatic power savings when operating at reduced speed and broader spectrum of applications. Transferrable single-crystalline Si nanomembranes (SiNMs) are preferred to other materials for flexible electronics owing to their unique advantages. Further improvement of Si-based device speed implies significant technical and economic advantages. While the mobility of bulk Si can be enhanced using strain techniques, implementing these techniques into transferrable single-crystalline SiNMs has been challenging and not demonstrated. The past approach presents severe challenges to achieve effective doping and desired material topology. Here we demonstrate the combination of strained- NM-compatible doping techniques with self-sustained-strain sharing by applying a strain-sharing scheme between Si and SiGe multiple epitaxial layers, to create strained print-transferrable SiNMs. We demonstrate a new speed record of Si-based flexible electronics without using aggressively scaled critical device dimensions.

Transferrable single-crystal silicon nanomembranes and their application to flexible microwave systems

This paper summarizes the recent fabrication and characterizations of flexible high-speed radio frequency (RF) transistors, PIN-diode single-pole single-throw switches, as well as flexible inductors and capacitors, based on single-crystalline Si nanomembranes transferred on polyethylene terephthalate substrates. Flexible thin-film transistors (TFTs) on plastic substrates have reached RF operation speed with a record cut-off/maximum oscillation frequency (f T/f max) values of 3.8/12 GHz. PIN diode switches exhibit excellent ON/OFF behaviors at high RF frequencies. Flexible inductors and capacitors compatible with high-speed TFT fabrication show resonance frequencies (f res) up to 9.1 and 13.5 GHz, respectively. Robust mechanical characteristics were also demonstrated with these high-frequency passives components.

RF model of flexible microwave single-crystalline silicon nanomembrane PIN diodes on plastic substrate

This paper reports the realization and RF modeling of flexible microwave P-type-Intrinsic-N-type (PIN) diodes using transferrable single-crystalline Si nanomembranes (SiNMs) that are monolithically integrated on low-cost, flexible plastic substrates. With high-energy, high-dose ion implantation and high-temperature annealing before nanomembrane release and transfer process, the parasitic parameters (i.e. resistance, inductance, etc.) are effectively reduced, and the flexible PIN diodes achieve good high-frequency response. With consideration of the flexible device fabrication, structure and layout configuration, a RF model of the microwave single-crystalline Si nanomembrane PIN diodes on plastic substrate is presented. The RF/microwave equivalent circuit model achieves good agreement with the experimental results of the single-crystalline SiNM PIN diodes with different diode areas, and reveals the most influential factors to flexible diode characteristics. The study provides guidelines for properly designing and using single-crystalline SiNMs for flexible RF/microwave diodes and demonstrates the great possibility of flexible monolithic microwave integrated systems.

High efficiency diffractive grating coupler based on transferred silicon nanomembrane overlay on photonic waveguide

We report here the design of a new type of high efficiency grating coupler, based on single crystalline Si nanomembrane overlay and stacking. Such high efficiency diffractive grating couplers are designed for the purpose of coupling light between single mode fibres and nanophotonic waveguides, and for the coupling between multiple photonic interconnect layers for compact three-dimensional vertical integration. Two-dimensional model simulation based on eigenmode expansion shows a diffractive power-up efficiency of 81% and a fibre coupling efficiency of 64%. With nanomembrane stacking, it is feasible to integrate the side-distributed Bragg reflector and bottom reflector, which can lead to the diffractive power-up efficiency and the fibre coupling efficiency of 97% and 73.5%, respectively. For a negatively detuned coupler, the bottom reflector is not needed, and the diffractive power-up efficiency can reach 98% over a large spectral range. The device is extremely tolerant to fabrication errors.