Single-crystal Emitter Research Articles

Stabilization of cold-field-emission current from a CeB6 single-crystal emitter by using a faceted (100) plane

A cerium hexaboride (CeB6) single crystal grown by the floating-zone method has a low work function of about 2.6 eV, and along with lanthanum hexaboride (LaB6), it is one of the most popular cathode materials. It has been widely used as the thermionic emitter of electron microscopes, such as SEMs and TEMs. However, cold-field emitters (CFEs) based on CeB6 and LaB6 have not been put to practical use due to their insufficient emission stability compared to that of conventional tungsten (W)-CFEs. In consideration of that background, in the present study, the stability of the emission current from a CeB6 single-crystal CFE was improved by using the (100) plane at the faceted tip of the single crystal. The CeB6⟨100⟩ single crystal was processed by electrochemical etching and successive high-temperature field evaporation and faceting under an appropriate electric field to make a (100) plane at the apex of the crystal. The improved CeB6(100)-CFE emitted a monochromatic electron beam, which has about three-quarters of the energy width of that of W(310)-CFEs. Emission current from the (100) plane maintained low emission noise, and emission decay in the electron-gun chamber of the SEM was suppressed. The resulting current noise is low enough to produce SEM images without image deterioration, and the relatively small decay makes it possible to use the CeB6(100) emitter for one flashing process per day.

Analytical Model and Current Gain Enhancement of Polysilicon-Emitter Contact Bipolar Transistors

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This paper presents an analytical model that simulates the current gain improvement of polysilicon-emitter bipolar transistors based on the effective recombination velocity method. The theoretical framework developed in this paper incorporates the 2-D structure effect of the polysilicon layer with columnar grain boundary, tunneling processes of holes through polysilicon/silicon interface oxide layer, and nonuniform doping concentration and bulk recombination effects in the single-crystal emitter. The study goes on to derive an analytical expression for the base current density from which the analytical expression of the current gain was then derived. The effect of oxide breakup, at the polysilicon/silicon interface, on current gain was also considered. The dependence of the current gain on temperature was analyzed numerically; the results are in good agreement with experimental data. The approach outlined in this paper allows one to avoid many of the unnecessary simplifications inherent in previous works and to clearly assess the relevance of each physical mechanism. </para>

Simple analytical solution and efficiency improvement of polysilicon emitter solar cells

A simple analytical model has been developed to simulate the performance of solar cells with polysilicon contact on the front surface. The polysilicon layer with a columnar grain structure is modeled by an effective recombination velocity using a two-dimensional transport equation. A one-dimensional transport equation in the single-crystal emitter is solved, taking into account bulk recombination and non-uniformly doped emitter. Then, simple analytical expressions for the emitter reverse saturation current and light-generated current densities are obtained. The collection of the light-generated carriers in polysilicon layer has been discussed and an analytical solution of the light-generated current is derived. The results show that the polysilicon layer can result in a decrease in emitter reverse saturation current density and an increase in solar cell photovoltaic parameters. In fact, the emitter region should not be treated as a ‘dead layer’ because thin polysilicon layer front surface contact gives an improvement of about 60 mV for the open-circuit voltage, 3.6 mA/cm 2 for the photocurrent, and 3.9% for the cell efficiency.

The base current and related 1/ f noise for SiGe HBTs realized by SEG/NSEG technology on SOI and bulk substrates

It is shown that the high base current and associated low-frequency noise typical for the SiGe HBTs prepared by the selective epitaxial growth of the collector and non-selective epitaxial growth of the base and emitter (SEG/NSEG technology), can be related to the mechanical stress between the collector and the field oxide surrounding the collector in these devices. The reason is that such stress provokes the viscous flow of the surface oxide producing an “action-at-distance” effect which results in the creation of additional fast and slow surface centers at the single crystal emitter and passivating oxide interface and in the oxide, respectively. The increase of fast center density increases the recombination base current component while the increase of slow center density increases the intensity of the 1/ f noise source. As a result, any factor that promotes the reduction of the stress or the decrease of the intensity of the surface oxide viscous flow serves to decrease the base current and its 1/ f noise. Thus we have found that we can mitigate the undesirable effects by the following solutions: increasing the temperature of the SEG of the collector T SEG, decreasing the temperature of the rapid thermal activation T RTA, implantation of BF 2 into the field oxide before the collector and base layers are grown, replacement of the bulk substrate by SOI. It is shown that the maximal decreases of the base current I B and of the spectral density of the 1/ f noise S IB are as high as factors of 30 and 8000, respectively. Therefore, the technology conditions have been identified to guarantee a sufficiently low level of both excess base current noise and base current.

Minority carrier transport equation for bipolar transistors with polysilicon emitter contact

In order to improve the current gain via a reduction of the emitter base junction saturation current density, a perpendicular ordering of the grain boundaries (columnar grain boundaries) in the polysilicon emitter-region of a bipolar transistor is proposed. The complex polysilicon current component is obtained by a two-dimensional resolution of the current transport equation along the polysilicon region. The minority carrier current density component in the non-uniformly heavily doped single-crystal emitter is calculated by an average value approach. The influence of the two-dimensional structure of the polysilicon region on the current gain is analysed, and it is shown that the current gain decreases with increasing grain number. The evolution of the normalised current gain in terms of physical parameters is studied. The results show that the current gain improves with polysilicon thickness for a thin oxide layer, while it is insensitive for a thick oxide layer. In addition, the results show that the bulk recombination in a single-crystal emitter cannot be neglected in devices with a deliberately grown interfacial oxide.

Investigation of inhomogeneous structures of near-surface-layers in ion-implanted silicon

The ion implantation as a subject of investigations attracts increasing interest because of its technological applications. For example, the ion implantation and the adequate thermal treatment are the basic processes for fabrication of a new so-called delta-BSF solar cell. In this silicon solar cell, the continuous sub-structure of modified material (planar amorphous-like layer of nanometric thickness with very thin transition zones) is inserted into the single-crystal emitter. From earlier high resolution electron microscopy studies, it is evident that these two Si phases coexist in the form of well-defined layers separated by sharp heterointerfaces [Z.T. Kuznicki, J. Thibault, F. Chautain-Mathys, S. De Unamuno, Towards ion beam processed single-crystal Si solar cells with a very high efficiency, E-MRS Spring Meeting, Strasbourg, France, First Polish–Ukrainian Symposium, New Photovoltaic Materials for Solar Cells, October 21–22, Kraków, Poland, 1996.]. The aim of this paper is the further structural characterisation of silicon single crystal with buried `amorphous' layer. The non-destructive X-ray diffraction methods as well as the transmission electron microscopy were used to investigate the quality of the a-Si/c-Si heterointerfaces, structural homogeneity of the layers and distribution of the stress field. The measurements were carried out on an initial, as-implanted and annealed material. The 〈100〉-oriented Si single crystals were implanted with 180 keV energy P ions at room temperature.

High-low polysilicon-emitter SiGe-base bipolar transistors

Self-aligned heterojunction bipolar transistors with a high-low emitter profile consisting of a heavily doped polysilicon contact on top of a thin epitaxial emitter cap have been fabricated. The low doping in the single-crystal emitter cap allows a very high dopant concentration in the base with low emitter-base reverse leakage and low emitter-base capacitance. The thin emitter cap is contacted by heavily doped polysilicon to reduce the emitter resistance, the base current, and the emitter charge storage. A trapezoidal germanium profile in the base ensures a small base transit time and adequate current gain despite high base doping. The performance potential of this structure was simulated and demonstrated experimentally in transistors with near-ideal characteristics, very small reverse emitter-base leakage current, and 52-GHz peak f/sub max/, and in unloaded ECL and NTL ring oscillators with 24- and 19-ps gate delays, respectively. >

Polysilicon emitters for bipolar transistors: a review and re-evaluation of theory and experiment

A critical review is presented of the theories proposed in the literature to explain the current gain enhancement of polysilicon emitter bipolar transistors. From these theories a simplified analytical formulation is chosen which models the blocking properties of the interface, including tunneling through the interfacial oxide, reduced grain boundary mobility at the polysilicon/silicon interface, and the potential barrier created by segregated dopant, which can all give rise to an enhanced current gain. Also modeled are the mechanisms which limit the extent of any gain enhancement, such as recombination in the single-crystal emitter, in the bulk of the polysilicon, and at the polysilicon/silicon interface. This model is then applied in an original manner to a selection of experimental data in an effort to identify the dominant current gain mechanisms in polysilicon emitter transistors as a function of a given set of fabrication conditions.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

53 GHz-f/sub max/ Si/SiGe heterojunction bipolar transistors

The authors report Si/SiGe HBTs (heterojunction bipolar transistors) with a base sheet resistance of only 680 Omega / Square Operator , leading to a measured f/sub max/ of 53 GHz. The complete layer structure was grown by MBE (molecular beam epitaxy), including the single-crystal emitter with no need for a poly-drive-in anneal. Devices were built on high-resistivity substrates with As-implanted and diffused buried layers. A double-mesa structure using a self-aligned base metallization with respect to the emitters was employed. On-wafer high-frequency measurements from 0.5 to 26 GHz showed transit frequencies between 40 and 50 GHz for devices with 1-3 mu m wide emitter fingers. The reduced base sheet resistance compared to earlier devices led to a maximum available gain at 26 GHz for a 1*16 mu m device of 6.3 dB corresponding to a record f/sub max/=53 GHz.

15 GHz fm max microwave silicon pnp transistors with single-crystal emitters fabricated with simple four mask process

Vertical pnp transistors have been fabricated using a four mask, low cost quasi-selfaligned process with submicrometre feature sizes. The resulting monocrystalline emitter devices achieve ft greater than 9 GHz and fmax greater than 15 GHz with BVceo greater than 13 V. These discrete pnps were used successfully as active loads for a monolithic npn opamp to achieve a gain-bandwidth product of 4.4 GHz.

Polysilicon Emitter Transistors Manufactured using a Novel Limited Reaction Processing System

ABSTRACTThis paper describes a LPCVD reactor which was developed for multiple sequential in-situ processing. The system is capable of rapid thermal processing in the presence of plasma stimulation and has been used for native oxide removal, plasma oxidation and silicon deposition. Polysilicon layers produced by the system are incorporated into N-P-N polysilicon emitter bipolar transistors. These devices fabricated using a sequential in-situ plasma clean-polysilicon deposition schedule exhibited uniform gains limited to that of long single crystal emitters. Devices with either plasma grown or native oxide layers below the polysilicon exhibited much higher gains. The suitability of the system for sequential and limited reaction processing has been established.

An investigation of the transition from polysilicon emitter to SIS emitter behavior

The electrical effects of scaling the emitter-base junction depth of polysilicon emitter bipolar transistors are investigated. A range of devices with varying amounts of emitter dopant penetration into the single-crystal silicon has been fabricated by varying the emitter drive-in conditions. Detailed electrical measurements of the base and collector currents as a function of base-emitter voltage have been made and show that the depth of the single-crystal emitter region is important in determining the electrical characteristics. The ideality of the base current severely degrades as the single-crystal emitter depth decreases, and at forward voltage around 0.9 V a kink is often observed. The collector characteristics are ideal at low forward voltages, but at high voltages the collector current saturates, with the saturation occurring at lower currents as the single-crystal emitter depth decreases. A numerical model for shallow polysilicon emitters (termed SIS emitters) has been developed, and is used to explain these nonideal device characteristics in terms of recombination, and direct and indirect tunneling at the polysilicon-silicon interface. Good quantitative agreement between theory and experiment is obtained and values for the model parameters can be obtained by fitting to the experimental results. >

Comparison of experimental and computed results on arsenic- and phosphorus-doped polysilicon emitter bipolar transistors

This paper presents a detailed comparison of the measured and computed electrical characteristics of polysilicon emitter bi-polar transistors over a wide range of processing conditions. Detailed electrical measurements are made of both the emitter resistance and the base and collector current as a function of base-emitter voltage. Devices with arsenic- and phosphorus-doped emitters are considered, as well as both with and without a deliberately grown interfacial oxide layer. The theoretical characteristics are computed using a unified model that incorporates both transport and tunneling mechanisms. It is shown that the measured emitter resistances across a wide range of processing conditions can be satisfactorily explained using a tunneling model with a single value for the electron effective barrier height (0.4 eV). Values for the modeling parameters are obtained, in some cases uniquely by measurement, and in others by fitting the experimental results. In devices with a deliberately grown interfacial oxide, the base current is suppressed to such an extent that recombination in the single-crystal emitter and in the base becomes important.

Anisotropy of thermionic electron emission values for LaB6 single-crystal emitter cathodes

Measurement of thermionic electron emission values for pointed LaB6 single-crystal emitter cathodes has shown that 〈110〉 axial orientations yield emission values ten times higher than 〈100〉 orientations at 1545 °K. Minimum values were obtained for the 〈510〉 directions. These findings seem encouraging in achieving perhaps two orders of magnitude higher emission fluxes as compared to tungsten emitters.