Significant Increase In Leakage Current Research Articles

Investigation of Total-Ionizing Dose Effects on the Two-Dimensional Transition Metal Dichalcogenide Field-Effect Transistors

Due to the excellent electrical properties, the emerging field-effect transistor (FET) based on two-dimensional transition metal dischalcogenide (TMD) is an excellent candidate for future space applications. However, the device performance is significantly impacted by total-ionizing dose (TID) effects. In this paper, the TID effects of TMD FETs are investigated comprehensively by means of developing a surface-potential based drain current model. Not only the radiation-induced trapped charges but also mobility degradation are incorporated into the proposed model. The model approach is demonstrated for a bottom-gated TMD FET, that simulation results are in good agreement with the experimental data. Based on the validity of the proposed method, the influence of TID effects on the TMD-on-insulator (TMDOI) FET is presented and discussed under different total dose levels. The results show that surface potential is strongly dependent on the oxide trapped charges, resulting in a major contribution to the negative shift of threshold voltage and the significant increase of leakage current. Besides, the interface trapped charges reduce the effective carrier mobility, which plays a dominant role on the decrease of transconductance and increase of subthreshold voltage swing. Finally, this paper gives insight into some possible mitigation techniques of TID effects on TMD FETs.

Lock-in Thermography Failure Detection on Multilayer Ceramic Capacitors After Flex Cracking and Temperature–Humidity–Bias Stress

A nondestructive method using lock-in thermography (LIT) to detect failures in multilayer ceramic capacitors (MLCCs) is presented. The thermal response of new 25-V MLCCs is compared to the thermal response of the same capacitors after the insertion of flex cracks as well as after 24 and 96 h of total exposure time to a temperature of 75 °C, 75% relative humidity, and 25-V bias. The thermal response was measured before the introduction of any flex cracks, as well as directly after flex cracks were inserted by bending the printed circuit board to $6000~\mu $ Str. No significant change was detected in the thermal profile upon the introduction of flex cracks of which the presence was verified by X-ray imaging. After the MLCCs were subjected to a total of 96 h of temperature–humidity–bias stress, a significant increase in leakage current could be detected as a hotspot in one of the initially 24 samples by LIT. The influence of the different parameters, such as lock-in frequency, bias voltage, and measurement time, on the detectability of the hotspot is presented. Finally, the hotspot location is correlated with the cross-sectional analysis of the capacitor, where melting and solidifying into nickel spheres are found.

Epitaxial ferroelectric Y-doped HfO2 film grown by the RF magnetron sputtering

YO1.5-doped HfO2 films were deposited on yttria-stabilized zirconia substrates by RF magnetron sputtering at room temperature and under various atmosphere conditions. The deposited films were treated by rapid thermal annealing under both O2 and N2 flows. Epitaxial films with the orthorhombic phase, which is expected to exhibit ferroelectricity, are obtained under all conditions. The deposition in Ar atmosphere provided good ferroelectricity, while the deposition with O2 resulted in a low breakdown voltage inhibiting ferroelectricity. Current density–voltage characteristics show a significant increase in leakage current by the deposition in atmosphere containing O2 and also annealing under O2 flow. These results indicate that the treatment in atmosphere containing O2 leads to the degradation of insulation properties.

Conductive Mechanism of Bi-Doped Thick-Film Dielectric in High-Temperature Aging With Bias

The increase in high-temperature electronic applications is a challenge for the reliability of electronic packaging. Thick-film technology has the potential of operating at 300 °C. In a previous study of electrical reliability for multilayer thick films, bismuth (Bi) from the binder of a commonly used PtPdAu thick-film conductor diffused into the dielectrics during the multiple firing steps. If the dielectric was thin and the Bi was continuous through the dielectric, a significant increase in leakage current was observed between the two layers of conductor during 300 °C aging with bias. This paper studied the mechanism of leakage current increase in Bi-doped thick-film dielectrics. Two dielectrics, $D1$ and $D2$ , were intentionally doped with Bi in various weight concentrations. Capacitors fabricated with these Bi-doped dielectrics had a significant leakage current increase in a short time during aging at 300 °C with a 100-V bias in either polarity. Insulating substrate (sapphire) and conductive substrate (Pt foil) were used to replace the 96% Al2O3 ceramic substrates to study the leakage current mechanism by separating the influences of leakage current and bias voltage (electric field). Doping Bi into the multilayer dielectric created traps during the firing process. Without leakage current, the traps were not activated during aging. When bias was applied to the top electrode, the electron flow through the dielectric activated the traps, resulting in the increase of leakage current. Traps created by doping with Bi in the thick-film dielectric, $D1$ , were measured by ultraviolet and visible spectroscopy, and the trap energy was at 3.2–3.3 eV in $D1$ with 3 wt% of doped Bi.

Printed Circuit Board Surface Finish and Effects of Chloride Contamination, Electric Field, and Humidity on Corrosion Reliability

Corrosion reliability is a serious issue today for electronic devices, components, and printed circuit boards (PCBs) due to factors such as miniaturization, globalized manufacturing practices which can lead to process-related residues, and global usage effects such as bias voltage and unpredictable user environments. The investigation reported in this paper focuses on understanding the synergistic effect of such parameters, namely contamination, humidity, PCB surface finish, pitch distance, and potential bias on leakage current under different humidity levels, and electrochemical migration probability under condensing conditions. Leakage currents were measured on interdigitated comb test patterns with three different types of surface finish typically used in the electronics industry, namely gold, copper, and tin. Susceptibility to electrochemical migration was studied under droplet conditions. The level of base leakage current (BLC) was similar for the different surface finishes and NaCl contamination levels up to relative humidity (RH) of 65%. A significant increase in leakage current was found for comb patterns contaminated with NaCl above 70% to 75% RH, close to the deliquescent RH of NaCl. Droplet tests on Cu comb patterns with varying pitch size showed that the initial BLC before dendrite formation increased with increasing NaCl contamination level, whereas electrochemical migration and the frequency of dendrite formation increased with bias voltage. The effect of different surface finishes on leakage current under humid conditions was not very prominent.

Performance and operation experience of the ATLAS Semiconductor Tracker

We report on the operation and performance of the ATLAS Semi-Conductor Tracker (SCT), which has been functioning for 3 years in the high luminosity, high radiation environment of the Large Hadron Collider at CERN. We also report on the few improvements of the SCT foreseen for the high energy run of the LHC. We find 99.3% of the SCT modules are operational, the noise occupancy and hit efficiency exceed the design specifications; the alignment is very close to the ideal to allow on-line track reconstruction and invariant mass determination. We will report on the operation and performance of the detector including an overview of the issues encountered. We observe a significant increase in leakage currents from bulk damage due to non-ionizing radiation and make comparisons with the predictions.

Performance and operation experience of the ATLAS SemiConductor Tracker

We report on the operation and performance of the ATLAS Semi-Conductor Tracker(SCT), which has been functioning for 3 years in a high luminosity,high radiation environment. The SCT is constructed of 4088 silicondetector modules, for a total of 6.3 million strips. Each moduleoperates as a stand-alone unit, mechanically, electrically, opticallyand thermally. The modules are mounted into two types of structures:one barrel, made of 4 cylinders, and two end-cap systems made of 9disks. The SCT silicon micro-strip sensors are processed in the planarp-in-n technology. The signals are processed in the front-end ABCD3TAASICs, which use a binary readout architecture. Data is transferredto the off-detector readout electronics via optical fibres. We find99.3% of the SCT modules are operational, the noise occupancy andhit efficiency exceed the design specifications; the alignment is veryclose to the ideal to allow on-line track reconstruction and invariantmass determination. We will report on the operation and performance ofthe detector including an overview of the issues encountered. Weobserve a significant increase in leakage currents from bulk damagedue to non-ionizing radiation and make comparisons with thepredictions. We will also cover the time evolution of the keyparameters of the strip tracker, including the evolution of noise andgain, the measurement of the Lorentz angle and the tracking efficiencyin the harsh LHC environment. Valuable lessons for future siliconstrip detector projects will be presented.

Reverse-bias stress of high electron mobility transistors: Correlation between leakage current, current collapse and trap characteristics

This paper describes an investigation of the effect of reverse-bias stress on the leakage current and trapping characteristics of GaN based HEMT. The analysis is based on combined electrical, transient and electroluminescence measurements, carried out during the execution of step-stress experiments. The experimental data collected within this work indicate that: (i) when submitted to reverse bias stress, beyond a certain critical voltage, the devices can show a significant increase in leakage current, which is correlated to the generation of luminescence spots, that can be identified by means of EL measurements; (ii) beyond the critical voltage, the increase in gate leakage is correlated to an increase in current collapse; (iii) transient measurements, carried out to get information on the origin of current collapse, identify the existence of two trap levels (T1 and T2). Results suggest that stress does not induce the generation of new defective levels, but only the increase in the amplitude of the current transients associated to pre-existing traps.

Voltage and current stress induced variations in TiN/HfSixOy/TiN MIM capacitors

In this paper we have investigated the long-term reliability of TiN/HfSixOy/TiN Metal–Insulator–Metal (MIM) capacitors by using constant voltage stress (CVS) and constant current stress (CCS). No significant increase in leakage current was observed as a function of stress time. On the other hand, stress induced capacitance changes were observed due to change in quadratic and liner coefficients of permittivity nonlinearities. Stress-induced oxygen vacancy related defect formation believed to be the cause of this shift in permittivity.

Hf-doped Ta2O5 stacks under constant voltage stress

The stress-induced leakage current in Hf-doped Ta2O5 layers (7; 10nm) under constant voltage stress at gate injection was investigated in order to assess the mechanisms of conduction, the traps involved and the effect of Hf doping. The amount of Hf is found to affect the conduction mechanisms, the temperature dependence of the leakage current and the current response to the stress. A significant leakage current increase is observed only when the stress voltage and/or stress time exceed the corresponding threshold values, where the charge trapping at the pre-existing traps dominates below and defect generation above these threshold values. The energy levels of the traps responsible for the current transport are estimated. The stress effect on dominant conduction mechanisms appears quite weak, and the nature of the traps controlling the current transport before and after the stress seems to be nearly identical. The results indicate that the constant voltage stress affects the pre-existing traps in Hf-doped Ta2O5 and modifies their parameters, but there is no evidence for stress-induced generation of traps with completely new nature different from oxygen-vacancy related defects.

Introduction to Industrial Applications of Low Power Design Methodologies

Moore’s law has driven silicon technology scale down aggressively, and it results in significant increase of leakage current on nano-meter scale CMOS. Especially, in mobile devices, leakage current has been one of designers’ main concerns, and thus many studies have introduced low power methodologies. However, there are few studies to minimize implementation cost in the mixed use of the methodologies to the best of our knowledge. In this paper, we introduce industrial applications of low power design methodologies for the decrease of leakage current. We focus on the design cost reduction of power gating and reverse body bias when used together. Also, we present voltage scale as an alternative to reverse body bias. To sustain gate leakage current, we discuss the adoption of high-κ metal gate, which cuts gate leakage current by a factor of 10 in 32 ㎚ CMOS technology. A 45 ㎚ mobile SoC is shown as the case study of the mixed use of low power methodologies.

Impact of Voltage and Current Stress on TiN/HfSixOy/TiN MIM Capacitors

In this paper we have investigated the long-term reliability of TiN/HfSixOy/TiN Metal-Insulator-Metal (MIM) capacitors by using constant voltage stress (CVS) and constant current stress (CCS). No significant increase in leakage current was observed as a function of stress time. On the other hand stress induced capacitance changes were observed due to change in dielectric constant.

Effects of electron-irradiation on electrical properties of AlGaN/GaN Schottky barrier diodes

Effects of 1 MeV electron-irradiation at room temperature on the electrical properties of AlGaN/GaN heterostructures, including leakage currents, threshold voltages, and electron traps, have been investigated using Schottky barrier diodes (SBDs) fabricated on the AlGaN. The SBDs, before and after the irradiation with a dose of 5×1015 cm−2, were characterized by temperature dependent current-voltage and capacitance-voltage measurements and deep level transient spectroscopy. It is found that the irradiation causes (i) significant increase in leakage currents, dominated by tunneling conduction, at both reverse and low-forward biases; (ii) a clear negative shift in threshold voltage in the pinch-off region; and (iii) creation of traps Ae(∼1.1 eV) or A2(1.2 eV) and Ee(0.09 eV) in the GaN buffer and AlGaN regions. The irradiation-induced traps can be used to account for the increase in leakage currents and shift in threshold voltage. However, as compared to traps A2(1.2 eV) and E(0.13 eV) induced in thick GaN layers by electron-irradiation, the irradiation-induced traps in the AlGaN/GaN heterostructures show some changes in activation energy and electron capture behavior.

Device Degrading Interactions between Silicide Films and Bulk Defects during Rapid Thermal Annealing

ABSTRACTThe interaction between titanium and nickel silicide films with dislocations generated at the wafer edge by thermal stress is examined in this work. The local dislocation density of the silicon wafers varied from zero to 4.8×106cm across a slice. Both titanium and nickel were deposited as thin films in the contact regions of the p-n junction diodes. Wafers were rapid thermal annealed, sequentially, for 30 s at temperatures between 300°C and 700°C. Reverse bias leakage current measurements of the as-deposited and annealed wafers were used to evaluate the impact of silicides and bulk defects on devices. A significant increase in leakage current due to the silicide/defect interaction was observed above 600 °C for both titanium and nickel. Leakage currents of devices fabricated in regions of high bulk defect density increased with the anneal temperature and dislocation density.