Shared-memory Computers Research Articles

A constructive non-local means algorithm for low-dose computed tomography denoising with morphological residual processing.

Low-dose computed tomography (LDCT) has attracted significant attention in the domain of medical imaging due to the inherent risks of normal-dose computed tomography (NDCT) based X-ray radiations to patients. However, reducing radiation dose in CT imaging produces noise and artifacts that degrade image quality and subsequently hinders medical disease diagnostic performance. In order to address these problems, this research article presents a competent low-dose computed tomography image denoising algorithm based on a constructive non-local means algorithm with morphological residual processing to achieve the task of removing noise from the LDCT images. We propose an innovative constructive non-local image filtering algorithm by means of applications in low-dose computed tomography technology. The nonlocal mean filter that was recently proposed was modified to construct our denoising algorithm. It constructs the discrete property of neighboring filtering to enable rapid vectorized and parallel implantation in contemporary shared memory computer platforms while simultaneously decreases computing complexity. Subsequently, the proposed method performs faster computation compared to a non-vectorized and serial implementation in terms of speed and scales linearly with image dimension. In addition, the morphological residual processing is employed for the purpose of edge-preserving image processing. It combines linear lowpass filtering with a nonlinear technique that enables the extraction of meaningful regions where edges could be preserved while removing residual artifacts from the images. Experimental results demonstrate that the proposed algorithm preserves more textural and structural features while reducing noise, enhances edges and significantly improves image quality more effectively. The proposed research article obtains better results both qualitatively and quantitively when compared to other comparative algorithms on publicly accessible datasets.

Robustness of Artificial Neural Networks Based on Weight Alterations Used for Prediction Purposes

Nowadays, due to their excellent prediction capabilities, the use of artificial neural networks (ANNs) in software has significantly increased. One of the most important aspects of ANNs is robustness. Most existing studies on robustness focus on adversarial attacks and complete redundancy schemes in ANNs. Such redundancy methods for robustness are not easily applicable in modern embedded systems. This work presents a study, based on simulations, about the robustness of ANNs used for prediction purposes based on weight alterations. We devise a method to increase the robustness of ANNs directly from ANN characteristics. By using this method, only the most important neurons/connections are replicated, keeping the additional hardware overheads to a minimum. For implementation and evaluation purposes, the networks-on-chip (NoC) case, which is the next generation of system-on-chip, was used as a case study. The proposed study/method was validated using simulations and can be used for larger and different types of networks and hardware due to its scalable nature. The simulation results obtained using different PARSEC (Princeton Application Repository for Shared-Memory Computers) benchmark suite traffic show that a high level of robustness can be achieved with minimum hardware requirements in comparison to other works.

Parallel domain discretization algorithm for RBF-FD and other meshless numerical methods for solving PDEs

In this paper, we present a novel parallel dimension-independent node positioning algorithm that is capable of generating nodes with variable density, suitable for meshless numerical analysis. A very efficient sequential algorithm based on Poisson disc sampling is parallelized for use on shared-memory computers, such as the modern workstations with multi-core processors. The parallel algorithm uses a global spatial indexing method with its data divided into two levels, which allows for an efficient multi-threaded implementation. The addition of bootstrapping enables the algorithm to use any number of parallel threads while remaining as general as its sequential variant. We demonstrate the algorithm performance on six complex 2- and 3-dimensional domains, which are either of non rectangular shape or have varying nodal spacing or both. We perform a run-time analysis of the algorithm, to demonstrate its ability to reach high speedups regardless of the domain and to show how well it scales on the experimental hardware with 16 processor cores. We also analyse the algorithm in terms of the effects of domain shape, quality of point placement, and various parallelization overheads.

Towards Energy Efficient Approx Cache-coherence Protocol Verified using Model Checker

The end of Moore’s law and Dennard scaling is shifting the typical computing paradigm towards Approximate Computing. This paper aims to explain an enhanced version of the MESI(Modified Exclusive Shared Invalid) cache coherence protocol using approximation and verifying its correctness with a model checker. In this proposed MESI-A(MESI-APPROX) cache coherence protocol, we subdivide the data into two parts: an approximate and precise one. By ignoring coherence communication for approximate data, the proposed model gains performance and saves energy. We formally verified MESI and MESI-A protocol using LTL (Linear Temporal Logic) and PCTL (Probabilistic Computational Tree Logic) specifications. On PARSEC 3.0 (Princeton Application Repository for Shared-Memory Computers) benchmark suite using TEJAS (The Efficient Java-Based Architectural Simulator), the improved protocol is performing efficiently with 5 per cent to 20 per cent approximated data with various applications. The energy gain is in correlation with the application’s nature, but every application shows significant improvement.

Parallel Computing for Numerical Analysis of a Fan Assembly Subjected to a SPH Bird

Smoothed Particle Hydrodynamics (SPH) is widely adopted to predict bird strike events. To improve the parallel computing efficiency of the SPH approach, parallel computing was performed on the process of a bird striking the fan assembly. Since the cube-shaped domains aligned along the coordinate axes that are inherent in the decomposition algorithm may result in low computational efficiency, the effect of customized data partitioning on the efficiency is investigated. The results show that customized decompositions can minimize communication between processors and ensure the load balance during the simulation process. Besides, distributed computing with domain decompositions can present reasonable predictions at soft-impact damage, achieving consistent results within a range of less than 7% of the reference data derived from shared memory computing.

SB-Router: A Swapped Buffer Activated Low Latency Network-on-Chip Router

Switch Allocation (SA) holds a critical stage in Network-on-Chip (NoC) routers, its performance gets affected adversely due to Head-of-Line (HoL) blocking. In traditionally used Input-Queued Routers (IQR), packets are arranged in a particular order in each Virtual Channel (VC). This implementation is vulnerable to HoL blocking, as the switch allocator can allocate only those packets which are available at the head in a VC. In this paper, Swapped Buffer (SB) Router architecture is proposed to schedule packets in input buffers by using SB registers. The VCs are designed as SBs, this allows the packets stored in SB registers along with the head packet of VC to participate in SA. The concept of the SB register minimizes the conflicts in SA and thus reduces HoL blocking, therefore improves the performance of NoC. This paper proposes a priority mechanism to prioritize the non-head packets as compared to head packets in case of conflict between them. Two methods have been proposed in this paper, to enhance the performance of the NoC router. First, a VC allocation technique is proposed to optimize the order of packets in the input buffer. Next, SB-Router is combined with the Fill VC allocation technique to further enhance the performance of NoC routers. The performance of the proposed router is evaluated and the experimental results indicate that our design achieves latency improvement of 68.75% over (Time-Series) TS-Router for uniform traffic at the injection rate of 0.42 flits/cycle for a 64 node mesh network with moderate power consumption and area usage. The performance improvement in packet latency for traces from Princeton Application Repository for Shared-Memory Computers (PARSEC) has also been evaluated. With the achieved reduction in latency, the proposed method has the potential to serve high-speed operations while mapping different applications on multiple core architectures.

Intra- and Inter-Server Smart Task Scheduling for Profit and Energy Optimization of HPC Data Centers

Servers in a data center are underutilized due to over-provisioning, which contributes heavily toward the high-power consumption of the data centers. Recent research in optimizing the energy consumption of High Performance Computing (HPC) data centers mostly focuses on consolidation of Virtual Machines (VMs) and using dynamic voltage and frequency scaling (DVFS). These approaches are inherently hardware-based, are frequently unique to individual systems, and often use simulation due to lack of access to HPC data centers. Other approaches require profiling information on the jobs in the HPC system to be available before run-time. In this paper, we propose a reinforcement learning based approach, which jointly optimizes profit and energy in the allocation of jobs to available resources, without the need for such prior information. The approach is implemented in a software scheduler used to allocate real applications from the Princeton Application Repository for Shared-Memory Computers (PARSEC) benchmark suite to a number of hardware nodes realized with Odroid-XU3 boards. Experiments show that the proposed approach increases the profit earned by 40% while simultaneously reducing energy consumption by 20% when compared to a heuristic-based approach. We also present a network-aware server consolidation algorithm called Bandwidth-Constrained Consolidation (BCC), for HPC data centers which can address the under-utilization problem of the servers. Our experiments show that the BCC consolidation technique can reduce the power consumption of a data center by up-to 37%.

Terabase-scale metagenome coassembly with MetaHipMer

Metagenome sequence datasets can contain terabytes of reads, too many to be coassembled together on a single shared-memory computer; consequently, they have only been assembled sample by sample (multiassembly) and combining the results is challenging. We can now perform coassembly of the largest datasets using MetaHipMer, a metagenome assembler designed to run on supercomputers and large clusters of compute nodes. We have reported on the implementation of MetaHipMer previously; in this paper we focus on analyzing the impact of very large coassembly. In particular, we show that coassembly recovers a larger genome fraction than multiassembly and enables the discovery of more complete genomes, with lower error rates, whereas multiassembly recovers more dominant strain variation. Being able to coassemble a large dataset does not preclude one from multiassembly; rather, having a fast, scalable metagenome assembler enables a user to more easily perform coassembly and multiassembly, and assemble both abundant, high strain variation genomes, and low-abundance, rare genomes. We present several assemblies of terabyte datasets that could never be coassembled before, demonstrating MetaHipMer’s scaling power. MetaHipMer is available for public use under an open source license and all datasets used in the paper are available for public download.

A comparative study of high-productivity high-performance programming languages for parallel metaheuristics

Parallel metaheuristics require programming languages that provide both, high performance and a high level of programmability. This paper aims at providing a useful data point to help practitioners gauge the difficult question of whether to invest time and effort into learning and using a new programming language. To accomplish this objective, three productivity-aware languages (Chapel, Julia, and Python) are compared in terms of performance, scalability and productivity. To the best of our knowledge, this is the first time such a comparison is performed in the context of parallel metaheuristics. As a test-case, we implement two parallel metaheuristics in three languages for solving the 3D Quadratic Assignment Problem (Q3AP), using thread-based parallelism on a multi-core shared-memory computer. We also evaluate and compare the performance of the three languages for a parallel fitness evaluation loop, using four different test-functions with different computational characteristics. Besides providing a comparative study, we give feedback on the implementation and parallelization process in each language.

Анализ эффективности выполнения атомарных операций в многоядерных вычислительных системах с общей памятью

Анализ эффективности выполнения атомарных операций в многоядерных вычислительных системах с общей памятью

Extending Shared-Memory Computations to Multiple Distributed Nodes

With the emergence of accelerators like GPUs, MICs and FPGAs, the availability of domain specific libraries (like MKL) and the ease of parallelization associated with CUDA and OpenMP based shared-memory programming, node-based parallelization has recently become a popular choice among developers in the field of scientific computing. This is evident from the large volume of recently published work in various domains of scientific computing, where shared-memory programming and accelerators have been used to accelerate applications. Although these approaches are suitable for small problem-sizes, there are issues that need to be addressed for them to be applicable to larger input domains. Firstly, the primary focus of these works has been to accelerate the core kernel; acceleration of input/output operations is seldom considered. Many operations in scientific computing operate on large matrices - both sparse and dense - that are read from and written to external files. These input-output operations present themselves as bottlenecks and significantly effect the overall application time. Secondly, node-based parallelization limits a developer from distributing the computation beyond a single node without him having to learn an additional programming paradigm like MPI. Thirdly, the problem size that can be effectively handled by a node is limited by the memory of the node and accelerator. In this paper, an Asynchronous Multi-node Execution (AMNE) approach is presented that uses a unique combination of the shared-file system and pseudo-replication to extend node-based algorithms to a distributed multiple node implementation with minimal changes to the original node-based code. We demonstrate this approach by applying it to GEMM, a popular kernel in dense linear algebra and show that the presented methodology significantly advances the state of art in the field of parallelization and scientific computing.

Classification and Evaluation of Concepts for Improving the Performance of Applied Energy System Optimization Models

Energy system optimization models used for capacity expansion and dispatch planning are established tools for decision-making support in both energy industry and energy politics. The ever-increasing complexity of the systems under consideration leads to an increase in mathematical problem size of the models. This implies limitations of today’s common solution approaches especially with regard to required computing times. To tackle this challenge many model-based speed-up approaches exist which, however, are typically only demonstrated on small generic test cases. In addition, in applied energy systems analysis the effects of such approaches are often not well understood. The novelty of this study is the systematic evaluation of several model reduction and heuristic decomposition techniques for a large applied energy system model using real data and particularly focusing on reachable speed-up. The applied model is typically used for examining German energy scenarios and allows expansion of storage and electricity transmission capacities. We find that initial computing times of more than two days can be reduced up to a factor of ten while having acceptable loss of accuracy. Moreover, we explain what we mean by “effectiveness of model reduction” which limits the possible speed-up with shared memory computers used in this study.

DECA: scalable XHMM exome copy-number variant calling with ADAM and Apache Spark

BackgroundXHMM is a widely used tool for copy-number variant (CNV) discovery from whole exome sequencing data but can require hours to days to run for large cohorts. A more scalable implementation would reduce the need for specialized computational resources and enable increased exploration of the configuration parameter space to obtain the best possible results.ResultsDECA is a horizontally scalable implementation of the XHMM algorithm using the ADAM framework and Apache Spark that incorporates novel algorithmic optimizations to eliminate unneeded computation. DECA parallelizes XHMM on both multi-core shared memory computers and large shared-nothing Spark clusters. We performed CNV discovery from the read-depth matrix in 2535 exomes in 9.3 min on a 16-core workstation (35.3× speedup vs. XHMM), 12.7 min using 10 executor cores on a Spark cluster (18.8× speedup vs. XHMM), and 9.8 min using 32 executor cores on Amazon AWS’ Elastic MapReduce. We performed CNV discovery from the original BAM files in 292 min using 640 executor cores on a Spark cluster.ConclusionsWe describe DECA’s performance, our algorithmic and implementation enhancements to XHMM to obtain that performance, and our lessons learned porting a complex genome analysis application to ADAM and Spark. ADAM and Apache Spark are a performant and productive platform for implementing large-scale genome analyses, but efficiently utilizing large clusters can require algorithmic optimizations and careful attention to Spark’s configuration parameters.

Distributed-memory lattice H-matrix factorization

We parallelize the LU factorization of a hierarchical low-rank matrix ([Formula: see text]-matrix) on a distributed-memory computer. This is much more difficult than the [Formula: see text]-matrix-vector multiplication due to the dataflow of the factorization, and it is much harder than the parallelization of a dense matrix factorization due to the irregular hierarchical block structure of the matrix. Block low-rank (BLR) format gets rid of the hierarchy and simplifies the parallelization, often increasing concurrency. However, this comes at a price of losing the near-linear complexity of the [Formula: see text]-matrix factorization. In this work, we propose to factorize the matrix using a “lattice [Formula: see text]-matrix” format that generalizes the BLR format by storing each of the blocks (both diagonals and off-diagonals) in the [Formula: see text]-matrix format. These blocks stored in the [Formula: see text]-matrix format are referred to as lattices. Thus, this lattice format aims to combine the parallel scalability of BLR factorization with the near-linear complexity of [Formula: see text]-matrix factorization. We first compare factorization performances using the [Formula: see text]-matrix, BLR, and lattice [Formula: see text]-matrix formats under various conditions on a shared-memory computer. Our performance results show that the lattice format has storage and computational complexities similar to those of the [Formula: see text]-matrix format, and hence a much lower cost of factorization than BLR. We then compare the BLR and lattice [Formula: see text]-matrix factorization on distributed-memory computers. Our performance results demonstrate that compared with BLR, the lattice format with the lower cost of factorization may lead to faster factorization on the distributed-memory computer.

Energy-Efficient Thread Mapping for Heterogeneous Many-Core Systems via Dynamically Adjusting the Thread Count

Improving computing performance and reducing energy consumption are a major concern in heterogeneous many-core systems. The thread count directly influences the computing performance and energy consumption for a multithread application running on a heterogeneous many-core system. For this work, we studied the interrelation between the thread count and the performance of applications to improve total energy efficiency. A prediction model of the optimum thread count, hereafter the thread count prediction model (TCPM), was designed by using regression analysis based on the program running behaviors and heterogeneous many-core architecture feature. Subsequently, a dynamic predictive thread mapping (DPTM) framework was proposed. DPTM uses the prediction model to estimate the optimum thread count and dynamically adjusts the number of active hardware threads according to the phase changes of the running program in order to achieve the optimal energy efficiency. Experimental results show that DPTM obtains a nearly 49% improvement in performance and a 59% reduction in energy consumption on average. Moreover, DPTM introduces about 2% additional overhead compared with traditional thread mapping for PARSEC (The Princeton Application Repository for Shared-Memory Computers) benchmark programs running on an Intel MIC (Many integrated core) heterogeneous many-core system.

SOC program for dust continuum radiative transfer

Context. Thermal dust emission carries information on physical conditions and dust properties in many astronomical sources. Because observations represent a sum of emission along the line of sight, their interpretation often requires radiative transfer (RT) modelling. Aims. We describe a new RT program, SOC, for computations of dust emission, and examine its performance in simulations of interstellar clouds with external and internal heating. Methods. SOC implements the Monte Carlo RT method as a parallel program for shared-memory computers. It can be used to study dust extinction, scattering, and emission. We tested SOC with realistic cloud models and examined the convergence and noise of the dust-temperature estimates and of the resulting surface-brightness maps. Results. SOC has been demonstrated to produce accurate estimates for dust scattering and for thermal dust emission. It performs well with both CPUs and GPUs, the latter providing a speed-up of processing time by up to an order of magnitude. In the test cases, accelerated lambda iterations (ALIs) improved the convergence rates but was also sensitive to Monte Carlo noise. Run-time refinement of the hierarchical-grid models did not help in reducing the run times required for a given accuracy of solution. The use of a reference field, without ALI, works more robustly, and also allows the run time to be optimised if the number of photon packages is increased only as the iterations progress. Conclusions. The use of GPUs in RT computations should be investigated further.

Distributed stochastic gradient descent for link prediction in signed social networks

This paper considers the link prediction problem defined over a signed social network, where the relationship between any two network users can be either positive (friends) or negative (foes). Given a portion of the relationships, the goal of link prediction is to identify the rest unknown ones. This task resorts to completing the adjacency matrix of the signed social network, which is low rank or approximately low rank. Considering the large scale of the adjacency matrix, in this paper, we adopt low-rank matrix factorization models for the link prediction problem and solve them through asynchronous distributed stochastic gradient descent algorithms. The low-rank matrix factorization models effectively reduce the size of the parameter space, while the asynchronous distributed stochastic gradient descent algorithms enable fast completion of the adjacency matrix. We validate the proposed algorithms using two real-world datasets on a distributed shared-memory computation platform. Numerical results demonstrate that the asynchronous distributed stochastic gradient descent algorithms achieve nearly linear computional speedups with respect to the number of computational threads, and are able to complete an adjacency matrix of ten billions of entries within 10 s.

An Easily Implemented, Block-Based Fast Marching Method with Superior Sequential and Parallel Performance

The fast marching method is well known for its worst-case optimal computational complexity in solving the Eikonal equation, and it has been employed in numerous scientific and engineering fields. However, it has barely benefited from fast-advancing multicore and many-core architectures because of the challenges presented by its apparent sequential nature. In this paper, we present a straightforward block-based approach for a highly scalable parallelization of the fast marching method on shared-memory computers. Central to our new algorithm is a simplified restarted narrow band strategy, which is used to replace the global bound for terminating the front marching by an incremental bound that increases by a given stride in each restart. Our algorithm greatly reduces load imbalance among blocks through a synchronized exchanging step after the marching step. Furthermore, simple activation mechanisms are introduced to skip blocks not involved in either step. Thus the new algorithm mainly consists of two loops, each for performing one step on a group of blocks. Notably, it does not contain any data race conditions, which is ideal for a direct loop level parallelization using multiple threads. A systematic performance study is carried out for several point source problems with various speed functions on grids with up to $1024^3$ points using two different computers. Substantial parallel speedups, e.g., up to 3--5 times the number of cores on a 16-core/32-thread computer and up to 2 orders of magnitude on a 64-core/256-thread computer, are demonstrated with all cases. As an extra bonus, our new algorithm also gives much improved sequential performance in most scenarios. Detailed pseudocodes are provided to illustrate the modification procedure from the single-block to the multiblock sequential algorithm in a step-by-step manner.

DASHMM Accelerated Adaptive Fast Multipole Poisson-Boltzmann Solver on Distributed Memory Architecture

We present an updated version of the AFMPB package for fast calculation of molecular solvation-free energy. The main feature of the new version is the successful adoption of the DASHMM library, which enables AFMPB to operate on distributed memory computers. As a result, the new version can easily handle larger molecules or situations with higher accuracy requirements. To demonstrate the updated code, we applied the new version to a dengue virus system with more than one million atoms and a mesh with approximately 20 million triangles, and were able to reduce the time-to-solution from 10 hours reported in the previous release on a shared memory computer to less than 30 seconds on a Cray XC30 cluster using 12, 288 cores.

Index-3 divide-and-conquer algorithm for efficient multibody system dynamics simulations: theory and parallel implementation

There has been a growing attention to efficient simulations of multibody systems, which is apparently seen in many areas of computer-aided engineering and design both in academia and in industry. The need for efficient or real-time simulations requires high-fidelity techniques and formulations that should significantly minimize computational time. Parallel computing is one of the approaches to achieve this objective. This paper presents a novel index-3 divide-and-conquer algorithm for efficient multibody dynamics simulations that elegantly handles multibody systems in generalized topologies through the application of the augmented Lagrangian method. The proposed algorithm exploits a redundant set of absolute coordinates. The trapezoidal integration rule is embedded into the formulation and a set of nonlinear equations need to be solved every time instant. Consequently, the Newton–Raphson iterative scheme is applied to find the system coordinates and joint constraint loads in an efficient and highly parallelizable manner. Two divide-and-conquer-based mass-orthogonal projections are performed then to circumvent the effect of constraint violation errors at the velocity and acceleration level. Sample open- and closed-loop multibody system test cases are investigated in the paper to confirm the validity of the approach. Challenging simulations of multibody systems featuring long kinematic chains are also performed in the work to demonstrate the robustness of the algorithm. The details of OpenMP-based parallel implementation on an eight-core shared memory computer are presented in the text and the parallel performance results are extensively discussed. Significant speedups are obtained for the simulations of small- to large-scale multibody open-loop systems. The mentioned features make the proposed algorithm a good general purpose approach for high-fidelity, efficient or real-time multibody dynamics simulations.