Serial Concatenation Scheme Research Articles

NEW CONCATENATION SCHEMES BASED ON THE MULTITHRESHOLD DECODERS OF CONVOLUTIONAL SELF-ORTHOGONAL CODES FOR GAUSSIAN CHANNELS

New serial concatenation schemes based on the multithreshold decoders and di- vergent principle for the convolutional self-orthogonal codes under Gaussian channels are proposed. Using both binary and symbolic decoders on the second decoding stage of the convolutional codes are considered. Simulation results are indicated the higher performance characteristics of the proposed cascade schemes on majority decoders in comparison with clas- sical schemes based on the Viterbi algorithm and Reed-Solomon codes. A moderate increase in decoding delay during concatenation is revealed. It is determined by the absence of the need to use traditional two-dimensional concatenated structures.

A Performance Analysis of Quantum Low-Density Parity-Check Codes for Correcting Correlated Errors

In this paper we analyse the performance of quantum low-density parity-check (LDPC) codes over quantum memory channels for correcting correlated errors, where the quantum LDPC codes we use are the hypergraph product quantum LDPC codes. We generalize the classical Gilbert-Elliot markovian memory channel to the quantum Gilbert-Elliot channel and use it to model the memory effect in quantum memory channels. The simulation results show the memory effects in quantum GE channels has a bad effect to the performance of hypergraph product quantum LDPC codes. Then we propose a concatenation scheme by serially concatenating two hypergraph product quantum LDPC codes and it is shown that the serial concatenation scheme can improve the performance of hypergraph product quantum LDPC codes and lower down the error floor over quantum GE channels.

Optimality and Duality of the Turbo Decoder

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> The near-optimal performance of the turbo decoder has been a source of intrigue among communications engineers and information theorists, given its <emphasis emphasistype="italic">ad hoc</emphasis> origins that were seemingly disconnected from optimization theory. Naturally one would inquire whether the favorable performance might be explained by characterizing the turbo decoder via some optimization criterion or performance index. Recently, two such characterizations have surfaced. One draws from statistical mechanics and aims to minimize the Bethe approximation to a free energy measure. The other characterization involves constrained likelihood estimation, a setting perhaps more familiar to communications engineers. The intent of this paper is to assemble a tutorial overview of these recent developments, and more importantly to identify the formal mathematical duality between the two viewpoints. The paper includes tutorial background material on the information geometry tools used in analyzing the turbo decoder, and the analysis accommodates both the parallel concatenation and serial concatenation schemes in a common framework. </para>

High-Rate Recursive Convolutional Codes for Concatenated Channel Codes

This letter presents the results of the search for optimum punctured recursive convolutional codes (RCCs) of rate k/k+1, for k=2,...,8, suitable for concatenated channel codes whose constituent encoders are recursive, systematic convolutional codes. The mother codes that are punctured are rate-1/2 RCCs proposed for use in parallel and/or serial concatenation schemes. Extensive tables of systematic and nonsystematic puncturing patterns, optimized relative to various objective functions suitable for concatenated channel codes, are presented for several mother codes.

Serial Concatenation of Space-Time and Recursive Convolutional Codes

We propose a new serial concatenation scheme for space-time and recursive convolutional codes, in which a space-time code is used as the outer code and a single recursive convolutional code as the inner code. We discuss previously proposed serial concatenation schemes employing multiple inner codes and compare them with the new one. The proposed method and the previous one with joint decoding, both performing a combined decoding of the simultaneous output signals from multiple antennas, give a large performance gain over the separate decoding method. In decoding complexity, the new concatenation scheme has a lower complexity compared with the multiple encoding/joint decoding scheme due to the use of the single inner code. Simulation results for a communication system with two transmit and one receive antennas in a quasi-static Rayleigh fading channel show that the proposed scheme outperforms the previous schemes.

VLSI architectures for turbo codes

A great interest has been gained in recent years by a new error-correcting code technique, known as coding, which has been proven to offer performance closer to the Shannon's limit than traditional concatenated codes. In this paper, several very large scale integration (VLSI) architectures suitable for turbo decoder implementation are proposed and compared in terms of complexity and performance; the impact on the VLSI complexity of system parameters like the state number, number of iterations, and code rate are evaluated for the different solutions. The results of this architectural study have then been exploited for the design of a specific decoder, implementing a serial concatenation scheme with 2/3 and 3/4 codes; the designed circuit occupies 35 mm/sup 2/, supports a 2 Mb/s data rate, and for a bit error probability of 10/sup -6/, yields a coding gain larger than 7 dB, with ten iterations.

A serial concatenation approach to iterative demodulation and decoding

Iterative demodulation and decoding of convolutionally encoded data is treated as a special case of the previously proposed serial concatenation of interleaved codes. It is shown that by exploiting the recursive nature of the differential modulation schemes (for example, DBPSK, DQPSK, CPM, etc.), large interleaving gains can be achieved similar to serial concatenation schemes. We also show that when memoryless modulation is used, precoding can be used to create a rate-1 recursive inner code in order to obtain interleaving gains without adding redundancy from the inner code.

Selective serial concatenation of turbo codes

A serial concatenation scheme consisting of a Bose-Chaudhuri-Hocquenghem (BCH) outer code and a turbo inner code is proposed. We first establish that only a small number of bit positions at the turbo decoder output are likely to be in error at high signal-to-noise ratios. A double-error correcting BCH outer code is used to protect these particular error prone bits. Simulation results for an additive white Gaussian noise (AWGN) channel show that the bit-error rate (BER) floor of the turbo code can be lowered by using this serial concatenation scheme. The proposed technique offers higher throughput efficiency and lower complexity than other serial concatenation schemes.