Sequential Verification Research Articles

EEG BASED SEQUENTIAL EPILEPTIC SEIZURE DETECTION USING CNN

The objective of the research work is to propose an electroencephalography based sequential approach for epileptic seizure detection method in a real time environment using chronological 2D convolutional neural network (CNN). Even though in link with CNN an electroencephalography (EEG) shows a substantial characters in observing the brain commotion of patients detecting epilepsy, it is pretended to investigate number of EEG illustration and its histories to perceive apprehensive epileptic activity. The proposed Model flows towards a BiLSTM (Bi-directional LSTM) to find multi-channel EEG signals and deliberates longitudinal temporal association, a feature in epileptic seizure discovery based on 2D convolutional layers. This research also been motivated to invoke and frame of CNN based raw electroencephalography indicators to advance the accuracy of finding epileptic seizure, as an alternative of regular feature abstraction to differentiate ictal, preictal, and interictal variations to find epileptic seizure detection. It was compared the routines of time and regularity domain signals in the detection of epileptic signals which is constructed and based on the health organization and its collaburation worldwide with scalp record which is transportable and potential in these parameters. Sorting the sequential approach and its consequences show that CNN has an approaching ability in the classification of EEG signals with a sequential verification and validation to recognition an accurate epileptic seizures by reaching 99.18% of global classification accuracy. Key words: Convolutional neural network (CNN), Bi-LSTM, Electroencephalography (EEG), Epileptic seizure.

A new hybrid inequality BAT for comprehensive all-level d-MP identification using minimal paths in Multistate Flow Network reliability analysis

In various network applications like wireless sensors, utilities, IoT, and transport systems, multistate flow networks (MFNs) serve as valuable models. A d-level minimal path (d-MP) is a unique type of MFN characterized by having a maximum flow of d without any redundant arcs. Assessing MFN reliability is critical and often relies on the d-MP algorithm, a foundational method for calculating reliability. Existing d-MP algorithms, however, lack the capability to concurrently identify all-level d-MPs. We propose a novel algorithm, the Hybrid Inequality Binary-Addition-Tree (IBAT), which overcomes existing limitations by concurrently discovering all-level d-MPs (decision-making points), thus enabling more informed decision-making. This hybrid IBAT combines the IBAT with several key techniques: the path-based layered-search algorithm (PLSA), sequential verification, the MP-to-arc state transformation, the cycle test, and the logarithmic prime pairwise comparison method (LPM). In contrast to existing methods, our BAT-based approach consistently showcases superior performance in the parallelized retrieval of all-level d-MPs, as substantiated through experiments conducted on 12 benchmark MFNs. Compared to existing methods, our BAT-based approach demonstrates superior performance in parallelized retrieval of all-level d-MPs in the execution times in discovering d-MPs across all levels, as validated by experiments on 12 benchmark MFNs.

Assessment Features of the Non-State Expert’s Opinion in Criminal Proceedings

Assessment Features of the Non-State Expert’s Opinion in Criminal Proceedings

SIGNATURE RECOGNITION ALGORITHMS. BEZIER ALGORITHM

This article focuses on improving the human and machine interface, which should ensure efficient processing of data and knowledge in simple, fast and accessible ways. One of the ways to organize it is the introduction of the manuscript (entering text, drawings, drawings, etc.). Handwritten signatures can be considered as handwritten words, but they are more suitable for drawings, because the signer tries to make his signature unique, using not only his first and last names, but also additional graphic elements. Creating a signature is quite simple, although it is impossible to reproduce the recording speed. The signature has long been used to certify the authenticity of documents and verify (authenticate) an individual. In principle, the signature examination is used during the forensic examination. Signature recognition can be carried out by sequential verification of the signature to each known person. The signature recognition methodology includes a verification methodology and processing of verification results. One of the modern areas of interface improvement is the development and research of software for signature recognition and visualization. The advent of modern computer input tools has led to the emergence of a new type of online signature describing the signature creation process, not the result. Moreover, not only the coordinates of points on the line, but also a sequence of vectors of parameter values for each of the values of pressure, direction and speed of movement, the angle of adaptation of the pen and the signature time.

Sequential verification of exogenous protein production in OVA gene-targeted chicken bioreactors

The chicken has potential as an efficient bioreactor system because of its outstanding protein production capacity and low cost. The CRISPR/Cas9-mediated gene-editing system enables production of highly marketable exogenous proteins in transgenic chicken bioreactors. However, because it takes approximately 18 mo to evaluate the recombinant protein productivity of the bioreactor due to the generation interval from G0 founders to G1 egg-laying hens, to verification of the exogenous protein at the early stage is difficult. Here we propose a system for sequential validation of exogenous protein production in chicken bioreactors as in hatching female chicks as well as in egg-laying hens. We generated chicken OVALBUMIN (OVA) EGFP knock-in (KI) chicken (OVA EGFP KI) by CRISPR/Cas9-mediated nonhomologous end joining at the chicken OVA gene locus. Subsequently, the estrogen analog, diethylstilbestrol (DES), was subcutaneously implanted in the abdominal region of 1-wk-old OVA EGFP KI female chicks to artificially increase OVALBUMIN expression. The oviducts of DES-treated OVA EGFP KI female chicks expressed OVA and EGFP at the 3-wk-old stage (10 d after DES treatment). We evaluated the expression of EGFP protein in the oviduct, along with the physical properties of eggs and egg white from OVA EGFP KI hens. The rapid identification and isolation of exogenous protein can be confirmed at a very early stage and high-yield production is possible by targeting the chicken oviduct.

Bounded Verification of Multi-threaded Programs via Lazy Sequentialization

Bounded verification techniques such as bounded model checking (BMC) have successfully been used for many practical program analysis problems, but concurrency still poses a challenge. Here, we describe a new approach to BMC of sequentially consistent imperative programs that use POSIX threads. We first translate the multi-threaded program into a nondeterministic sequential program that preserves reachability for all round-robin schedules with a given bound on the number of rounds. We then reuse existing high-performance BMC tools as backends for the sequential verification problem. Our translation is carefully designed to introduce very small memory overheads and very few sources of nondeterminism, so it produces tight SAT/SMT formulae, and is thus very effective in practice: Our Lazy-CSeq tool implementing this translation for the C programming language won several gold and silver medals in the concurrency category of the Software Verification Competitions (SV-COMP) 2014–2021 and was able to find errors in programs where all other techniques (including testing) failed. In this article, we give a detailed description of our translation and prove its correctness, sketch its implementation using the CSeq framework, and report on a detailed evaluation and comparison of our approach.

Combining state- and event-based semantics to verify highly available applications

Replicated databases are attractive for managing the data of distributed applications. To achieve high availability, low latency, and high throughput for such applications, consistency has to be weakened. This comes at a price: it is harder to prove application correctness. In this paper, we describe a new and powerful specification and verification technique for highly available applications together with the tool Repliss that partially automates its use. The verification technique is based on existing event-based semantics for database replication and embeds the semantics into a classical state-based verification approach for application programs. As a central contribution, we carefully designed the specification and programming framework in such a way, that the complex concurrent semantics are reduced to sequential verification, which is much easier to handle and provide a better basis for automated tool support. We prove the soundness of this reduction and a restricted form of completeness. All these proofs and the underlying semantics of the system have been formalized in Isabelle/HOL. • Composable proof technique for working with weak consistency. • Expressible specifications with history invariants. • Semantics, technique, and soundness proof verified in Isabelle/HOL. • Implementation of a prototype verification tool to support the technique.

PODXL might be a new prognostic biomarker in various cancers: a meta-analysis and sequential verification with TCGA datasets

ABSRACTBackgroundSeveral studies have investigated the associations between the podocalyxin-like protein (PODXL) expression quantity or locations and cancers survival, but the results were far from conclusive. Therefore, we proceeded a meta-analysis on PODXL in various human cancers to find its prognostic value and followed confirmation using the TCGA datasets.MethodsWe performed a systematic search, and 18 citations, including 5705 patients were pooled in meta-analysis. The results were verified with TCGA datasets.ResultsTotal eligible studies comprised 5705 patients with 10 types of cancer. And the result indicated that PODXL high-expression or membrane-expression were significantly related to poor overall survival (OS). However, subgroup analysis showed a significant association between high expressed PODXL and poor OS in the colorectal cancer, pancreatic cancer, urothelial bladder cancer, renal cell carcinoma and glioblastoma multiforme. Then, we validated the inference using TCGA datasets, and the consistent results were demonstrated in patients with pancreatic cancer, glioblastoma multiforme, gastric cancer, esophageal cancer and lung adenocarcinoma.ConclusionThe result of meta-analysis showed that high expressed PODXL was significantly linked with poor OS in pancreatic cancer and glioblastoma multiforme, but not in gastric cancer, esophageal cancer or lung adenocarcinoma. And the membrane expression of PODXL might also associate with poor OS. PODXL may act as tumor promotor and may serve as a potential target for antitumor therapy.

Probabilistic Analysis for Sequential Circuits Verification Using Markov Chains

Random testing is used extensively in functional verification of hardware systems. In practice, testing stops when a certain coverage criterion is achieved. However, testing has the inherent problem of being only able to expose bugs, not prove their absence. Thus, proving whether a potential bug exists or not under current verification efforts would be helpful to measure the completeness of testing. This brief proposes a probabilistic coverage analysis method to quantify the probability of bug existence for sequential circuit verification under random testing. The proposed method consists of an effective formula for computing the probability of a bug (assuming it exists) being detected in a sequential circuit. The formula is time complexity cubic to the number of coverage bins and linear to the number of test cycles. To validate the proposed method, it was implemented in MATLAB to calculate the probability of a bug being detected. Experimental results on 20,116 random instances indicate that, using Monte Carlo simulation, the proposed analysis method has an average absolute relative error of approximately 0.027%, comparing to 7.38% in existing work.

Verification and refutation of C programs based on k-induction and invariant inference

DepthK is a source-to-source transformation tool that employs bounded model checking (BMC) to verify and falsify safety properties in single- and multi-threaded C programs, without manual annotation of loop invariants. Here, we describe and evaluate a proof-by-induction algorithm that combines k-induction with invariant inference to prove and refute safety properties. We apply two invariant generators to produce program invariants and feed these into a k-induction-based verification algorithm implemented in DepthK, which uses the efficient SMT-based context-bounded model checker (ESBMC) as sequential verification back-end. A set of C benchmarks from the International Competition on Software Verification (SV-COMP) and embedded-system applications extracted from the available literature are used to evaluate the effectiveness of the proposed approach. Experimental results show that k-induction with invariants can handle a wide variety of safety properties, in typical programs with loops and embedded software applications from the telecommunications, control systems, and medical domains. The results of our comparative evaluation extend the knowledge about approaches that rely on both BMC and k-induction for software verification, in the following ways. (1) The proposed method outperforms the existing implementations that use k-induction with an interval-invariant generator (e.g., 2LS and ESBMC), in the category ConcurrencySafety, and overcame, in others categories, such as SoftwareSystems, other software verifiers that use plain BMC (e.g., CBMC). Also, (2) it is more precise than other verifiers based on the property-directed reachability (PDR) algorithm (i.e., SeaHorn, Vvt and CPAchecker-CTIGAR). This way, our methodology demonstrated improvement over existing BMC and k-induction-based approaches.

Маскирование неисправностей полюсов логических схем с использованием частичных функций

Combinational circuits (combinational parts of sequential circuits) are considered. Masking of internal nodes faults with applying sub-circuit, inputs of which are connected to the circuit inputs and outputs — to the circuit proper internal nodes, is suggested. The algorithm of deriving incompletely specified Boolean function for an internal node of the circuit based on using operations on ROBDDs is described. Masking circuit (patch circuit) design for the given internal fault nodes is reduced to covering of the system of incompletely specified Boolean functions corresponding to the fault nodes by the proper SoP system. Then the obtained system of completely specified Boolean functions is applied to derive masking circuit by using ABC system (A System for Sequential Synthesis and Verification). Experiments on bench marks show essential cutting of overhead in the frame of the suggested approach.

Multi-criteria placement and capacity selection of solar power plants in the “Baikal-Khövsgöl” Cross-Border Recreation Area

The problem of power supply to remote consumers in the “Baikal-Khövsgöl” Cross-Border Recreation Area, associated with the high length and low reliability of power lines is discussed. The assessment of the modes of the power distribution grid showed that the introduction of new consumers in this territory will lead to unacceptable voltage deviations, even taking into account the installation of reactive power compensating devices. Since the area under consideration has a high solar energy potential, it is advisable to use distributed solar generation. The choice of locations and capacities of solar power plants is a multi-criteria optimization problem. Four criteria are proposed: total voltage deviation, total active power losses, reliability and capital costs for construction. An algorithm for multi-criteria optimizationis developed and implemented as a program in the MATLAB, which consists in sequential verification of the feasibility of installing additional power of solar power plants at the consumers of each of the substations under consideration. For each variant, the electric grid mode is assessed using the Power system analysis toolbox program. Solutions for the choice of locations and capacities of solar power plants are obtained, providing high scores by criteria in accordance with the given criteria importance coefficients.

From high-level modeling toward efficient and trustworthy circuits

Behavior–interaction–priority (BIP) is a layered embedded system design and verification framework that provides separation of functionality, synchronization, and priority concerns to simplify system design and to establish correctness by construction. BIP framework comes with a runtime engine and a suite of verification tools that use D-Finder and NuSMV as model-checkers. In this paper, we provide a method and a supporting tool that take a BIP system and a set of invariants and compute a reduced sequential circuit with a system-specific scheduler and a designated output that is \(\mathtt {true}\) when the invariants hold. Our method uses ABC, a sequential circuit synthesis and verification framework, to (1) generate an efficient circuit implementation of the system that can be readily translated into FPGA or ASIC implementations and to (2) verify the system and debug it in case a counterexample is found. Moreover, we generate a concurrent C implementation of the circuit that can be directly used for runtime verification. We evaluated our method with two benchmark systems, and our results show that, compared to existing techniques, our method is faster and scales to larger sizes.

A Light-Weight Approach for Verifying Multi-Threaded Programs with CPAchecker

Verifying multi-threaded programs is becoming more and more important, because of the strong trend to increase the number of processing units per CPU socket. We introduce a new configurable program analysis for verifying multi-threaded programs with a bounded number of threads. We present a simple and yet efficient implementation as component of the existing program-verification framework CPAchecker. While CPAchecker is already competitive on a large benchmark set of sequential verification tasks, our extension enhances the overall applicability of the framework. Our implementation of handling multiple threads is orthogonal to the abstract domain of the data-flow analysis, and thus, can be combined with several existing analyses in CPAchecker, like value analysis, interval analysis, and BDD analysis. The new analysis is modular and can be used, for example, to verify reachability properties as well as to detect deadlocks in the program. This paper includes an evaluation of the benefit of some optimization steps (e.g., changing the iteration order of the reachability algorithm or applying partial-order reduction) as well as the comparison with other state-of-the-art tools for verifying multi-threaded programs.

Reliability of Physical Systems: Detection of Malicious Subcircuits (Trojan Circuits) in Sequential Circuits

Reliability of physical systems is provided by reliability of their parts including logical ones. Insertion of malicious subcircuits that can destroy logical circuit or cause leakage of confidential information from a system necessitates the detection of such subcircuits followed by their masking if possible. We suggest a method of finding a set of sequential circuit nodes in which Trojan Circuits can be inserted. The method is based on random estimations of controllability and observability of combinational nodes calculated using a description of sequential circuit working area and an evidence of existence of a transfer sequence for the proper set of internal states without finding the sequence itself. The method allows cutting calculations using operations on Reduced Ordered Binary Decision Diagrams (ROBDDs) that can depend only on the state variables of the circuit. The approach, unlike traditional ones, does not require preliminary sequential circuit simulation but can use its results. It can be used when malicious circuits cannot be detected during sequential circuit verification.

The Multilevel Modality-Switch Effect: What Happens When We See the Bees Buzzing and Hear the Diamonds Glistening.

Previous studies demonstrated that the sequential verification of different sensory modality properties for concepts (e.g., BLENDER-loud; BANANA-yellow) brings about a processing cost, known as the modality-switch effect. We report an experiment designed to assess the influence of the mode of presentation (i.e., visual, aural) of stimuli on the modality-switch effect in a property verification and lexical decision priming paradigm. Participants were required to perform a property verification or a lexical decision task on a target sentence (e.g., "a BEE buzzes", "a DIAMOND glistens") presented either visually or aurally after having been presented with a prime sentence (e.g., "the LIGHT is flickering", "the SOUND is echoing") that could either share both, one or none of the target's mode of presentation and content modality. Results show that the mode of presentation of stimuli affects the conceptual modality-switch effect. Furthermore, the depth of processing required by the task modulates the complex interplay of perceptual and semantic information. We conclude that the MSE is a task-related, multilevel effect which can occur on two different levels of information processing (i.e., perceptual and semantic).

Extremely Accurate Sequential Verification of RELAP5-3D

Large computer programs like RELAP5-3D solve complex systems of governing, closure, and special process equations to model the underlying physics of thermal-hydraulic systems and include specialized physics for the modeling of nuclear power plants. Further, these programs incorporate other mechanisms for selecting optional code physics, input, output, data management, user interaction, and post-processing. Before being released to users, software quality assurance requires verification and validation. RELAP5-3D verification and validation are focused toward nuclear power plant applications. Verification ensures that the program is built right by checking that it meets its design specifications, comparing coding algorithms to equations, comparing calculations against analytical solutions, and the method of manufactured solutions.Sequential verification performs these comparisons initially, but thereafter only compares code calculations between consecutive code versions to demonstrate that no unintended changes have been introduced. An automated, highly accurate sequential verification method, based on previous work by Aumiller, has been developed for RELAP5-3D. It provides the ability to test that no unintended consequences result from code development. Moreover, it provides the means to test the following code capabilities: repeated time-step advancement, runs continued from a restart file, and performance of coupled analyses using the R5EXEC executive program. Analyses of the adequacy of the checks used in these comparisons are provided.

Security monitor inlining and certification for multithreaded Java

Security monitor inlining is a technique for security policy enforcement whereby monitor functionality is injected into application code in the style of aspect-oriented programming. The intention is that the injected code enforces compliance with the policy (security), and otherwise interferes with the application as little as possible (conservativity and transparency). Such inliners are said to be correct. For sequential Java-like languages, inlining is well understood, and several provably correct inliners have been proposed. For multithreaded Java one difficulty is the need to maintain a shared monitor state. We show that this problem introduces fundamental limitations in the type of security policies that can be correctly enforced by inlining. A class of race-free policies is identified that precisely characterizes the inlineable policies by showing that inlining of a policy outside this class is either not secure or not transparent, and by exhibiting a concrete inliner for policies inside the class which is secure, conservative and transparent. The inliner is implemented for Java and applied to a number of practical application security policies. Finally, we discuss how certification in the style of proof-carrying code could be supported for inlined programs by using annotations to reduce a potentially complex verification problem for multithreaded Java bytecode to sequential verification of just the inlined code snippets.

Sequential Drug Verification Errors Resulting in Wrong Drug Administration During Cesarean Section

Sequential Drug Verification Errors Resulting in Wrong Drug Administration During Cesarean Section

Sequential verification of serializability

Serializability is a commonly used correctness condition in concurrent programming. When a concurrent module is serializable, certain other properties of the module can be verified by considering only its sequential executions. In many cases, concurrent modules guarantee serializability by using standard locking protocols, such as tree locking or two-phase locking. Unfortunately, according to the existing literature, verifying that a concurrent module adheres to these protocols requires considering concurrent interleavings. In this paper, we show that adherence to a large class of locking protocols (including tree locking and two-phase locking) can be verified by considering only sequential executions. The main consequence of our results is that in many cases, the (manual or automatic) verification of serializability can itself be done using sequential reasoning .