Separation By Implanted Oxygen Research Articles

Depth profiling of interfacial fluctuation with nanometer order in ultrathin silicon-on-insulator structure by classical Rutherford backscattering using 10B ions

We quantitatively investigated the thickness fluctuation in nanometer order observed in an ultrathin silicon-on-insulator (SOI) film separated by a shallow oxygen ion implantation in a silicon substrate by classical Rutherford backscattering spectrometry (RBS). We first show that the interfacial fluctuation in nanometer scale cannot be identified by the conventional RBS with high-energy MeV He ions due to poor depth resolution. We then explore the possibility of the improvement in the depth resolution by using the primary ions of relatively heavy 10B projectiles combined with a grazing geometry. As a result, we confirmed the ability to quantify the thin fluctuation in a few nanometers by the classical RBS method using 10B ions. We applied the technique to investigate the evaluation of the interfacial fluctuation in several nanometers at ultrathin SOI/BOX structure synthesized by low-energy separation by implanted oxygen (SIMOX) method. The interfacial roughness estimated by the present RBS was consistent with that estimated by the cross-sectional TEM image in advance.

Fabrication of Relaxed Germanium on Insulator via Room Temperature Wafer Bonding

Germanium with higher electron and hole mobilities has been considered as a potential material for replacement of Si in CMOS transistors. However, due to the lower band gap of Ge compare to Si, bulk Ge devices suffer a high leakage current, which could be suppressed by employing a germanium on insulator (GeOI) substrate. High-κ-all-around asymmetrically-strained germanium nanowire trigate p-MOSFETs have exhibited the highest hole mobility recorded (1490 cm2/V.s) [1]. There are several approaches for the fabrication of GeOI substrates including separation-by-implanted-oxygen (SIMOX) [2], Ge condensation [3], liquid phase epitaxy [4], and wafer bonding [5]. Wafer bonding technique is advantageous among the other techniques due to its simplicity and potential for achieving high quality crystalline Ge layer.In this work we present a method to fabricate relaxed and strained GeOI substrates using heteroepitaxy and layer transfer techniques. The goal is to produce high quality wafer scale GeOI platform for relaxed and strained Ge nanowire CMOS fabrication. GeOI substrates are designed and fabricated via wafer bonding and etch back process without intermediary chemical mechanical polishing (CMP) step. Low temperature bonding avoids strain relaxation, Ge diffusion and detaching due to thermal expansion coefficient differences. In this design, GeOI structure is achieved by epitaxial growth and conventional dry and wet-etch techniques. All the epitaxial layers in the process are grown using RPCVD Epsilon 2000 ASM reactor. The fabrication process for both structures starts with the epitaxial growth of a roughly 1 µm Si0.96Ge0.04 etch stop layer. In the strained GeOI design the process is followed by epitaxial growth of an intermediate relaxed SiGe buffer with a Ge content of 40-50 percent, then a strained Si etch-stop layer and finally pseudomorphic growth of a thin strained Ge layer on top (Fig. 1). In relaxed GeOI structure on 1 µm Si0.96Ge0.04 etch stop layer a rather thick Ge layer (~300 nm) is grown in two steps, first a low temperature (LT) Ge is grown with high defect density and then a high temperature (HT) high quality Ge layer is grown on top (Fig. 2). Once the epitaxial growth of the structures is finished, 10 nm Al2O3 is deposited on top the Ge layer using atomic layer deposition (ALD). Then the wafers are brought together in the atmosphere pressure for room temperature bonding. The etch-back process begins by thinning down the donor wafer using Applied Materials Centura deep trench Si etch chamber (etch rate ~7 µm/min ). The etching process stops on the Si0.96Ge0.04 etch stop layer using endpoint detection system. At that point, the Si0.96Ge0.04etch-stop layer is selectively etched in TMAH solution. Then in relaxed GeOI structure the 300 nm Ge layer is oxidized and chemically thinned, up to the desired thickness (Fig. 2). In the strained GeOI structure SiGe relaxed buffer layer is selectively wet etched using dHF(100H2O:1HF):HNO3:CH3COOH (0.15:0.20:0.30) solution, and the strained Si layer is selectively removed in TMAH solution, leaving the strained Ge layer on Al2O3 (Fig. 1). Infrared (IR) image of the bonded wafers shows few voids at the interface and the bonding can withstand fast deep Si dry etching. X-ray analysis shows high quality well separated peaks for both structures and demonstrates the strain in top Ge layer (for the strained GeOI). The bonding strength will be measured using stress tester. The bonded interfaces will be observed by high resolution transmission electron microscopy (HRTEM). Topology of both Ge surfaces will be shown by atomic force microscopy (AFM).In summary, processes for the fabrication of high quality, low defect, monocrystalline, relaxed and strained germanium on insulator substrates are developed and optimized. This technique can serve as a platform for the fabrication of high performance Ge devices. AcknowledgmentThis work was supported by European Union ERC Advanced Grant 228229 OSIRIS.Fig. 1) schematic image of the bond and etch back process for strained GeOIFig. 2) schematic image of the bond and etch back process for relaxed GeOI[1] J. L. H. et al., IEEE, p. 4, 2012.[2] T. Mizuno, et al., IEEE Electron Device Lett., no. 5, pp. 230–232, May 2000.[3] T. Tezuka, et al., Appl. Phys. Lett., no. 12, p. 1798, 2001.[4] M. Miyao, et al., Appl. Phys. Express, p. 045503, Apr. 2009.[5] G. Taraschi, et al., Solid. State. Electron., no. 8, pp. 1297–1305, Aug. 2004.

Residual doping concentration estimation in a separation by IMplanted OXygen film using current measurements

In situ measurements of static characteristics for an ad-hoc silicon-on-insulator (SOI) device represent an important method for SOI technologies characterisation. The Separation by IMplanted OXygen (SIMOX) technique is based on oxygen ions implantation into Si-film. After annealing, an increased doping concentration was reported, because of the residual oxygen clusters within the film, giving rise to oxygen thermal donors. Therefore this study offers an original algorithm for doping concentration estimation in these SOI films. A specific device used for in situ electrical characterisation of SOI wafers is the pseudo-metal oxide semiconductor (MOS) transistor. In this study, the doping concentrations extraction is based on graphical solution of a non-linear equation and third-order derivative zeroing of the measured static characteristics. In this scope, experimental curves I D–V G, in inversion and accumulation were experimentally measured for a pseudo-MOS transistor made in SIMOX technology. In this situation, the threshold and flat-band voltage are extracted, free of classical conventions. The extracted doping concentration in film is roughly 5.8 × 1015 cm− 3; also the conductivity is changed from p to n in film, as the literature predicted.

Intelligent Detector of Internal Combustion Engine Cylinder Pressure and Sensitivity Temperature Coefficient Compensation

The detecting device based on mechanical mechanism is far from the measurement of internal combustion engine cylinder explosion and compression pressure. This pressure detection is under the environment of pulsed gas (over 500 times per one minute) and mechanical impactive vibration. Piezoresistive detection with silicon on insulator (SOI) strain gauges to pressure seems to be a good solution to meet such special applications. In this work, separation by implanted oxygen (SIMOX) wafer was used to fabricate the high temperature pressure sensor chip. For high accuracy and wide temperature range application, this paper also presents a novel pressure sensitivity temperature coefficient (TCS) compensation method, using integrated constant current network. A quantitative compensation formula is introduced in mathematics. During experiments, the absolute value of the compensated TCS is easy to be 10 × 10−6/°C~100 × 10−6/°C by individual adjustment and calibration of each device’s temperature compensation. Therefore, the feasibility and practicability of this technology are tested. Again, the disadvantages are discussed after the research of the experiment data and the improvement methods are also given in the designing period. This technology exhibits the great potential practical value of internal combustion engine cylinder pressure with volume manufacturing.

Transmission Electron Microscopy Study of Stacking Fault Pyramids Formed in Multiple Oxygen Implanted Silicon-on-Insulator Material

The microstructure of various shapes of stacking fault pyramids (SFPs) formed in multiple implant/anneal Separation by Implanted Oxygen (SIMOX) material were investigated by plan-view and cross-sectional transmission electron microscopy. In the multiple implant/anneal SIMOX, the defects in the top silicon layer are confined at the interface of the buried oxide layer at a density of <TEX>${\sim}10^6\;cm^{-2}$</TEX>. The dominant defects are perfect and imperfect SFPs. The perfect SFPs were formed by the expansion and interaction of four dissociated dislocations on the {111} pyramidal planes. The imperfect SFPs show various shapes of SFPs, including I-, L-, and Y-shapes. The shape of imperfect SFPs may depend on the number of dissociated dislocations bounded to the top of the pyramid and the interaction of Shockley partial dislocations at each edge of {111} pyramidal planes.

Local-Stress-Induced Trap States in SOI Layers With Different Levels of Roughness at SOI/BOX Interfaces

The authors examined the origins of high-density trap states in silicon-on-insulator (SOI) layers by means of scanning probe microscopy measurements, I-V characteristics in MOSFETs, and micro-Raman measurements in SOI wafers, including bonded wafers and separation by implanted oxygen (SIMOX) wafers having different root-mean-square values of roughness at the SOI/buried oxide (BOX) interface. As a result, it was concluded that nanoscale roughness at the SOI/BOX interface causes local mechanical stress a few tens of nanometers from the interface and that this stress induces the SIMOX-specific high-density trap states for holes as well as for electrons in the SOI layers.

Investigation of silicon on insulator fabricated by two-step O+ implantation

In this paper, we investigated the dose window of forming a continuous buried oxide (BOX) layer by single implantation at the implantation energy of 200 keV. Then, an improved two-step implantation process with second implantation dose of 3×1015 cm−2 was developed to fabricate high quality separation by implanted oxygen (SIMOX) silicon on insulator (SOI) wafers. Compared with traditional single implantation, the implantation dose is reduced by 18.2%. In addition, the thickness and uniformity of the BOX layers were evaluated by spectroscopic ellipsometry. Defect-free top Si as well as atomic-scale sharp top Si/buried oxide interfaces were observed by transmission electron microscopy, indicating a high crystal quality and a perfect structure of the SOI fabricated by two step implantation. The top Si/BOX interface morphology of the SOI wafers fabricated by single or two-step implantation was also investigated by atomic force microscopy.

In-depth profiling of electron trap states in silicon-on-insulator layers and local mechanical stress near the silicon-on-insulator/buried oxide interface in separation-by-implanted-oxygen wafers

In-depth profiling of electron trap states in silicon-on-insulator (SOI) layers of separation-by-implanted-oxygen (SIMOX) wafers was carried out using the drain current-gate voltage characteristics of metal-oxide-semiconductor field-effect transistors (MOSFETs) with different SOI thicknesses, and the density of electron trap states in a gate oxide (GOX) layer thermally grown on them was measured using the gate tunneling current-gate voltage characteristics of MOSFETs. It was found that in-depth profiles of electron trap states in SOI layers have a broad peak at around 25 nm from the SOI/buried oxide (BOX) interface, and that the density of electron trap states in a GOX layer grown on the 25-nm-thick SOI layer reaches a maximum there. A morphology study using Auger electron spectroscopy and Raman spectroscopic study revealed a correlation among the density of trap states in an SOI layer, roughness, and local mechanical stress near the SOI/BOX interface. This correlation is understood to imply that local mechanical stress near the SOI/BOX interface, which is induced by roughness at the interface peculiar to the SIMOX process, enhances the generation of structural defects and resultant electron trap states in the SOI layer of a SIMOX wafer.

Study of High-Quality and Crack-Free GaN Growth on 3C-SiC/Separation by Implanted Oxygen (111)

We investigated the growth of GaN on 3C-SiC fabricated by the deposition and carbonization of a separation by implanted oxygen (SIMOX) surface. The dependences of AlN buffer thickness on the crystalline quality and surface morphology of the GaN grown on 3C-SiC/SIMOX (111) by low-pressure metal-organic vapor phase epitaxy (LP-MOVPE) were examined. We studied the stress of GaN by the in situ monitoring of the reflectance and substrate curvature. High-quality GaN with a smooth surface was obtained using an AlN buffer of 10 nm thickness. Moreover, the fabrication of crack-free GaN was achieved using an AlN/GaN superlattice (SL) structure on an AlGaN/AlN buffer.

Influence of nitrogen dose on the charge density of nitrogen-implanted buried oxide in SOI wafers

To harden silicon-on-insulator (SOI) wafers fabricated using separation by implanted oxygen (SIMOX) to total-dose irradiation, the technique of nitrogen implantation into the buried oxide (BOX) layer of SIMOX wafers can be used. However, in this work, it has been found that all the nitrogen-implanted BOX layers reveal greater initial positive charge densities, which increased with increasing nitrogen implantation dose. Also, the results indicate that excessively large nitrogen implantation dose reduced the radiation tolerance of BOX for its high initial positive charge density. The bigger initial positive charge densities can be ascribed to the accumulation of implanted nitrogen near the Si-BOX interface after annealing. On the other hand, in our work, it has also been observed that, unlike nitrogen-implanted BOX, all the fluorine-implanted BOX layers show a negative charge density. To obtain the initial charge densities of the BOX layers, the tested samples were fabricated with a metal-BOX-silicon (MBS) structure based on SIMOX wafers for high-frequency capacitance–voltage (C–V) analysis.

Characterization and analysis of silicon on insulator fabricated by separation by implanted oxygen layer transfer

In this article, silicon on insulator (SOI) was fabricated by separation by implanted oxygen (SIMOX) layer transfer process. The thickness uniformity of the top Si (superficial Si of the SOI) evaluated by spectroscopic ellipsometry remains constant through the etch-stop thinning process. A defect-free top Si was observed by transmission electron microscopy, as well as its atomic-scale sharp interface that was adjacent to the buried oxide (BOX) layer. The top Si/BOX interface properties, including upper BOX surface roughness and interface state density, were investigated by atomic force microscopy (AFM) and pseudo-metal-oxide-semiconductor method, respectively. In addition, the surface morphology of the square pit and square hole defect of the top Si were observed. Using AFM, it is found that the morphology depends on the top Si/BOX interface morphology of the donor wafer and can be improved by optimizing the annealing process. The square hole defect caused by anisotropic etching is discussed in detail, and it is proven to originate from the defects in the SIMOX BOX.

Radiation response of pseudo-MOS transistors fabricated in hardened fully-depleted SIMOX SOI wafers

The total dose radiation response of pseudo-MOS transistors fabricated in hardened and unhardened FD (fully-depleted) SIMOX (Separation by Implanted Oxygen) SOI (Silicon-on-insulator) wafers is presented. At 1 Mrad(Si) radiation dose, the threshold voltage shift of the pseudo-MOS transistor is reduced from –115.5 to –1.9 V by the hardening procedure. The centroid location of the net positive charge trapped in BOX, the hole-trap density and the hole capture fraction of BOX are also shown. The results suggest that hardened FD SIMOX SOI wafers can perform well in a radiation environment.

Effects of Si implantation on the total dose hardness of fully-depleted SIMOX wafers

Total dose hardened fully-depleted SOI materials are fabricated on separation by implanted oxygen (SIMOX) materials by silicon ion implantation and annealing. The ID–VG characteristics of pseudo-MOS transistors pre- and post-irradiation are tested with 60Co gamma rays. The chemical bonds and the structure of Si in the buried oxide are also studied by X-ray photoelectron spectroscopy and cross-sectional high-resolution transmission electron microscopy, respectively. The results show that Si nanocrystals in the buried oxide produced by ion implantation are efficient deep electron traps, which can significantly compensate positive charge buildup during irradiation. Si implantation can enhance the total-dose radiation tolerance of the fully-depleted SOI materials.

Effect of excess vacancy concentration on As and Sb doping in Si

In defect engineering, defects are intentionally introduced in a substrate to modify dopant behaviour. In this work, we used high resolution depth profiling and electrical characterization to analyse As and Sb behaviour in Si substrates with and without excess vacancies. Vacancies were generated by nitrogen or oxygen ion pre-implantation prior to dopant (As or Sb) implantation. Separation by implanted oxygen (SIMOX) samples were also doped and analysed. The results obtained for Si without vacancies and SIMOX were similar in regard to dopant distribution, retention and their electrical characteristics. Vacancy-rich samples show different electrical characteristics and redistribution behaviour during annealing, attributed not just to the presence of vacancies but also to the ion used to create them. In the case of As doping, oxygen pre-implanted samples had a larger retained dose and less As interface accumulation, whereas for Sb doping, nitrogen pre-implanted samples presented a larger retained dose and less Sb interface accumulation. For both dopants, vacancy-rich samples had lower electrically active dopant concentrations, but better thermal stability of the activated dopants when compared with SIMOX and Si.

Fabrication of Thick-film Silicon-on-Insulator by Separation by Implanted Oxygen Layer Transfer

In this paper, two approaches combined the Separation by IMplanted OXygen (SIMOX) layer transfer (SLT) process with Si epitaxy are proposed to fabricate thick-film Silicon-on-Insulator (SOI). Spectroscopic ellipsometry indicates thick-film SOI wafers with the top Si layers of 1430.86 {plus minus} 19.8 nm and 1476.44 {plus minus} 18.5 nm are achieved. Atomic-scale sharp interfaces between the top Si layer and buried oxide layers are observed by high-resolution transmission electron microscopy. Using atomic force microscopy, surface morphology of the SOI wafer is also investigated.

Gettering layer for oxygen accumulation in the initial stage of SIMOX processing

A cavity layer or nano-bubble layer introduced by He implantation before the oxygen implantation collects the implanted oxygen and increases the oxygen concentration. The average size and density of the oxygen precipitates formed in the initial stage of the separation-by-implanted-oxygen (SIMOX) process is conform with the size and density of the cavities pre-formed by He implantation and annealing. The gettering ability of the cavity layer for oxygen is directly related to the area of the internal surface of the cavities. A nano-bubble layer accumulates oxygen in a very narrow range occurring between the damage maximum, DP, and the mean projected ion range, RP. Such a nano-bubble layer is most efficient in oxygen gettering due to their larger area of the internal surface and the small size of the oxide precipitates initially formed at the bubbles.

Investigation of structure and composition of buried oxide layers formed by oxygen-ion implantation into silicon

Single-crystal ⟨ 1 1 1 ⟩ silicon samples were implanted at room temperature and at elevated temperature (325 °C) with oxygen (16O+) ions at 140 keV energy to fluence levels 1.0×1017, 2.5×1017 and 5.0×1017 cm−2 to synthesize buried layers using the SIMOX (separation by implanted oxygen) process. We have studied the process of buried oxide formation as a function of implantation temperature and fluence. The effects of fluence and implantation temperature on the structure and composition of the ion-beam-synthesized, buried silicon oxide layers were investigated by Fourier transform infrared (FTIR) spectroscopy, X-ray diffraction (XRD) studies and Rutherford backscattering spectroscopy (RBS) measurements, respectively. The FTIR spectra of the implanted samples revealed a single broad absorption band in the wavenumber range 1250–750 cm−1, indicating the formation of silicon oxide. The integrated absorption band intensity was found to increase with increasing ion fluence. The absorption peak of the elevated-temperature-implanted sample was broader than that of the room-temperature-implanted sample. The structure of the ion-beam-synthesized oxide layers showed strong dependence on the fluence and implant temperature. The XRD studies reveal the synthesis of silicon oxide (SiO2) structure at all fluences. The RBS measurements show that the thickness of the buried oxide layer increases with an increase in the oxygen fluence. In general, however, the thickness of the top silicon layer was found to decrease with an increase in the ion fluence.

Fabrication of thin-film silicon on insulator by separation by implanted oxygen layer transfer

In this article, the authors propose an improved approach—separation by implanted oxygen (SIMOX) layer transfer process—to fabricate thin-film silicon on insulator (SOI). The top Si layer, a low-dose SIMOX wafer, was transferred upside down onto a thermally oxidized Si handle wafer by a bonding technique and etch-stop thinning process. Spectroscopic ellipsometry indicated a thin-film SOI with the device layer of 147.5±3.1nm. An atomic-scale sharp interface between the device layer and buried oxide layer was observed by high-resolution transmission electron microscopy.

Effects of Helium and Oxygen Common Implantation in Silicon Wafer

Defect engineering for SiO2 precipitation is investigated using He-ion implantation as the first stage of separation by implanted oxygen (SIMOX). Cavities are created in Si by implantation with helium ions. After thermal annealing at different temperatures, the sample is implanted with 120keV 8.0 × 1016 cm-2 O ions. The O ion energy is chosen such that the peak of the concentration distribution is centred at the cavity band. For comparison, another sample is implanted with O ions alone. Cross-sectional transmission electron microscopy (XTEM), Fourier transform infrared absorbance spectrometry (FTIR) and atomic force microscopy (AFM) measurements are used to investigate the samples. The results show that a narrow nano-cavity layer is found to be excellent nucleation sites that effectively assisted SiO2 formation and released crystal lattice strain associated with silicon oxidation.

Total dose radiation effects on SOI NMOS transistors with different layouts

Partially-depleted Silicon-On-Insulator Negative Channel Metal Oxide Semiconductor (SOI NMOS) transistors with different layouts are fabricated on radiation hard Separation by IMplanted OXygen (SIMOX) substrate and tested using 10 keV X-ray radiation sources. The radiation performance is characterized by transistor threshold voltage shift and transistor leakage currents as a function of the total dose up to 2.0×106 rad(Si). The results show that the total dose radiation effects on NMOS devices are very sensitive to their layout structures.