Semiconductor Manufacturing Technology Research Articles

Spectroscopy Detection and Imaging System Based on Line Array Single Photon Detectors

Abstract. Single-photon detectors, with their exceptional sensitivity, provide a reliable means for single-photon-level detection, demonstrating significant advantages in detecting weak signals in complex environments compared to traditional detectors. With the continuous advancement in semiconductor manufacturing technology, single-photon detectors based on linear array configurations have emerged and rapidly developed. This study utilizes a linear array single-photon detector in free-running mode combined with a scanning mechanism to design and implement a spectral detection and imaging system. Through the spectral scanning unit, this system successfully achieves precise spectral detection in the 890 nm to 1710 nm range, with a spectral resolution better than 2 nm. Utilizing the imaging scanning unit, the system effectively performs target spectral imaging under single and multiple wavelength conditions at 1064 nm, 1310 nm, and 1520 nm. By optimizing algorithms for data processing, the system can achieve rapid and accurate spectral detection and imaging even under low-light conditions where the average photon count per pixel is less than 3. The results of this study are expected to provide strong technical support for the application of spectral imaging technology in the field of high-speed detection and imaging.

Fatigue fracture mechanism of sputtered AlSi alloy film by pulsating-tension cyclic loading testing

This paper focuses on investigating the differences in fatigue fracture between sputtered aluminum silicon (AlSi) alloy and pure aluminum (Al) films by means of pulsating-tension cyclic loading tests. AlSi alloy film with 1.0 wt% (wt%) silicon (Si) and pure Al film are prepared at a substrate temperature of 450 ℃ and 260 ℃, respectively, by dc magnetron sputtering. After annealing those films at 490 ℃ under a hydrogen and nitrogen atmosphere for 1 hour, the tensile test specimens are prepared using semiconductor fabrication technologies. Quasi-static tensile tests measure the mean yield strength of 52 MPa and 33 MPa for AlSi and Al films, respectively, which are used as reference stress values for fatigue tests. During fatigue tests, a crack is introduced at the one-side edge of pure Al film specimen and propagates straightly to the other side, whereas a zig-zag crack is observed in AlSi alloy film. The crack propagation rate for AlSi film is around one-tenth of that for pure Al film. The mechanism of fatigue crack propagation is discussed based on element mapping results by energy dispersive X-ray analysis.

Alternatives to Fluoropolymers for Motion-Based Energy Harvesting: Perspectives on Piezoelectricity, Triboelectricity, Ferroelectrets, and Flexoelectricity.

Fluoropolymers, including polytetrafluoroethylene (PTFE, Teflon), polyvinylidene difluoride (PVDF), and fluorine kautschuk materials (FKMs, Viton) are critical polymers for applications ranging from non-stick coatings, corrosion resistant seals, semiconductor manufacturing, membranes, and energy harvesting technologies. However, the synthesis of these fluoropolymers requires the use of per- and polyfluorinated alkyl substances (PFAS) known colloquially as "forever chemicals," and as such there is a pressing need to develop alternative technologies that can serve the end-use of fluoropolymers without the environmental cost of using PFAS. Further, fluoropolymers themselves fall under the PFAS umbrella. Here, alternative mechanical-to-electrical energy harvesting polymers are reviewed and benchmarked against the leading fluoropolymer energy harvesters. These alternative technologies include nonfluoropolymer piezoelectric polymers, triboelectric nanogenerators (TENGs), ferroelectric elastomers, and flexoelectric polymers. A vision towards sustainable, non-fluoropolymer-based energy harvesting is provided.

Rapid single-shot parity spin readout in a silicon double quantum dot with fidelity exceeding 99%

Silicon-based spin qubits offer a potential pathway toward realizing a scalable quantum computer owing to their compatibility with semiconductor manufacturing technologies. Recent experiments in this system have demonstrated crucial technologies, including high-fidelity quantum gates and multiqubit operation. However, the realization of a fault-tolerant quantum computer requires a high-fidelity spin measurement faster than decoherence. To address this challenge, we characterize and optimize the initialization and measurement procedures using the parity-mode Pauli spin blockade technique. Here, we demonstrate a rapid (with a duration of a few μs) and accurate (with >99% fidelity) parity spin measurement in a silicon double quantum dot. These results represent a significant step forward toward implementing measurement-based quantum error correction in silicon.

Fabrication of silver nanostructure array patterns (SNAPs) on silicon wafer for highly sensitive and reliable SERS substrates

Metal nanostructure arrays with large amounts of nano-gaps are important for surface enhanced Raman scattering applications, though the fabrications of such nanostructures are difficult due to the complex and multiple synthetic steps. In this research, we report silver nanostructure array patterns (SNAPs) on silicon wafer, which is fabricated with semiconductor manufacturing technology, Cu2O electrochemistry deposition, and Ag In-situ oxidation–reduction growth. Benefiting from the dense and uniform distribution of Ag nanowires, the fabricated SNAPs demonstrate a very strong and uniform surface-enhanced Raman scattering (SERS) effect. The efficiency of SNAPs was investigated by using rhodamine 6G (R6G) dye as an analyte molecule. The results show that the minimum detectable concentration of R6G can reach as low as 10−11 M, and the Raman signals in the random region show good signal homogeneity with a low relative standard deviation (RSD) of 4.77 %. These results indicate that the SNAPs perform a great sensitivity and uniformity as a SERS substrate. Furthermore, we used the SNAPs substrate to detect antibiotic sulfadiazine. The main peaks in sulfadiazine Raman and vibration modes assignments were obtained and the quantitative analysis model was established by principal component analysis (PCA). The detection and application results of sulfadiazine indicate that the SNAPs substrate can be applied for trace detection of antibiotics. In addition, we have cited the application of the SNAPs substrate in anti-counterfeiting labels. These practical applications demonstrate that the fabricated SNAPs can potentially provide a way to develop low-cost SERS platforms for environmental detections, biomedicine analysis, and commodities anti-counterfeiting.

Створення активних оптичних метаповерхонь на плівках халькогенідних напівпровідників зі зміною фазового стану

The development of meta-optics is due to human aspirations for the maximum miniaturization of optical elements, the design and control of light fluxes, as well as the improvement of visualization and image processing. Metasurfaces, i.e. arrays with subwavelength distances (smaller than the wavelength of light), and optically thin elements trigger new physical mechanism and phenomena that are very different from those observed in three-dimensional bulk materials. Thus, meta-devices perform complete control and management of the characteristics of the light flux (phase, amplitude, polarization) with the help of one flat layer. Compared to traditional bulky lenses, metasurface lenses have advantages such as flatness, light weight, and compatibility with semiconductor manufacturing technology. The use of active (reconfigurable) metasurfaces, the characteristics of which can be dynamically rearranged after manufacturing, makes it possible to significantly expand the capabilities of meta-optics. The paper presents the results of the analysis of the properties and technologies of creating optically active metasurfaces for optical image processing and transformation systems. Generalized methods of forming metasurfaces are described: self-organization, selective chemical etching, holographic and lithographic. To implement the work of active (reconfigured) metasurfaces based on materials with a change in phase state (amorphous/crystalline), heating technologies with electric current pulses of various amplitudes and durations and the action of direct optical radiation are used. The analysis of materials for the formation of optically active metasurfaces and devices based on them that simulate the front of a light wave and work on reflection and transmission is presented. Special attention is paid to the use of photosensitive chalcogenide semiconductors as metamaterials with a phase change. Examples of materials such as Ge2Sb2Te5 (GST) and AgxInSb2Te (AIST), which have been used for decades in optical data storage and electronic memory devices, are given. A series of novel compositions of optical phase change materials such as Ge2Sb2Se4Te (GSST), Sb2S3, Sb2Se3, Ge2Sb2Te3S2 and In3SbTe2 for optical and photonic applications are also proposed. Direct laser recording on photosensitive films of chalcogenide semiconductors with the use of technological equipment for laser recording of master disks is proposed as a promising method of forming arrays with submicron distances and realizing the work of active metasurfaces.

Data-Driven Feature Selection Framework for Approximate Circuit Design

The ever-growing data scale and computation complexity raise tremendous concerns about computer systems’ efficiency (i.e., lower hardware overhead and power consumption). Orthogonal to the advancement in semiconductor manufacturing technologies, approximate computing provides an alternative paradigm to reduce the hardware cost and power dissipation by relaxing computation quality for error-resilient applications. Voltage over-scaling (VOS) and approximate logic design (ALD) have become two mainstream approaches of approximate computing due to their superior performance in efficiency-critical designs. VOS reduces the power in quadratic by scaling down supply voltage while ALD saves hardware overhead by redesigning an approximate version of a given circuit (e.g., trimming less significant circuitry). However, these primitive approximate circuits (PAC) inevitably introduce notable errors and require additional error compensation circuits (ECC) to preserve computation accuracy. In existing works of ECC design, there lacks a systematic method that can generalize well to different approximate computing approaches. In this paper, we present a data-driven feature selection framework for approximate circuit design, which is applicable to both VOS and ALD. We propose novel algorithms that profoundly analyze the correlation between input data and output errors and select the most critical features to generate compensation circuits. Extensive evaluations are performed over a variety of circuits using approximate finite impulse response (FIR) filters and the prevalent approximate computing benchmark AxBench. The experimental results show that the proposed approach achieves superior compensation performance, boosting the circuit accuracy while only introducing trivial area overhead.

Improving the Performance of CNN Accelerator Architecture under the Impact of Process Variations

Convolutional neural network (CNN) accelerators are popular specialized platforms for efficient CNN processing. As semiconductor manufacturing technology scales down to nano scale, process variation dramatically affects the chip’s quality. Process variation causes delay variation within the chip due to transistor parameter differences. CNN accelerators adopt a large number of processing elements (PEs) for parallel computing, which are highly susceptible to process variation effects. Fast CNN processing desires consistent performance among PEs; otherwise the processing speed is limited by the slowest PE within the chip. In this work, we first quantitatively model and analyze the impact of process variation on CNN accelerators’ operating frequency. We further analyze the utilization of CNN accelerators and the characteristics of CNN models. We then leverage the PE underutilization to propose a sub-matrix reformation mechanism and leverage the pixel similarity of images to propose a weight transfer technique. Both techniques are able to tolerate the low-frequency PEs and achieve performance improvement at chip level. Furthermore, a novel resilience-aware mapping technique that exploits the diversity in the importance of weights is also proposed to improve the performance. Evaluation results show that our techniques are able to achieve significant processing speed improvement with negligible accuracy loss.

Bio-Microfabrication of 2D and 3D Biomimetic Gut-on-a-Chip.

Traditional goal of microfabrication was to limitedly construct nano- and micro-geometries on silicon or quartz wafers using various semiconductor manufacturing technologies, such as photolithography, soft lithography, etching, deposition, and so on. However, recent integration with biotechnologies has led to a wide expansion of microfabrication. In particular, many researchers studying pharmacology and pathology are very interested in producing in vitro models that mimic the actual intestine to study the effectiveness of new drug testing and interactions between organs. Various bio-microfabrication techniques have been developed while solving inherent problems when developing in vitro micromodels that mimic the real large intestine. This intensive review introduces various bio-microfabrication techniques that have been used, until recently, to realize two-dimensional and three-dimensional biomimetic experimental models. Regarding the topic of gut chips, two major review subtopics and two-dimensional and three-dimensional gut chips were employed, focusing on the membrane-based manufacturing process for two-dimensional gut chips and the scaffold-based manufacturing process for three-dimensional gut chips, respectively.

Detection and identification of particles on silicon wafers based on light scattering and absorption spectroscopy and Machine learning

Modern semiconductor manufacturing technology have a high-quality requirement of the wafers, and therefore the wafer inspection technique becomes increasingly important. During the manufacturing processes, particles can attach on the surface of the wafer which is an important factor of the quality and can even make it impossible to use the wafer. In this research, we introduce a particle detection and identification method based on the scattering and absorption spectra of the particles. A machine learning algorithm was developed to capture the feature of the particles and is able to identify the particle material from the scattering spectrum. Three different particles (Al2O3, SiC, and Si) were used to test this system. The validation accuracy achieves higher than 98% after 5 iterations training. The system was tested by scattering these three particles on the same wafer in different regions without mixing with each other. The results shows that particle Al2O3 and Si were identified with a high accuracy, whereas it is still challenging for the system to correctly label SiC particles. This can be improved by a larger dataset to enhance the generalization ability of the machine learning model.

Review of optical direct-write technology for semiconductor manufacturing

Optical direct-write technology has been studied since the successful development of the micromirror-based spatial light modulators in the 1990s. It is expected to have advantages over electron beam direct-write in the viewpoints of higher productivity and common resist process with existing semiconductor manufacturing. In the 2000s, there was an effort to develop an optical direct-write system using deep ultraviolet (DUV) excimer laser and grayscale tilt micromirror devices, aiming at low-volume manufacturing of semiconductor devices. Recently, a new scheme of optical direct-write, called the digital scanner, has been demonstrated. It uses solid-state DUV laser and digitally controlled spatial light modulator. Past development activity of optical direct-write is reviewed with discussion of the merits and demerits of the proposed technological options in the new system, comparing them to past efforts.

Recycling Test Methods to Improve Test Capacity and Increase Chip Shipments

In this research, we quantified semiconductor fabrication capability parameters and test capability parameters and used a digital integrated circuit test model (DITM) to discuss the impact of the test guardband (TGB) on test yield. Furthermore, the DITM can be used to estimate the yield distribution trend of future semiconductor products using data from the IEEE International Roadmap for Devices and Systems (IRDS) 2021 Table. With the COVID-19 pandemic, the global semiconductor industry is facing chip and material shortages. Furthermore, test technology lags behind semiconductor manufacturing technology, and the test yield of production capacity is deteriorating, seriously affecting the entire semiconductor supply chain. Therefore, we proposed the recycling test method, extending the test time, moving TGB, and repeatedly looking for reliable products. These parameters were calculated using the estimated product parameters released by the IRDS 2021. We proved that the proposed recycling test method could improve the high-yield target of semiconductor testing. As long as test methods are used properly, not only can high-yield shipments be made, but also companies’ overall profit will be significantly improved, and the problem of chip shortages will be solved.

Heat transfer mechanism of electrostatic chuck surface and wafer backside to improve wafer temperature uniformity

Semiconductor manufacturing technology keeps toward scaling down to a few nanometers. To protect the process yield and achieve the success of chip manufacturing, the center-to-edge uniformity of the wafer's temperature has become a crucial parameter. The thermal characteristics of the wafer are dominantly affected by the electrostatic chuck, which is generally used to support the wafer in the manufacturing process. In particular, the backside gas, which passes through the interface between the wafer and electrostatic chuck, is important for cooling the wafer below a critical temperature. The heat transfer via a backside gas can be explained by the layer-bulk model, and its pressure is a key factor to determine the cooling effectiveness. In this paper, a one-dimensional thermal circuit model is established for a system including the wafer, electrostatic chuck, and backside gas to calculate the convective heat transfer coefficient caused by the backside gas. The numerical results showed that the uniformity of the wafer's temperature became worse as the backside gas pressure increased in a low-pressure range but significantly improved above a critical value of the gas pressure. Based on our findings, we concluded that the backside gas pressure should be optimized to improve the uniformity of the wafer temperature.

A multifunction flow channel switching module for multi-column capillary gas chromatography using silicon pneumatic microvalves

Decades ago, multi-column GC was developed for separating analytes which cannot be separated with a single column by switching the flow channels and introducing them into multiple columns. Formerly, a channel switching system consisted of stainless-tube-type packed columns and multi-port switching valves which were connected by stainless-steel pipes. These systems utilizing packed columns are still widely used today, mainly for gas analysis, especially for refinery gas analysis and natural gas analysis related to oil refining. However, there have been no new development updates in terms of hardware for decades. Since multi-port switching valves are used, there are problems such as the high frequency of valve replacements due to wear of seals, high running costs as well as long downtimes. In recent years, a heart-cutting multidimensional capillary GC using pressure switching devices such as the Deans switch has been put into practical use. Compared to the switching valves, the pressure switching devices have no wearing parts and are maintenance-free. Multi-dimensional capillary GC using the pressure-switching method cannot be applied to the analysis of low-boiling-point gasses because the retention capacity of the capillary column is low and the column inlet pressure is far from the optimum value for switching. Because of this another related factors, it has not been able to completely replace the traditional methods. In this study, an ON/OFF type silicon pneumatic microvalve was designed and fabricated by semiconductor manufacturing technology, and a flow channel switching module was developed by mounting microvalves on a metallic channel plate which is made by diffusion bonding. The flow channel switching module using silicon pneumatic microvalves has a heat resistance of up to 310 °C, can withstand pressures up to 1.5 MPA or more, and a durability that can withstand over 2 million opening and closing operations. In addition, the reproducibility of the gas sample analysis showed good reproducibility values of RSD 0.1% or less for peak areas and RSD 0.01 to 0.04% for retention time. Flow path switching without the use of pressure switching simplifies method development in several ways. For instance, by incorporating the use of valves that can be opened and closed independently, it was possible to integrate several methods such as heart cut, precut, column switching, and backflushing flow path layouts.

Artificial Intelligence Applications for MEMS-Based Sensors and Manufacturing Process Optimization

Micro-electromechanical systems (MEMS) technology-based sensors have found diverse fields of application due to the advancement in semiconductor manufacturing technology, which produces sensitive, low-cost, and powerful sensors. Due to the fabrication of different electrical and mechanical components on a single chip and complex process steps, MEMS sensors are prone to deterministic and random errors. Thus, testing, calibration, and quality control have become obligatory to maintain the quality and reliability of the sensors. This is where Artificial Intelligence (AI) can provide significant benefits, such as handling complex data, performing root cause analysis, efficient feature estimation, process optimization, product improvement, time-saving, automation, fault diagnosis and detection, drift compensation, signal de-noising, etc. Despite several benefits, the embodiment of AI poses multiple challenges. This review paper provides a systematic, in-depth analysis of AI applications in the MEMS-based sensors field for both the product and the system level adaptability by analyzing more than 100 articles. This paper summarizes the state-of-the-art, current trends of AI applications in MEMS sensors and outlines the challenges of AI incorporation in an industrial setting to improve manufacturing processes. Finally, we reflect upon all the findings based on the three proposed research questions to discover the future research scope.

Runtime Testability on Autonomous System

More than ever, autonomous systems that are critical to everyday life, social infrastructure, and social security are increasingly dependent on sophisticated hardware computer systems. As the computer hardware systems become increasingly complex and semiconductor manufacturing technology becomes continuously miniaturized (especially in several nanometer technologies), there is a corresponding increased vulnerability to system malfunction caused by runtime hardware defects. Detecting defects that will be generated in postdeployment time is impossible in the predeployment verification. This is the reason why some lifetime testabilities are necessary, especially for autonomous systems requiring extremely high-reliable functionalities. This article proposes a hardware architecture that extends the pre-deployment mass production verification (such as the scan-test) to the lifetime of the hardware systems, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">to guarantee the mass production verification level integrity for the hardware systems in their lifetime</i> . In addition, this article explains how to recover hardware functionalities compromised by runtime defects.

Facile integration of an Al-rich Al1–x In x N photodetector on free-standing GaN by radio-frequency magnetron sputtering

Al1−x In x N, a III-nitride semiconductor material, is currently of great research interest due to its remarkable physical properties and chemical stability. When the Al and In compositions are tuned, its band-gap energy varies from 0.7 eV to 6.2 eV, which shows great potential for application in photodetectors. Here, we report the fabrication and performance evaluation of integrated Al1−x In x N on a free-standing GaN substrate through direct radio-frequency magnetron sputtering. The optical properties of Al1−x In x N will be enhanced by the polarization effect of a heterostructure composed of Al1−x In x N and other III-nitride materials. An Al1−x In x N/GaN visible-light photodetector was prepared by semiconductor fabrication technologies such as lithography and metal deposition. The highest photoresponsivity achieved was 1.52 A⋅W−1 under 365 nm wavelength illumination and the photodetector was determined to have the composition Al0.75In0.25N/GaN. A rise time of 0.55 s was observed after transient analysis of the device. The prepared Al1−x In x N visible-light photodetector had a low dark current, high photoresponsivity and fast response speed. By promoting a low-cost, simple fabrication method, this study expands the application of ternary alloy Al1−x In x N visible-light photodetectors in optical communication.

Prediction of the Test Yield of Future Integrated Circuits Through the Deductive Estimation Method

In the past 20 years, semiconductor manufacturing technology has advanced rapidly, but the advancement of integrated circuit (IC) testers has been slow. Using obsolete testers to inspect advanced wafers has become a significant challenge for test manufacturers. In this research, we used DITM (digital IC testing model) to discuss the impact of the test guardband (TGB) on quality and yield. Considering the interaction between semiconductor fabrication capability parameters and test capability parameters, we proposed an estimation method [deductive estimation method (DEM)] to analyze the electrical distribution changes of products after chip production and deduce the yield of future products. The deductive estimation method can correctly depict the future test yield [Formula: see text] curve using the chip frequency data published by IRDS (International Roadmap for Devices and Systems) in 2017. Furthermore, test manufacturers can measure whether the current test capabilities can cope with future semiconductor chip manufacturing capabilities by predicting the trends. Next, test manufacturers can maintain high-quality and high-yield chip output by pre-adjusting the hardware testing capabilities of ATE (automated test equipment) or proposing more effective chip testing methods.

Paradigm Changing Integration Technology for the Production of Flexible Electronics by Transferring Structures, Dies and Electrical Components from Rigid to Flexible Substrates

Emerging trends like the Internet of Things require an increasing number of different sensors, actuators and electronic devices. To enable new applications, such as wearables and electronic skins, flexible sensor technologies are required. However, established technologies for the fabrication of sensors and actuators, as well as the related packaging, are based on rigid substrates, i.e., silicon wafer substrates and printed circuit boards (PCB). Moreover, most of the flexible substrates investigated until now are not compatible with the aforementioned fabrication technologies on wafers due to their lack of chemical inertness and handling issues. In this presented paper, we demonstrate a conceptually new approach to transfer structures, dies, and electronic components to a flexible substrate by lift-off. The structures to be transferred, including the related electrical contacts and packaging, are fabricated on a rigid carrier substrate, coated with the flexible substrate and finally lifted off from the carrier. The benefits of this approach are the combined advantages of using established semiconductor and microsystem fabrication technologies as well as packaging technologies, such as high precision and miniaturization, as well as a variety of available materials and processes together with those of flexible substrates, such as a geometry adaptivity, lightweight structures and low costs.

Interview With Janet Olson

Nicola Nicolici: Good evening, Janet. Welcome. This is an IEEE Design&Test interview and to start with, I just kind of want to make a very, very short introduction. Janet Olson has been a technology executive with extensive leadership experience in two Fortune 500 semiconductor design automation companies: Cadence Design Systems and Synopsis. Janet delivers high-caliber software enabling the design of complex integrated circuits fabricated using leading semiconductor manufacturing technologies. She works closely with multiple semiconductor companies, including automotive, industrial robotics, and semiconductor equipment manufacturers. Janet has been recognized with the 2017 Marie Pistilli Electronic Design Award awarded annually to a female with outstanding achievements in the EDA industry and the 2016 WCA Tribute to Women Award. Welcome, Janet. So, to get us started, probably you can tell us a bit more about your educational interests while growing up. And how did you become drawn to study electrical and computer engineering?