Selective Harmonic Elimination Modulation Technique Research Articles

Harmonic reduction using Particle Swarm Optimization based SHE Modulation Technique in Asymmetrical DC-AC Converter

Many inverters play an important role in transmitting and processing energy to power system networks. To reduce the cost and size of multilevel inverters, various topologies have been included in the literature. But these topologies do not look at the complete harmonic distortion in the output waveform. In this study, a modern multilevel inverter structure, a mutated H-bridge inverter is adopted that demands a small amount of switches, driver circuits, power diodes and DC voltage sources compared to conventional multilevel inverters to produce the required level in the output voltage. The mutated H-bridge converter uses a nearest-level control method, produces high value of total harmonic at the output voltage and low-level harmonics content is also high, which is more dangerous than high-order harmonics. Therefore, the selective harmonic elimination (SHE) method is used to reduce the low frequency harmonics and the total harmonic distortion to the output voltage. Comparison of complete harmonic deviation and low-level harmonic content using the above-mentioned control strategies on the 31-level inverter is presented. Simulation studies confirm the performance of a 31-level inverter with low-order harmonics and a complete harmonic distortion using the SHE process. The effectiveness and accuracy of the SHE in producing 31 level waveform is demonstrated by utilizing the test outcomes and the THD found is of the order of 2.8%, 1.7%, 1.7% and 1% for the modulation index values of 0.5590, 0.7440, and 0.8380 and 0.9110 respectively.

Selective Harmonic Elimination Technique for a 27-Level Asymmetric Multilevel Converter

In this paper, we present an implementation of selective harmonic elimination modulation technique in a 27-Level asymmetric multilevel converter. The main issue in this kind of converters is the generation of the gating patterns to obtain an optimized AC voltage waveform. State-of-the art solutions use deep mathematical analysis in the frequency domain by means of the Fourier series, but they are mainly applied for two-level or symmetric multilevel converters. On the other hand, the modulation for asymmetric multilevel converters is mainly focused on nearest level control or nearest vector control. In this work, we propose a novel modulating technique that takes advantage of the switching angles optimization for a 27-level waveform. In fact, different set of solutions are obtained and presented in order to define the modulation index as well as the value of the switching angles for the multilevel waveform. A modulation index sweep was performed for the entire operating region of the converter, where it can be observed that the number of levels decreases when the modulation index is low, which are calculated in order to minimize the total harmonic distortion (THD) of the resulting voltage waveform. In order to validate the proposal, these results for different modulation indexes values are simulated, obtaining a THD < 5% for a modulation index 0.75<M<1.0. Finally, a small scale proof-of-concept prototype is implemented in order to validate the proposal.

Application of a Non-carrier-Based Modulation for Current Harmonics Spectrum Control during Regenerative Braking of the Electric Vehicle

The regenerative braking of railway vehicles is widely used in DC railway systems all over the world. This mode of operation provides an opportunity to reuse part of the energy consumed by vehicles, and makes the railway system more energy efficient. During regenerative braking, not only energy management is an issue, but also Electromagnetic Compatibility EMC issues, such as interference of generated current harmonics with a railway signaling system. In this paper, the selective harmonic elimination modulation technique (SHE-PWM) was introduced to the traction drive with a three-level inverter to reduce specific catenary current harmonics generated during regenerative braking. The simulation model of a traction drive appropriate for harmonics analysis was proposed and verified by the measurements in the low-power laboratory drive system. The model was re-scaled to the 3 kV DC system for further study. The model of an induction motor with electromotive force and the method of its calculation was proposed. Furthermore, an analysis of the braking chopper operation was carried out. The asymmetric control of braking chopper was proposed to reduce the current harmonics below limits during chopper operation.

A Review of Multilevel Inverter Topology and Control Techniques

This paper focused on reviewing the main types of topologies and control strategies employed for the operation of multilevel inverter. Advantages and disadvantages of the topologies and the control techniques in relation to one another are equally reviewed. Recent proposed methods employed to improve the harmonic performance, reduce electromagnetic interference (EMI), lower stress on the power switches, eliminate DC link voltage imbalance and simplify the pulse width modulation control algorithms are fully reviewed. Selective harmonic elimination modulation technique is used in generating the 11-level of output voltage. It is aimed at reducing the total harmonic distortion as low as possible.

Hybrid SHM–SHE Modulation Technique for a Four-Leg NPC Inverter With DC Capacitor Self-Voltage Balancing

In this paper, selective harmonic mitigation (SHM) and selective harmonic elimination (SHE) modulation techniques have been combined to produce appropriate pulses for a four-leg three-level neutral point clamped (NPC) inverter. In the proposed hybrid method, the SHM technique is applied to phase legs in order to mitigate non-triplen harmonics (fifth, seventh, . . .), and the fourth leg is controlled by the SHE principle to eliminate important low-order triplen harmonics (third, ninth, . . .) completely. In this context, it is demonstrated that using SHM instead of an SHE modulator for phase legs leads to a reduced vast range of harmonic orders in the NPC output voltage, significantly. Moreover, it is proved that the presented hybrid switching technique has the ability of dc-bus capacitor voltage balancing, inherently. Furthermore, analyses are performed to calculate the dc-bus capacitances accurately to show 5% voltage ripple acceptably. Simulation and experimental results validate a good dynamic performance of the proposed hybrid modulation technique in firing the NPC inverter switches to generate low-harmonic voltage waveforms supplying balanced and unbalanced loads while balancing the dc capacitor voltages in a four-wire network with small dc-link capacitors.

Distribution system compensation using a new binary multilevel voltage source inverter

A new binary multilevel voltage source inverter with separate DC sources is proposed. This n-level voltage source inverter produces a (2/sup n+1/-1)-steps AC voltage output with n full bridge inverters connected in series. The use of selective harmonic elimination modulation technique to either completely eliminate or minimize harmonics is studied. A closed-loop controller to control the capacitor voltages and adjust the inverter reactive power output is developed. Application of such a compensator for dynamic compensation of 13.8 kV distribution system is examined through transient studies using a PSCAD/EMTDC program. The proposed inverter configuration not only reduces the system complexity and its size, but also improves the harmonic profile significantly.

Experimental investigation of an advanced static VAr compensator

An advanced static VAr compensator (ASVC) employing a three-level inverter is presented. The paper describes the operating principles and construction of a hardware model of this ASVC scheme. The performance of the ASVC is obtained from an experimental study carried out on the laboratory model. The use of the selective harmonic elimination modulation technique (SHEM) to minimise harmonics is explored. Experimental studies have been carried out to determine the effect of the DC-side capacitor on the harmonic performance of the scheme and the open-loop response speed is also evaluated. Finally, the economic feasibility of this scheme is briefly assessed by comparing the ASVC with a conventional thyristor-controlled reactor/fixed-capacitor scheme.