Scheduling Algorithms For Switches Research Articles

Pandemic accelerates supply chain shift

Input queued switch is the most preferred switching fabric at various high speed switching systems such as data-center switches and Internet routers. In this paper, we reviewed various ground-breaking scheduling algorithms for input queued switches from the last two decades. It includes several classes of algorithms such as Maximum Weight Matching, Maximum Size Matching, Maximal Matching, Iterative, Randomized, Frame-based and Flow-based arbitration schemes. The throughput-delay performance of all the algorithms is discussed with various traffic patterns. The computational complexity of the algorithms is compared to understand the suitability of these algorithms in high-speed switching systems.

WITHDRAWN: Crossbar switch scheduling algorithms for high performance computing: A comprehensive review

Abstract Input queued switch is the most preferred switching fabric at various high speed switching systems such as data-center switches and Internet routers. In this paper, we reviewed various ground-breaking scheduling algorithms for input queued switches from the last two decades. It includes several classes of algorithms such as Maximum Weight Matching, Maximum Size Matching, Maximal Matching, Iterative, Randomized, Frame-based and Flow-based arbitration schemes. The throughput-delay performance of all the algorithms is discussed with various traffic patterns. The computational complexity of the algorithms is compared to understand the suitability of these algorithms in high-speed switching systems.

Datacenter congestion control

Recent years have seen a slew of papers on datacenter congestion control mechanisms. In this editorial, we ask whether the bulk of this research is needed for the common case where congestion control involves hosts responding to simple congestion signals from the network and the performance goal is reducing some average measure of flow completion time. We raise this question because we find that, out of all the possible variations one could make in congestion control algorithms, the most essential feature is the switch scheduling algorithm. More specifically, we find that congestion control mechanisms that use Shortest-Remaining-Processing-Time (SRPT) achieve superior performance as long as the rate-setting algorithm at the host is reasonable. We further find that while SRPT's performance is quite robust to host behaviors, the performance of schemes that use scheduling algorithms like FIFO or Fair Queuing depend far more crucially on the rate-setting algorithm, and their performance is typically worse than what can be achieved with SRPT. Given these findings, we then ask whether it is practical to realize SRPT in switches without requiring custom hardware. We observe that approximate and deployable SRPT (ADS) designs exist, which leverage the small number of priority queues supported in almost all commodity switches, and require only software changes in the host and the switches. Our evaluations with one very simple ADS design shows that it can achieve performance close to true SRPT and is significantly better than FIFO. Thus, the answer to our basic question - whether the bulk of recent research on datacenter congestion control algorithms is needed for the common case - is no.

Highest Rank First: A New Class of Single-Iteration Scheduling Algorithms for Input-Queued Switches

In this paper, we study a new class of single-iteration scheduling algorithms for input-queued switches based on a new arbitration idea called highest rank first (HRF). We first demonstrate the effectiveness of HRF by a simple algorithm named Basic-HRF. In Basic-HRF, virtual output queues (VOQs) at an input port are ranked according to their queue sizes. The rank of a VOQ, coded by $\log (N+1)$ bits, where $N$ is the switch size, is sent to the corresponding output as a request. Unlike all existing iterative algorithms, the winner is selected based on the ranks of the requests/grants. We show that the rank-based arbitration outperforms the widely adopted queue-based arbitration. To improve the performance under heavy load and maximize the match size, Basic-HRF is integrated with an embedded round-robin scheduler. The resulting HRF algorithm is shown to beat almost all existing single-iteration algorithms. But, the complexity of HRF is high due to the use of multi-bit requests. A novel request encoding/decoding mechanism is then designed to reduce the request size to a single bit while keeping the original performance of HRF. A unique feature of the resulting coded HRF (CHRF) algorithm is that the single-bit request indicates an increase or decrease of a VOQ rank, rather than an empty VOQ or not. We show that the CHRF is the most efficient single-bit-single-iteration algorithm.

On Iterative Scheduling for Input-Queued Switches With a Speedup of $2-1/N$

An efficient iterative scheduling algorithm for input-queued switches, called round robin with longest queue first (RR/LQF), is proposed in this paper. RR/LQF consists of three phases: report, grant, and accept. In each phase, only a single-bit message per port is sent for reporting a packet arrival, granting an input for packet sending, or accepting a grant. In both the grant and accept phases, scheduling priority is given to the preferred input–output pairs first and the longest virtual output queuing (VOQ) next. The notion of the preferred input–output pair is to keep a global RR schedule among all the inputs and the outputs. By serving the preferred input–output pairs first, the match size tends to be maximized. By serving the longest VOQ next, the match weight is also boosted. When RR/LQF is executed for a single iteration (i.e., RR/LQF-1), we show by simulations that RR/LQF-1 outperforms all the existing single-bit-single-iteration scheduling algorithms. When RR/LQF is executed up to $N$ iterations (i.e., RR/LQF- $N$ ), we prove that under any admissible traffic pattern, RR/LQF- $N$ is stable with a speedup of $2-1/N$ , where $N$ is the switch size. To the best of our knowledge, this is the first work showing that an iterative scheduling algorithm is stable with a speedup less than 2. We then generalize RR/LQF to become a class of algorithms that have the same speedup bound of $2-1/N$ . Efforts are then made to further reduce the implementation complexity of RR/LQF. To this end, the pipelined RR/LQF and RR/RR, a simpler variant of RR/LQF, are proposed.

Multicast Due Date Round-Robin Scheduling Algorithm for Input-Queued Switches

Multicast Due Date Round-Robin Scheduling Algorithm for Input-Queued Switches

Performance analysis of buffered crossbar switch scheduling algorithms

The increasing demand for higher data rates on the internet requires routers that deliver high performance for high-speed connections. Nowadays high speed routers use the buffered crossbar switches, which have been the interest for research and commercialisation. In this paper, a study is made on the importance of buffered crossbar switches and their scheduling algorithms. Performance analysis is made for various buffered crossbar switch scheduling algorithms using non-uniform traffic patterns.

GENIUS – A genetic scheduling algorithm for high-performance switches

The most important switching systems in the Internet are the routers. Current routers employ input-queued crossbar switches that require sophisticated scheduling techniques for packet transmission. The performance of the router then directly depends on the scheduling algorithm, considering its throughput and complexity. In this paper, a new genetic-based scheduling algorithm, called GENIUS, is developed and tested for high-performance Internet switches operation. The GENIUS approach presents low complexity and the results show a performance close to the optimal.

Towards zero latency photonic switching in shared memory networks

SUMMARYOptical networks on chip based on silicon photonics have been proposed to reduce latency and power consumption in future chip multiprocessors. However, high performance chip multiprocessors use a shared memory model, which generates large numbers of short messages, creating high arbitration latency overhead for photonic switching networks. In this paper, we explore techniques that intelligently use information from the memory hierarchy to predict communication in order to setup photonic circuits with reduced or eliminated arbitration latency. Firstly, we present a switch scheduling algorithm, which arbitrates on a per memory transaction basis and holds open photonic circuits to exploit temporal locality. We show that this can reduce the average arbitration latency overhead by 60% and eliminate arbitration latency altogether for up to 70% of memory transactions. We then demonstrate that this switch scheduling algorithm operating with a central photonic crossbar or Clos switch has significant energy efficiency benefits over arbitration‐free photonic networks such as single writer multiple reader networks. Finally, we demonstrate that cache miss prediction can be used to predict 86% of more complex memory transactions involving multiple nodes or main memory. Copyright © 2014 John Wiley & Sons, Ltd.

Hybrid optimization packet scheduling algorithm for CICQ switches

Hybrid optimization packet scheduling algorithm for CICQ switches

Multicast Support in Input Queued Switches with Low Matching Overhead

This letter addresses the scalability problems induced by high complexity of multicast scheduling algorithms in high-speed switches. Based on a two-phase (request-grant) scheduling scheme in a Nx N switch, a more scalable approach instead of traditional iterative schedulings is presented, which reduces the matching overhead from O(kN) to O(N) by selecting one head-of-line cell for requesting when k multicast queues are allocated at each input port. Simulation results show that the proposed algorithm exhibits a good switching performance in terms of throughput and average delay under various traffic patterns.

An efficient single-iteration single-bit request scheduling algorithm for input-queued switches

Aiming at minimizing communication overhead of iterative scheduling algorithms for input-queued packet switches, an efficient single-iteration single-bit request scheduling algorithm called Highest Rank First with Request Compression 1 (HRF/RC1) is proposed. In HRF/RC1, scheduling priority is given to the preferred input–output pair first, where each input has a distinct preferred output in each time slot. If an input does not have backlogged packets for its preferred output, each of its non-empty VOQs sends a single-bit request to the corresponding output. This single bit distinguishes one longest VOQ from other non-empty VOQs among an input port. If an output receives a request from its preferred input, it grants this input. Otherwise, it gives the higher priority to the longest VOQ than other non-empty VOQs. Similarly, an input accepts the grant following the same propriety sequence. In case of a tie, the winner is selected randomly. Compared with other single-iteration algorithms with comparable communication overhead, we show by simulations that HRF/RC1 always gives the best delay-throughput performance.

Enhanced first-in-first-out-based round-robin multicast scheduling algorithm for input-queued switches

This study focuses on the multicast scheduling for M×N input-queued switches. An enhanced first-in-first-out -based round-robin multicast scheduling algorithm is proposed with a function of searching deeper into queues to reduce the head-of-line (HOL) blocking problem and thereby the multicast latency. Fan-out information of each input cell composes a traffic matrix and the scheduler executes a round-robin algorithm on each column independently. Scheduling decisions result in a decision matrix for the scheduler to release multicast cells accordingly. A matrix operation called sync is carried out on the decision matrix to reduce the number of transmission for each cell. To reduce the HOL blocking problem, a complement matrix is constructed based on the traffic matrix and the decision matrix, and a process of searching deeper into the queues is carried out to find cells that can be sent to the idle outputs. Simulation results show that the proposed function of searching deeper into the queues can alleviate the HOL blocking and as a result reduce the multicast latency significantly. Under both balanced and unbalanced multicast traffic, the proposed algorithm is able to maintain a stable throughput.

Modeling the interactions of congestion control and switch scheduling

In this paper, we study the interactions of user-based congestion control algorithms and router-based switch scheduling algorithms. We show that switch scheduling algorithms that were designed without taking into account these interactions can exhibit a completely different behavior when interacting with feedback-based Internet traffic. Previous papers neglected or mitigated these interactions, and typically found that flow rates reach a fair equilibrium. On the contrary, we show that these interactions can lead to extreme unfairness with temporary flow starvation, as well as to large rate oscillations. For instance, we prove that this is the case for the MWM switch scheduling algorithm, even with a single router output and basic TCP flows. We also show that the iSLIP switch scheduling algorithm achieves fairness among ports, instead of fairness among flows. Finally, we fully characterize the network dynamics for both these switch scheduling algorithms.

A Least-Laxity-First Scheduling Algorithm of Variable Time Slice for Periodic Tasks

The LLF (Least Laxity First) scheduling algorithm assigns a priority to a task according to its executing urgency. The smaller the laxity value of a task is, the sooner it needs to be executed. When two or more tasks have same or approximate laxity values, LLF scheduling algorithm leads to frequent switches among tasks, causes extra overhead in a system, and therefore, restricts its application. The least switch and laxity first scheduling algorithm is proposed in this paper by searching out an appropriate common divisor in order to improve the LLF algorithm for periodic tasks.

Accounting Information Systems Genetic Algorithms for All-Optical Shared Fiber-Delay-Line Packet Switches

All-optical shared fiber-delay-line (FDL) packet switches have been studied intensively in the literature and with theliterature, many scheduling genetic algorithms have been proposed. However, these genetic algorithms suffer from notbeing able to provide a delay bound, or require complex timing methods to compute scheduling assignments. In thispaper, we propose two fast scheduling algorithms for all-optical shared-FDL packet switches. In the first algorithm,packet scheduling is formulated as a tree-searching problem. This is accomplished by breaking down the search tree intomultiple smaller subsets and assigning each subset to a parallel processor. By using this method, scheduling solutions canbe obtained in a shorter time. Although this approach is superior to other algorithms, its overall complexity and processingoverheads are still too high to warrant its day to day use. In the second algorithm, the search tree is carefully trimmeddown in order to reduce complexity and overheads. The conclusion will consider a 32 × 32 switch with 32 FDLs, andassume a processor clock rate of 200MHz for schedulers. With this new and second algorithm, a scheduling assignmentcan be calculated for a given packet in 30ns if 8 parallel processors are employed and we show by simulation that bothalgorithms can achieve a loss rate of ? 10?7 even at load 0.9, where the average delay is 11.5 timeslots.

Frame-Based Packet-Mode Scheduling for Input-Queued Switches

Most packet scheduling algorithms for input-queued switches operate on fixed-sized packets known as cells. In reality, communication traffic in many systems such as Internet runs on variable-sized packets. Motivated by potential savings of segmentation and reassembly, there has been increasing interest in scheduling variable-sized packets in a nonpreemptive manner known as packet-mode scheduling. This paper studies frame-based packet-mode scheduling for better scalability. It first shows that the admissible condition is no longer sufficient for packet-mode scheduling. Then, a relation between the frame size and packet sizes is derived that classifies under what conditions the packet-mode scheduling problem is polynomial solvable or is NP-hard. This relation reveals an interesting result that under various packet size distributions, it may be polynomial solvable even if many different packet sizes occur in the packet set, whereas it may be NP-hard with just two packet sizes present. Finally, as a practical solution, this paper studies how a speedup can help packet-mode scheduling. It is shown that the admissible condition becomes sufficient also when a speedup of two is used. A simple algorithm with a speedup of two is presented.

Node weighted scheduling

This paper proposes a new class of online policies for scheduling in input-buffered crossbar switches. Given an initial configuration of packets at the input buffers, these policies drain all packets in the system in the minimal amount of time provided that there are no further arrivals. These policies are also throughput optimal for a large class of arrival processes which satisfy strong-law of large numbers. We show that it is possible for policies in our class to be throughput optimal even if they are not constrained to be maximal in every time slot. Most algorithms for switch scheduling take an edge based approach; in contrast, we focus on scheduling (a large enough set of) the most congested ports. This alternate approach allows for lower-complexity algorithms, and also requires a non-standard technique to prove throughput-optimality. One algorithm in our class, Maximum Vertex-weighted Matching (MVM) has worst-case complexity similar to Max-size Matching, and in simulations shows slightly better delay performance than Max-(edge)weighted-Matching (MWM).

Projective Cone Scheduling (PCS) Algorithms for Packet Switches of Maximal Throughput

We study the (generalized) packet switch scheduling problem, where service configurations are dynamically chosen in response to queue backlogs, so as to maximize the throughput without any knowledge of the long term traffic load. Service configurations and traffic traces are arbitrary.

Maintaining Packet Order in Reservation-Based Shared-Memory Optical Packet Switch

Shared-Memory Optical Packet (SMOP) switch architecture is very promising for significantly reducing the amount of required optical memory, which is typically constructed from fiber delay lines (FDLs). The current reservation-based scheduling algorithms for SMOP switches can effectively utilize the FDLs and achieve a low packet loss rate by simply reserving the departure time for each arrival packet. It is notable, however, that such a simple scheduling scheme may introduce a significant packet out of order problem. In this paper, we first identify the two main sources of packet out of order problem in the current reservation-based SMOP switches. We then show that by introducing a “last-timestamp” variable and modifying the corresponding FDLs arrangement as well as the scheduling process in the current reservation-based SMOP switches, it is possible to keep packets in-sequence while still maintaining a similar delay and packet loss performance as the previous design. Finally, we further extend our work to support the variable-length burst switching.