Run-time Generation Research Articles

The reflective higher-order calculus: Encodability, typability and separation

The ρ-calculus (Reflective Higher-Order Calculus) of Meredith and Radestock is a π-calculus-like language with unusual features, notably, structured names, runtime generation of free names, and the lack of a scoping operator. These features pose interesting difficulties for proofs of encodability, type system soundness and separation results. We describe two errors in a previous attempt to encode the π-calculus in the ρ-calculus by Meredith and Radestock. Then we give a new encoding and prove its correctness, using a set of encodability criteria close to those of Gorla, and discuss the adaptations necessary to work with a calculus with runtime generation of structured names. We create a simple type system for the ρ-calculus to show that the encoding is well-typed, and discuss the limitations that must be imposed when working with structured names. Lastly we prove a separation result, showing that the ρ-calculus cannot be encoded in the π-calculus.

Encodability and Separation for a Reflective Higher-Order Calculus

The $\rho$-calculus (Reflective Higher-Order Calculus) of Meredith and Radestock is a $\pi$-calculus-like language with some unusual features, notably, structured names, runtime generation of free names, and the lack of an operator for scoping visibility of names. These features pose some interesting difficulties for proofs of encodability and separation results. We describe two errors in a previously published attempt to encode the $\pi$-calculus in the $\rho$-calculus by Meredith and Radestock. Then we give a new encoding and prove its correctness, using a set of encodability criteria close to those proposed by Gorla, and discuss the adaptations necessary to work with a calculus with runtime generation of structured names. Lastly we prove a separation result, showing that the $\rho$-calculus cannot be encoded in the $\pi$-calculus.

Heuristics-based mediation for building smart architectures at run-time

Smart architectures are increasingly being used in current software development. Smart user interfaces, smart homes, or smart buildings are becoming common examples in the new era of smart cities. Software architectures usually related to these domains need to be adapted and reconfigured at run-time, for example, to provide new services, react to user interaction, or due to changes decided from the business logic of the application. Component-based techniques are a suitable way to carry out this kind of adaptation, as dynamic reconfiguration operations can be applied to the architecture. In this paper, we address run-time generation of component-based applications, taking the abstract definitions of their architecture as a reference, in addition to a set of available components. The process calculates the best configuration of components from the abstract definition by applying a trading approach based on an adapted A* algorithm. This algorithm uses heuristics based on syntactic and semantic information obtained from the component definitions. A case study related to mashup user interfaces formed by coarse-grained components is also explained. In short, the results show the usefulness of heuristics and suitable execution times for building the best configurations.

Layout optimization of simplified trusses using mixed integer linear programming with runtime generation of constraints

Traditional truss layout optimization employing the ground structure method will often generate layouts that are too complex to fabricate in practice. To address this, mixed integer linear programming can be used to enforce buildability constraints, leading to simplified truss forms. Limits on the number of joints in the structure and/or the minimum angle between connected members can be imposed, with the joints arising from crossover of pairs of members accounted for. However, in layout optimization, the number of constraints arising from ‘crossover joints’ increases rapidly with problem size, along with computational expense. To address this, crossover constraints are here dynamically generated and added at runtime only as required (so-called lazy constraints); speedups of more than 20 times are observed whilst ensuring that there is no loss of solution quality. Also, results from the layout optimization step are shown to provide a suitable starting point for a non-linear geometry optimization step, enabling results to be obtained that are in agreement with literature solutions. It is also shown that symmetric problems may not have symmetric optimal solutions, and that multiple distinct and equally optimal solutions may be found.

Automatic graspability map generation based on shape-primitives for unknown and familiar objects

Determining goal configurations that lead to successful grasps is a critical, time-consuming stage in reach-to-grasp planning, especially in unstructured, cluttered environments. While traditional, analytic algorithms are computation intensive and susceptible to uncertainty, modern, data-driven algorithms do not offer success guarantees and require large datasets for learning models of reach-to-grasp motion. Graspability maps are data structures which store wrist configurations that lead to successful grasps of an object. They are suitable for both direct use in reach-to-grasp motion planning, and as grasp databases for gripper design analysis and for learning grasp models. The computation of graspability maps can be based on analytical models. This facilitates the integration of analytical grasp quality guarantees with data-driven grasp planning. Yet, current graspability map computation methods are prohibitively time-consuming for many application scenarios. In the current work, we suggest a method for adaptation of graspability maps of known objects (shape primitives) to familiar and to unknown objects. The method facilitates run-time generation of graspability maps and significantly enhances their usability. Adapted maps are generated based on detecting shape primitives in the object to be grasped, scaling the a-priori generated maps to the required dimensions, and combining the scaled maps to form a compound graspability map. Simulation results confirm that map adaption does not critically reduce quality while significantly reducing computation time. A case study evaluation with objects from a public point-cloud image database corroborates the method’s ability to quickly and accurately generate high-quality graspability maps for familiar and unknown objects.

PAL: A pseudo assembly language for optimizing secure function evaluation in mobile devices

Secure function evaluation (SFE) on mobile devices, such as smartphones, allows for the creation of compelling new privacy-preserving applications. Generating garbled circuits on smartphones to allow for executing customized functions, however, is infeasible for all but the most trivial problems due to the high memory overhead incurred. We develop a new methodology of generating garbled circuits that is memory-efficient. Using the standard language (SFDL) for describing secure functions as input, we design a new pseudo-assembly language (PAL) and a template-driven compiler, generating circuits that can be evaluated with the canonical Fairplay framework. We deploy this compiler for Android devices and demonstrate that a large new set of circuits can now be generated on smartphones, with memory overhead to generate circuits solving the set intersection problem reduced by 95.6% for the 2-set case. We show our compiler’s ability to interface with other execution systems and perform mobile phone specific optimizations on that execution system. We develop a password vault application to show how runtime generation of circuits can be used in practice. We also show that our circuit generation techniques can be used in conjunction with other SFE optimizations. These results demonstrate the feasibility of generating garbled circuits on mobile devices while maintaining the convenience of high-level function specification.

Transparently Mixing Undo Logs and Software Reversibility for State Recovery in Optimistic PDES

The Time Warp synchronization protocol for Parallel Discrete Event Simulation (PDES) is universally considered a viable solution to exploit the intrinsic simulation model parallelism and to provide model execution speedup. Yet it leads the PDES system to execute events in an order that may generate causal inconsistencies that need to be recovered via rollback , which requires restoration of a previous (consistent) simulation state whenever a causality violation is detected. The rollback operation is so critical for the performance of a Time Warp system that it has been extensively studied in the literature for decades to find approaches suitable to optimize it. The proposed solutions can be roughly classified as based on either checkpointing or reverse computing . In this article, we explore the practical design and implementation of a fully new approach based on the runtime generation of so-called undo code blocks , which are blocks of instructions implementing the reverse memory side effects generated by the forward execution of the events. However, this is not done by recomputing the original values to be restored, as instead it occurs in reverse computing schemes. Hence, the philosophy undo code blocks rely on is similar in spirit to that of undo-logs (as a form of checkpointing). Nevertheless, they are not data logs (as instead checkpoints are); rather, they are logs of instructions. Our proposal is fully transparent, thanks to the reliance on static software instrumentation (targeting the x86 architecture and Linux systems). Also, as we show, it can be combined with classical checkpointing to further improve the runtime behavior of the state recoverability support as a function of the workload. We also present experimental results related to our implementation, which is released as free software and fully integrated into the open source ROOT-Sim package. Experimental data support the viability and effectiveness of our proposal.

산업용 로봇 제어를 위한 Preempt-RT 기반 멀티코어 모션 제어기의 구현 및 성능 평가

Recently, with the ever-increasing complexity of industrial robot systems, it has been greatly attention to adopt a multi-core based motion controller with high cost-performance ratio. In this paper, we propose a software architecture that aims to utilize the computing power of multi-core processors. The key concept of our architecture is to use shared memory for the interplay between threads running on separate processor cores. And then, we have integrated our proposed architecture with an industrial standard compliant IDE for automatic code generation of motion runtime. For the performance evaluation, we constructed a test-bed consisting of a motion controller with Preempt-RT Linux based dual-core industrial PC and a 3-axis industrial robot platform. The experimental results show that the actuation time difference between axes is 10 ns in average and bounded up to 689 ns under <TEX>$1000{\mu}s$</TEX> control period, which can come up with real-time performance for industrial robot.

Large-scale biological meta-database management

Up-to-date meta-databases are vital for the analysis of biological data. However, the current exponential increase in biological data leads to exponentially increasing meta-database sizes. Large-scale meta-database management is therefore an important challenge for production platforms providing services for biological data analysis. In particular, there is often a need either to run an analysis with a particular version of a meta-database, or to rerun an analysis with an updated meta-database. We present our GeStore approach for biological meta-database management. It provides efficient storage and runtime generation of specific meta-database versions, and efficient incremental updates for biological data analysis tools. The approach is transparent to the tools, and we provide a framework that makes it easy to integrate GeStore with biological data analysis frameworks. We present the GeStore system, an evaluation of the performance characteristics of the system, and an evaluation of the benefits for a biological data analysis workflow.

Optimizing physical parameters in 1-D particle-in-cell simulations with Python

A particle-in-cell (PIC) simulation tool, OOPD1, is wrapped in the Python programming language, enabling automated algorithmic optimization of physical and numerical parameters. The Python-based environment exposes internal variables, enabling modification of simulation parameters, as well as run-time generation of new diagnostics based on calculations with internal data. For problems requiring an iterative optimization approach, this enables a programmable interactive feedback loop style simulation model, where the input to one simulation is a programmable function of the output of the previous one. This approach is applied to field-emission of electrons in a diode, in order to explore space charge effects in bipolar flow. We find an analytical solution for maximizing the space-charge limited current through a diode with an upstream ion current, and confirm the result with simulations, demonstrating the efficacy of the feedback scheme. We also demonstrate and analyze a modeling approach for scaling the ion mass, which can shorten simulation time without changing the ultimate result. The methods presented can be generalized to handle other applications where it is desirable to evolve simulation parameters based on algorithmic results from the simulation, including models in which physical or numerical parameter tuning is used to converge or optimize a system in one or more variables.

First-class runtime generation of high-performance types using exotypes

We introduce exotypes , user-defined types that combine the flexibility of meta-object protocols in dynamically-typed languages with the performance control of low-level languages. Like objects in dynamic languages, exotypes are defined programmatically at run-time, allowing behavior based on external data such as a database schema. To achieve high performance, we use staged programming to define the behavior of an exotype during a runtime compilation step and implement exotypes in Terra, a low-level staged programming language. We show how exotype constructors compose, and use exotypes to implement high-performance libraries for serialization, dynamic assembly, automatic differentiation, and probabilistic programming. Each exotype achieves expressiveness similar to libraries written in dynamically-typed languages but implements optimizations that exceed the performance of existing libraries written in low-level statically-typed languages. Though each implementation is significantly shorter, our serialization library is 11 times faster than Kryo, and our dynamic assembler is 3--20 times faster than Google's Chrome assembler.

Parser description-based bitstream parser generation for MPEG RMC framework

In this paper, we present a bitstream syntax description scheme that enables the automatic generation of a bitstream parser in the reconfigurable media coding (RMC) framework. In the RMC framework, a standard video decoder can be defined with a set of functional units (FUs) pre-defined in a tool library and a decoder description containing the interconnections between the FUs and the bitstream parser description. The FUs in the tool library are codec-independent in that any FU can be reused. In contrast, the decoder description is codec-specific. In particular, the bitstream parser description is required for the generation of the bitstream parser FU in the RMC framework. There have been several works on bitstream parser description and parser FU generation; however, conventional methods have mainly focused on built-in parser generation during the design time, rather than on the automatic generation of the parser FU in the run-time from the description. As a response to this problem, we propose a bitstream parser description format and a run-time parser generation mechanism based on a generic parser FU. The proposed language aims to support run-time parser FU generation by describing three types of information: control flow, external functions, and parser interfaces. The control flow description is described based on the finite state machine concept, making the translation of the BSD in run-time easy. Throughout the paper, we show how the proposed scheme is better suited for the MPEG RMC framework than the existing description formats. We also discuss the implementation of the generic parser FU (GPFU) to show that the run-time parser generation can be done efficiently with the proposed description format. A simulation result using the generic parser FU based on the existing MPEG standards (MPEG-4 SP and SC3DMC) is provided as an existential proof.

A Dynamic Composition and Stubless Invocation Approach for Information-Providing Services

The automated specification and execution of composite services are important capabilities of service-oriented systems. In practice, service invocation is performed by client components (stubs) that are generated from service descriptions at design time. Several researchers have proposed mechanisms for late binding. They all require an object representation (e.g., Java classes) of the XML data types specified in service descriptions to be generated and meaningfully integrated in the client code at design time. However, the potential of dynamic composition can only be fully exploited if supported in the invocation phase by the capability of dynamically binding to services with previously unknown interfaces. In this work, we address this limitation by proposing a way of specifying and executing composite services, without resorting to previously compiled classes that represent XML data types. Semantic and structural properties encoded in service descriptions are exploited to implement a mechanism, based on the Graphplan algorithm, for the run-time specification of composite service plans. Composite services are then executed through the stubless invocation of constituent services. Stubless invocation is achieved by exploiting structural properties of service descriptions for the run-time generation of messages.

Run-time generation of partial FPGA configurations for subword operations

Instructions for concurrent processing of smaller data units than whole CPU words are useful in areas like multimedia processing and cryptography. Since the processors used in FPGA-based embedded systems lack support for such applications, this paper proposes mapping sequences of subword operations to a set of hardware components and generating the corresponding FPGA partial configurations at run-time. The technique is aimed at adaptive embedded systems that employ run-time reconfiguration to achieve high flexibility and performance. New partial configurations for circuits implementing sets of subword operations are created by merging together the relocated partial configurations of the hardware components (from a predefined library), and the configurations of the switch matrices used for the connections between the components. The paper presents and discusses results obtained for a 300MHz PowerPC CPU in a Virtex-II Pro platform FPGA. For the set of benchmarks analyzed, the complete configuration creation process takes between 1s and 24s. The run-time generated hardware versions achieve speed-ups between 11 and 73 over the software versions.

Optimized temporal monitors for SystemC

SystemC is a modeling language built as an extension of C++. Its growing popularity and the increasing complexity of designs have motivated research efforts aimed at the verification of SystemC models using assertion-based verification (ABV), where the designer asserts properties that capture the design intent in a formal language such as PSL or SVA. The model then can be verified against the properties using runtime or formal verification techniques. In this paper we focus on automated generation of runtime monitors from temporal properties. Our focus is on minimizing runtime overhead, rather than monitor size or monitor-generation time. We identify four issues in monitor generation: state minimization, alphabet representation, alphabet minimization, and monitor encoding. We conduct extensive experimentation and identify a combination of settings that offers the best performance in terms of runtime overhead.

Run-time generation of partial FPGA configurations

This paper presents and evaluates a method of generating partial bitstreams at run-time for dynamic reconfiguration of sections of an FPGA. The method is intended for use in adaptive embedded systems that employ run-time reconfiguration to achieve high flexibility and performance. The proposed approach combines partial bitstreams of coarse-grained components to produce a new partial bitstream implementing a given circuit netlist. Topological sorting of the netlist is used to determine the initial positions of individual components, whose placement is then improved by simulated annealing. Connection routing is done by a breadth-first search of the reconfigurable area based on a simplified resource model of the reconfigurable fabric. The desired partial bitstream is constructed by merging together the default bitstream of the reconfigurable area, the relocated partial bitstreams of the components, and the configurations of the switch matrices used for routing. The approach is embodied in a code library that applications can use to create new bitstreams at run-time. For the members of a set of 29 benchmarks (both synthetic and application-derived) having between five and 41 components, the complete process of bitstream generation takes between 8 s and 35 s when running on an embedded PowerPC 405 microprocessor clocked at 300 MHz.

Automatically generating personalized user interfaces with Supple

Today's computer–human interfaces are typically designed with the assumption that they are going to be used by an able-bodied person, who is using a typical set of input and output devices, who has typical perceptual and cognitive abilities, and who is sitting in a stable, warm environment. Any deviation from these assumptions may drastically hamper the person's effectiveness—not because of any inherent barrier to interaction, but because of a mismatch between the person's effective abilities and the assumptions underlying the interface design. We argue that automatic personalized interface generation is a feasible and scalable solution to this challenge. We present our Supple system, which can automatically generate interfaces adapted to a person's devices, tasks, preferences, and abilities. In this paper we formally define interface generation as an optimization problem and demonstrate that, despite a large solution space (of up to 10 17 possible interfaces), the problem is computationally feasible. In fact, for a particular class of cost functions, Supple produces exact solutions in under a second for most cases, and in a little over a minute in the worst case encountered, thus enabling run-time generation of user interfaces. We further show how several different design criteria can be expressed in the cost function, enabling different kinds of personalization. We also demonstrate how this approach enables extensive user- and system-initiated run-time adaptations to the interfaces after they have been generated. Supple is not intended to replace human user interface designers—instead, it offers alternative user interfaces for those people whose devices, tasks, preferences, and abilities are not sufficiently addressed by the hand-crafted designs. Indeed, the results of our study show that, compared to manufacturers' defaults, interfaces automatically generated by Supple significantly improve speed, accuracy and satisfaction of people with motor impairments.

Operation Stacking for Ensemble Computations With Variable Convergence

Sparse matrix operations achieve only small fractions of peak CPU speeds because of the use of specialized, index-based matrix representations, which degrade cache utilization by imposing irregular memory accesses and increasing the number of overall accesses. Compounding the problem, the small number of floating-point operations in a single sparse iteration leads to low floating-point pipeline utilization. Operation stacking addresses these problems for large ensemble computations that solve multiple systems of linear equations with identical sparsity structure. By combining the data of multiple problems and solving them as one, operation stacking improves locality, reduces cache misses, and increases floating-point pipeline utilization. Operation stacking also requires less memory bandwidth because it involves fewer index array accesses. In this paper we present the Operation Stacking Framework (OSF), an object-oriented framework that provides runtime and code generation support for the development of stacked iterative solvers. OSF’s runtime component provides an iteration engine that supports efficient ejection of converged problems from the stack. It separates the specific solver algorithm from the coding conventions and data representations that are necessary to implement stacking. Stacked solvers created with OSF can be used transparently without requiring significant changes to existing applications. Our results show that stacking can provide speedups up to 1.94× with an average of 1.46×, even in scenarios in which the number of iterations required to converge varies widely within a stack of problems. Our evaluation shows that these improvements correlate with better cache utilization, improved floating-point utilization, and reduced memory accesses.

Personalized Use Models in Ambient Intelligence Environments

The impact of user interface quality has grown in software systems engineering, and will grow further with upcoming new paradigms such as Ambient Intelligence (AmI) or Ubiquitous Computing, which confront the production industry with a huge diversity of new usage situations. User in such situations cannot cope with the vast amount of information. Therefore, new models with respect to users’ needs are required to support them fulfilling their tasks. In this paper, the adaptation of a task-oriented use model to future paradigms is presented by considering personal structural preferences and advanced user interaction control. The model reflects user groups’ tasks and user interface structure preferences described in a system-independent language. For the future, this model is intended to be used for the run-time generation of user interfaces for adaptive software and intelligent environments, especially in the area of production and manufacturing.

English

The database-centric approach to graphic user interface (GUI) development, quickly andeasily manages standardisation and modification of labels and look and feel of controls bykeeping various control-creation data into the database. The runtime generation of controlsprovides the flexibility to control their creation and modification issues. This method freezes theapplication code once the development is over. The process of recompilation is eliminated whencreation or modification of controls is done. Dynamic controls such as menus, label, text box,button, combo box, list box, group box, check box, radio button, tab control, spin button, treecontrol can be easily formed and controlled using this approach.