RRAM-based Neuromorphic System Research Articles

A Fast Weight Transfer Method for Real-Time Online Learning in RRAM-Based Neuromorphic System

In this work, a synaptic weight transfer method for a neuromorphic system based on resistive-switching random-access memory (RRAM) is proposed and validated. To implement the on-chip trainable neuromorphic system which utilizes large-scale hardware synapse units, a fast and reliable write scheme needs to be established. Based on the experimental results, it is confirmed that the gradual set and full reset operation is the most suitable operation scheme for fast programming due to the fundamental reliability characteristics of the resistive-switching memory cell. Also, the superiority of this programming method using the proposed RRAM compact model is demonstrated. In addition, a one weight/one synaptic device structure is newly adopted for realizing high-density synapse arrays by using a nonnegative weight constraint in supervised learning. Finally, the pattern recognition accuracies obtained at the software and hardware levels are compared.

A Parallel Multibit Programing Scheme With High Precision for RRAM-Based Neuromorphic Systems

Resistive random access memory (RRAM) has been extensively studied as a promising candidate for neuromorphic computing. So far, high-precision multibit programing of RRAM for neuromorphic systems is done cell-by-cell, which can be very time-consuming. This brief demonstrates a row-by-row parallel program-verify scheme on a fabricated 160-Kb RRAM array using the incremental gate voltage programing (IGVP) method. Statistical analysis indicates that the optimal conductance tuning step size can accelerate the programing process and improve the success rate. Also, for the first time, the fundamental relations between programing success rate, critical path, and parallel efficiency for parallel program-verify methodology on the RRAM array are systematically studied. Moreover, a software-comparable recognition accuracy with only <0.3% accuracy loss is experimentally achieved for MNIST data set classification utilizing the proposed parallel program-verify scheme.

A study of conductance update method for Ni/SiNx/Si analog synaptic device

Neuromorphic systems are expected to be a breakthrough beyond the conventional von Neumann architecture when implementing an artificial neural network. In a neuromorphic system, analog synaptic devices store the synaptic weight values of an artificial neural network. Among various memory devices, RRAM-based synaptic device has several advantages such as excellent scaling potential with a simple two-terminal structure and low energy consumption during the read and write operations. However, it has an inherent limitation of abrupt and nonlinear change in the conductance characteristics. Here, we investigate the non-ideal characteristics of conductance modulation using a fabricated RRAM device. We also analyze the impact of non-ideal conductance modulation on pattern recognition accuracy through a device-to-system level simulation. In addition, to solve the drawback of the previous conductance update method (occasional RESET), we propose a new conductance update method (occasional RESET without re-write). This comprehensive experiment and device-to-system level study can facilitate the realization of reliable learning performance on RRAM-based neuromorphic systems.

Weighted Synapses Without Carry Operations for RRAM-Based Neuromorphic Systems.

The parallel updating scheme of RRAM-based analog neuromorphic systems based on sign stochastic gradient descent (SGD) can dramatically accelerate the training of neural networks. However, sign SGD can decrease accuracy. Also, some non-ideal factors of RRAM devices, such as intrinsic variations and the quantity of intermediate states, may significantly damage their convergence. In this paper, we analyzed the effects of these issues on the parallel updating scheme and found that it performed poorly on the task of MNIST recognition when the number of intermediate states was limited or the variation was too large. Thus, we propose a weighted synapse method to optimize the parallel updating scheme. Weighted synapses consist of major and minor synapses with different gain factors. Such a method can be widely used in RRAM-based analog neuromorphic systems to increase the number of equivalent intermediate states exponentially. The proposed method also generates a more suitable ΔW, diminishing the distortion caused by sign SGD. Unlike when several RRAM cells are combined to achieve higher resolution, there are no carry operations for weighted synapses, even if a saturation on the minor synapses occurs. The proposed method also simplifies the circuit overhead, rendering it highly suitable to the parallel updating scheme. With the aid of weighted synapses, convergence is highly optimized, and the error rate decreases significantly. Weighted synapses are also robust against the intrinsic variations of RRAM devices.

A Study of the Effect of RRAM Reliability Soft Errors on the Performance of RRAM-Based Neuromorphic Systems

Resistive RAM (RRAM) device has been extensively used as a scalable nonvolatile memory cell in neuromorphic systems due to its several advantages, including its small size and low-power requirements. However, resulting from the stochastic nature of the oxygen vacancies, the RRAM device suffers from reliability soft errors. In this paper, we provide for the first time a modeling framework to compute the effect of those soft errors on the system accuracy. Applying the proposed technique on a case-study system used to recognize the MNIST data set, our simulation results show that the system accuracy can degrade from 91.6% to 43% due to the RRAM reliability soft errors. To overcome this loss in the system performance, various possible adjustments to the parameters of the neuron pulses are analyzed. Furthermore, in this paper, two methodologies are proposed for automatically detecting and fixing the degradation in the system accuracy caused by the RRAM reliability soft errors. Using the suggested methodologies, the system accuracy of our case-study system can be restored back from 43% to 91.6% with small increase in the training cycle duration and with as small as 0.1% increment in the energy consumption of the system.