An asynchronous Adaptive priority round- robin arbiter (APRA) based on four-phase dual-rail proto- col is proposed. Combining the advantages of synchronous and asynchronous circuits, it provides the required band- width allocation on basis of arbitration fairness and works in synchronous SoC. In the Nonidling and nonpreemptive (NINP) model, simulations and verifications are made. The results show that the speed of the proposed arbiter is im- proved by 18%-50.4% and the dynamic and static power is reduced by 8.4%-46.2% and 81.8%-90.9% respectively compared with the commonly-used Fixed priority (FP), Round-Robin (RR) and Lottery arbiters. The proposed arbiter is better in output bandwidth allocation and it also has advantages in speed and power. Furthermore, it is easy in reconfiguration, strong in practicability and low in complexity of system integration and suits various extreme communication traffics.
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