Reverse Bias Capacitance Voltage Research Articles

On the studies of capacitance–voltage and impedance spectroscopy of an Ni/(GO-Fe3O4)/n-Si heterojunction device over a wide temperature range

The purpose of this work is to fabricate a Ni/GO-Fe3O4/n-Si heterojunction device using Mott-Schottky plots and to study the capacitance–voltage/conductance/series resistance characteristics of the device as a function of temperature. We analyzed temperature dependent capacitance–voltage measurements for the Ni/GO-Fe3O4/n-Si device in the temperature range from 80 to 360 K. Temperature dependent electrical measurements have been performed at a fixed frequency of 500 kHz and frequency dependent ones have been carried out at room temperature. In the reverse bias capacitance–voltage characteristics figure, it has been determined that the barrier height is 1.73 eV (80 K) and 1.50 eV (360 K) with 20 K steps. The impedance analysis measurements have been performed in the reverse and forward biases. The experimental results have shown that the values of capacitance, conductance, interface states and series resistance Rs depend on both bias voltage and temperature.

Comparison of electrical properties of CuO/n-Si contacts with Cu/n-Si

Abstract In this study, CuO/n-Si/Al heterojunction contacts were fabricated by thermal evaporation technique. Electrical characteristics of the samples were investigated with the current-voltage (I-V), capacitance-voltage/frequency (C-V/f), and conductancevoltage (G/V) measurements at room temperature. Also, Cu/n-Si/Al Schottky contact was produced as a reference sample to investigate the electrical properties of the samples. The values of ideality factor (n), barrier height ( Φb) and series resistance (Rs) of the samples were calculated from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Also, for checking the consistency of the results, Cheung and Norde functions were used. The experimental result values of CuO/n-Si contact were compared with the values of the reference Cu/n-Si Schottky diode. It was observed that the values of the ideality factor and barrier height of the CuO/n-Si heterojunction were higher than those of the Cu/n-Si Schottky contact, while the series resistance was lower. Also, it has been observed that the value of capacitance decreased with increasing frequency and after a certain value of frequency it was almost constant. The ideality factor of CuO/n-Si/Al heterostructure is about 2.40 and so, it is not close to the ideal behavior.

Fabrication and characterization of Au/n-CdTe Schottky barrier under illumination and dark

CdTe nanoparticles have been grown by chemical reduction method using EDA as capping agent. These are used to fabricate Schottky barrier in a simple cost-effective way at room temperature. The grown nanoparticles are structurally characterized by X-ray diffraction (XRD), Transmission electron microscopy (TEM). The optical properties of nano CdTe is characterized by UV–Vis absorption spectra, PL spectra. The band gap of the CdTe nanoparticles is increased as compared to CdTe bulk form indicating there is blue shift. The increase of band gap is due to quantum confinement. Photoluminescence spectra shows peak which corresponds to emission from surface state. CdTe nanofilm is grown on ITO coated glass substrate by dipping it on toluene containing dispersed CdTe nanoparticles. Schottky barrier of Au/n-CdTe is fabricated on ITO coated glass by vacuum deposition of gold. I–V and C–V characteristics of Au/n-CdTe Schottky barrier junction have been studied under dark and light condition. It is found that these characteristics are influenced by surface or interface traps. The values of barrier height, ideality factor, donor concentration and series resistance are obtained from the reverse bias capacitance–voltage measurements.

Frequency and Voltage-Dependent Dielectric Properties and AC Electrical Conductivity of (Au/Ti)/Al2O3/n-GaAs with Thin Al2O3Interfacial Layer at Room Temperature

An (Au/Ti)/Al2O3/n-GaAs structure with thin (30 A) interfacial oxide layer (Al2O3), formed by atomic layer deposition technique is fabricated to investigate both frequency and applied bias voltage dependences of real and imaginary parts of dielectric constant (e′ and e′′) and electric modulus (M ′ and M ′′), loss tangent tan δ and ac electrical conductivity σAC in a wide frequency range from 1000 Hz to 1 MHz at room temperature. The dielectric properties of the (Au/Ti)/Al2O3/n-GaAs metal-insulator-semiconductor structure are obtained using the forward and reverse bias capacitance-voltage (C-V ) and conductance-voltage (G/ω-V ) measurements in the applied bias voltage range from –4 V to +4 V, at room temperature. Experimental results show that the dielectric parameters were strongly frequency and voltage dependent. For each frequency the (C-V ) plots show a peak and the change in frequency has effect on both the intensity and position of the peak. e′, e′′ and tan δ decrease with increasing frequency, whereas σAC increases with increasing frequency at applied bias voltage. M ′ increases with the increasing frequency and reaches a maximum. M ′′ shows a peak and peak position shifts to higher frequency with increasing applied voltage. It can be concluded that the e′, e′′, tan δ, M ′, M ′′ and σAC values of the (Au/Ti)/Al2O3/ n-GaAs structure are strongly dependent on both the frequency and applied bias voltage especially in the depletion and accumulation region. Also, the results can be deduced to imply that the interfacial polarization is easier at low frequencies, therefore contributing to the deviation of dielectric properties and AC electrical conductivity of (Au/Ti)/Al2O3/n-GaAs structure.

Impedance Spectroscopy of n-CdTe/p-CdMnTe/p-GaAs Diluted Magnetic Diode

n-CdTe/p-CdMnTe/p-GaAs diluted magnetic diode was grown by molecular beam epitaxy technology. The forward- and reverse-bias capacitance–voltage (C–V), conductance–voltage (G–V), series resistance–voltage (R s–V), impedance–voltage (Z–V), and phase–voltage (θ–V) characteristics of this diode have been analyzed in the frequency range of 5 kHz to 1 MHz at room temperature. Both the density of interface states (N ss) and series resistance (R s) are strongly frequency dependent and decrease with increasing frequency. The values of the built-in potential ( $$ V_{\rm{bi}} $$ ), the doping concentration ( $$ N_{\rm{d}} $$ ), and the barrier height ( $$ \varphi_{{{\rm{b}}(C - V)}} $$ ) of the diode were calculated at different frequencies. Our experimental results revealed that both the series resistance and interface state density must be taken into account in studying the impedance spectroscopy on heterojunction diodes to understand their performance for electronic and optoelectronic applications. Diluted magnetic semiconductors are promising materials for future technology.

Analysis of interface states and series resistances in Au/p-InP structures prepared with photolithography technique

Some electronic parameters such as ideality factor, barrier height, series resistance and interface state densities of the Au/p-InP Schottky barrier diodes with 100 and 200 μm diameter contacts have been investigated. We have calculated electronic parameters of these two diodes and compared using experimental forward bias current–voltage (I–V) and reverse bias capacitance–voltage measurements at room temperature. The values of ideality factor and barrier height for the 100 and 200 μm diameter diodes have been obtained as 1.07, 0.84 and 1.08, 0.80 eV, respectively. In addition, we have calculated interface state density (N SS ) as a function of energy distribution (E SS –E V ) of these diodes and compared them. The energy distribution of interface states density has been determined from the forward bias I–V characteristics by taking into account the bias dependence of the effective barrier height. Density of interface states in the considered energy range are in close agreement with values obtained for 100 and 200 μm diameter Au/p-InP.

On the Voltage and Frequency Distribution of Dielectric Properties and ac Electrical Conductivity in Al/SiO2/p-Si (MOS) Capacitors

An Al/SiO2/p-Si (MOS) capacitor with a thick (826 Å) interfacial oxide layer (SiO2) which is formed by using the thermal oxidation method is fabricated to investigate both frequency and applied bias voltage dependences of real and imaginary parts of dielectric constant (ε′ and ε″) and electric modulus (M′ and M″), loss tangent (tan δ) and ac electrical conductivity (σac) in a wide frequency range from 1 kHz to 1 MHz at room temperature. The dielectric properties of the MOS capacitor are obtained using the forward and reverse bias capacitance-voltage (C—V) and conductance-voltage (G/ω—V) measurements in the applied bias voltage range 1.4–5.6 V. The values of ε′, ε″, tanδ, M′, M″ and σac are found to be strong functions of frequency and applied bias voltage in the depletion region due to excess capacitance Cex and conductance Gex/ω especially at low frequencies. The experimental results show that the interfacial polarization can occur at low frequencies more easily, consequently contributing to the dispersion in ε′, ε″, tanδ, M′, M″ and σac values of the MOS capacitor. The other reason for dispersion in the dielectric properties may be attributed to a particular density distribution of interface states (Nss) localized at the Si/SiO2 interface, as well as space charge carriers and inhomogeneity of interfacial oxide layer. The increase in conductivity with increasing frequency can be attributed to the hopping type conduction mechanism. It can be concluded that the ε′, ε″, tanδ, M′, M″ and σac values of the Al/SiO2/p-Si (MOS) capacitor are strongly dependent on both the frequency and applied bias voltage especially in the depletion region.

Gaussian Distribution on Electrical Characteristics of Al/SiO<SUB>2</SUB>/p-Si Structures

The Al/ /p-Si Schottky diodes (39 dots) with native interfacial insulator layer SiO<SUB>2 </SUB>were fabricated on the same Si wafer. The current-voltage (<i>I</i>-<i>V</i>) and capacitance-voltage (<i>C</i>-<i>V</i>) characteristics of metal-oxide-semiconductor diodes, which are based on Al/SiO<SUB>2</SUB>/p-Si structures, have been measured at room temperature. Barrier height (BH), ideality factor (<i>n</i>) of these diodes has been calculated from their experimental forward bias current-voltage (I-V), reverse bias capacitance-voltage. Even though they are identically performed on the same quarter Si wafer, the calculated values of BH, which is obtained from <i>I</i>-<i>V</i> characteristic, have ranged from 0.687 to 0.772 eV and ideality factor <i>n</i> from 1.903 to 4.48. The values of barrier heights obtained from <i>C</i>-<i>V</i> characteristics range from 0.629 to 1.097 eV. It was found that the values of barrier height <img src=image/10.5923.j.materials.20120204.05_001.gif></img>obtained <i>C</i>-<i>V</i> characteristics is larger than that of these values from <i>I</i>-<i>V </i>characteristics. The experimental values BH distribution obtained from <i>I</i>-<i>V </i>and <i>C</i><SUP>-2</SUP>-<i>V</i> characteristics have been fitted by Gaussian function and their mean values of BHs have been calculated to be 0.730 and 0.863 respectively. Normal distribution of ideality factors mean value is 3.160 with standard deviation 0.689. Experimental results show that the interface states at a native insulator layer between metal and semiconductor play an important role in the value of the BH, ideality factor and the other electrical parameters of Schottky diodes.

On the profile of frequency dependent interface states and series resistance in Au/p-InP SBDs prepared with photolithography technique

The frequency dependent of the forward and reverse bias capacitance-voltage (C-V) and conductance-voltage (G/w-V) characteristics of Au/p-InP SBDs have been investigated in the frequency range of 20 kHz-10 MHz and voltage range of −5 − 5 V at room temperature. The effects of surface states (Nss) and series resistance (Rs) on C-V and G/w-V characteristics have been investigated in detail. The frequency dependent Nss and Rs profiles were obtained for various applied bias voltages. The experimental results show that the main electrical parameters of Au/p-InP SBD such as barrier height (ΦB), the density of acceptor concentration (NA), Nss and Rs were found strongly frequency and voltage dependent. The values of C and G/w decrease with increasing frequency due to a continuous distribution of Nss localized at the metal/semiconductor (M/S) interface. The effect of Rs on C and G is found considerably high especially at high frequencies. Therefore, the high frequencies of the values of C and G were corrected for the effect of Rs in the whole measured bias range to obtain the real diode capacitance Cc and conductance Gc using the Nicollian and Goetzberger technique. The distribution profile of Rs-V gives a peak depending on the frequency especially at low frequencies and disappears with increasing frequencies due to the existence of Nss at the M/S interface.

Electrical properties of Poly(ethylene glycol dimethacrylate-n-vinyl imidazole)/Single Walled Carbon Nanotubes/n-Si Schottky diodes formed by surface polymerization of Single Walled Carbon Nanotubes

In this paper we report the electrical characteristics of the Schottky diodes formed by surface polymerization of the Poly(ethylene glycol dimethacrylate-n-vinyl imidazole)/Single Walled Carbon Nanotubes on n-Si. The Single Walled Carbon Nanotubes were synthesized by CVD method. The main electrical properties of the Poly(ethylene glycol dimethacrylate-n-vinyl imidazole)/Single Walled Carbon Nanotubes/n-Si have been investigated through the barrier heights, the ideality factors and the impurity density distribution, by using current–voltage and reverse bias capacitance voltage characteristics. Electrical measurements were carried out at room temperature. Poly(ethylene glycol dimethacrylate-n-vinyl imidazole)/Single Walled Carbon Nanotubes/n-Si Schottky diode current–voltage characteristics display low reverse-bias leakage currents and average barrier heights of 0.61 ± 0.02 eV and 0.72 ± 0.02 eV obtained from both current–voltage and capacitance–voltage measurements at room temperature, respectively.

Electrical characterization of Au/Pd/n-GaN/Pd/Au device structure in the radio frequency range by simulation study

GaN based devices are highly promising optoelectronic devices for many years due to their useful applications in photovoltaic energy conversation, fiber optic communication and atmosphere monitoring. GaN based devices such as Schottky barrier, metal–semiconductor–metal and p-i-n structure have been fabricated and characterized so far. A proper understanding of the impedance or admittance spectroscopy result is crucial since it is a powerful tool to calculate the physical and electronic parameters of a device. In this study, temperature dependent dark current–voltage ( I– V) and dark impedance spectra of n type GaN based metal–semiconductor–metal device have been studied with current–voltage and impedance spectra by simulation. All current–voltage characteristics exhibited good rectification behavior. The forward and reverse bias capacitance–voltage ( C– V) characteristics of the Au/Pd/n-GaN/Pd/Au device were simulated at 2 MHz probing frequency. Nyquist plots of simulated device at 295 K are shown that two-barrier heights can be observable above critical threshold bias point. Frequency depended inverse dielectric loss tangent spectra of Au/Pd/n-GaN/Pd/Au device at different DC bias voltages also shows significant two peaks. This indicates that our simulation is extremely useful for determination of potential barrier numbers.

Laterally inhomogeneous barrier analysis of identically prepared Cd/CdS/n-Si/Au–Sb structures by SILAR method

In this study, CdS thin films have been deposited on n-Si substrate using a successive ionic layer adsorption and reaction (SILAR) method at room temperature. Structural properties have been investigated by means of X-ray diffraction (XRD) and scanning electron microscopy (SEM) measurements. The XRD and SEM investigations show that films are covered well, polycrystalline structure and good crystallinity levels. The Cd/CdS/n-Si/Au–Sb structures (28 dots) have been identically prepared by the SILAR method. The effective barrier heights and ideality factors of these structures have been obtained from forward bias current–voltage ( I–V) and reverse bias capacitance voltage ( C–V) characteristics. The barrier height (BH) for the Cd/CdS/n-Si/Au–Sb structure calculated from the I– V characteristics have ranged from 0.664 eV to 0.710 eV, and the ideality factor from 1.190 to 1.400. Lateral homogeneous barrier height has been determined approximately 0.719 eV from the experimental linear relationship between BHs and ideality factors. The experimental BH and ideality factor distributions obtained from the I–V characteristics have been fitted by a Gaussian function, and their means of values have been found to be (0.683 ± 0.01) eV and (1.287 ± 0.05), respectively. The barrier height values obtained from the reverse bias C −2 –V characteristics have ranged from 0.720 eV to 0.865 eV and statistical analysis yields the mean (0.759 ± 0.02) eV. Additionally, a doping concentration obtained from C −2 –V characteristics has been calculated (8.55 ± 1.62) × 10 14 cm −3.

Effects of SILAR cycle on the electrical characteristics of Cd/CdSe/n-Si/Au-Sb structure

Cd/CdSe/n-Si/Au-Sb structures have been fabricated by Successive Ionic Layer Adsorption and Reaction (SILAR) method under various SILAR cycles. The characteristics parameters of these structures such as barrier height, ideality factor, series resistance are calculated from the current-voltage (I-V) measurements and the barrier height, carrier concentration are calculated from reverse bias capacitance-voltage (C-V) measurements at 300 kHz frequency and room temperature. Furthermore, the density distribution and rectifying ratio of these structure have been calculated from the I-V measurements as a function of SILAR cycle. It has been seen that the changes of characteristic parameters such as barrier height, ideality factor and series resistance of the Cd/CdSe/n-Si/Au-Sb structures have lightly changed with increasing SILAR cycle.

Correlation Between Barrier Heights and Ideality Factors of Ni/n-Ge (100) Schottky Barrier Diodes

We computed the homogeneous Schottky barrier height (SBH) at ideality factor (n) = 1.0 of Ni/nGe (100) Schottky diodes (SDs). The SDs were identically prepared by using resistive evaporation of Ni on n-Ge (100). The SBHs and n of these diodes (24 dots) were calculated from their experimental forward bias current-voltage (I-V ) and reverse bias capacitance-voltage (C-V ) measurements at room temperature. Even though the Schottky diodes were identically prepared, the values of the SBH from the I-V characteristics varied from 0.487 to 0.508 eV, the ideality factor varied from 1.34 to 1.53, and the SBH from the C 2 -V characteristics varied from 0.358 to 0.418 eV. The Gaussian fits of the experimental SBH distributions obtained from the C 2 -V and the I-V characteristics yielded mean SBH values of 0.401 ± 0.015 and 0.503 ± 0.006 eV, respectively. Furthermore, a homogeneous SBH value of approximately 0.535 eV was also computed from an extrapolation of a linear plot of the experimental SBHs versus the ideality factors. The homogeneous SBHs, rather than the eective SBHs, of individual contacts or mean values should be used to discuss the theories and the physical mechanisms that determine the SBHs of SDs.

Determination of the laterally homogeneous barrier height of palladium Schottky barrier diodes on n-Ge (1 1 1)

We have studied the experimental linear relationship between barrier heights and ideality factors for palladium (Pd) on bulk-grown (1 1 1) Sb-doped n-type germanium (Ge) metal-semiconductor structures with a doping density of about 2.5×10 15 cm −3. The Pd Schottky contacts were fabricated by vacuum resistive evaporation. The electrical analysis of the contacts was investigated by means of current–voltage ( I– V) and capacitance–voltage ( C– V) measurements at a temperature of 296 K. The effective barrier heights from I– V characteristics varied from 0.492 to 0.550 eV, the ideality factor n varied from 1.140 to 1.950, and from reverse bias capacitance–voltage ( C −2– V) characteristics the barrier height varied from 0.427 to 0.509 eV. The lateral homogenous barrier height value of 0.558 eV for the contacts was obtained from the linear relationship between experimental barrier heights and ideality factors. Furthermore the experimental barrier height distribution obtained from I– V and ( C −2− V) characteristics were fitted by Gaussian distribution function, and their mean values were found to be 0.529 and 0.463 eV, respectively.

Capacitance and conductance–frequency characteristics of Au–Sb/p-GaSe:Gd Schottky barrier diode

The Schottky barrier height (SBH) values have been obtained from the reverse bias capacitance–voltage ( C– V) characteristics of Au–Sb/p-GaSe:Gd Schottky barrier diode (SBD) in the temperature range of 180–320 K. The forward bias capacitance–frequency ( C– f) and conductance–frequency ( G– f) measurements of Au–Sb/p-GaSe:Gd SBD have been carried out from 0 to 1.00 V with steps of 0.05 V, whereby the energy distribution of the interface states and their relaxation time have been determined from these characteristics. It has been seen that there is a good agreement between the experimental and theoretical C– f and G– f values. Also, the capacitance values obtained from C– f measurements have shown almost a plateau up to a certain value of frequency, then, have decreased. It has been seen that the interface state density has a very small density distribution range (6.02 × 10 10–6.80 × 10 10 cm −2 eV −1) in the energy range of (0.21− E v)–(1.21− E v) eV with bias from the midgap towards the top of the valence band. The interface state density values calculated for Au–Sb/p-GaSe:Gd SBD are rather low than those given in the literature.

Illumination effect on electrical characteristics of organic-based Schottky barrier diodes

The forward and reverse bias capacitance–voltage (C−V) and conductance–voltage (G/ω−V) characteristics of Au/polyvinyl alcohol (Co, Zn-doped)/n-Si Schottky barrier diodes have been investigated depending on illumination intensity at room temperature and 1 MHz. These experimental C−V and G/ω−V characteristics show fairly large illumination dispersion especially in the weak inversion and depletion regions and they increase with the increasing illumination intensity because of the illumination induced interface states and electron-hole pair. The C−V plots show that peaks are the results of the particular distribution density of the interface states (Nss), interfacial polymer layer, and series resistance (Rs) of device. The magnitude of the peaks increases with the increasing illumination intensity and their positions shift from the high forward bias voltage to low forward bias voltages. The C−2−V plots give a straight line in a wide bias voltage region for each illumination intensity. The variation in doping concentration (ND), depletion layer width (WD), and barrier height [ΦB(C−V)] were obtained from these C−2−V plots. In addition, voltage dependent density distribution profile of Nss was obtained from both low-high capacitance (CLF−CHF) and Hill–Coleman methods. It is observed that there is a good agreement between the results obtained by these methods. In addition, voltage dependent Rs profile was obtained from C−V and G/ω−V data by using Nicollian and Brews method.

Schottky barrier height modification in Au/ n-type 6H–SiC structures by PbS interfacial layer

We have prepared the Au/PbS/ n-6H–SiC Schottky diodes with interface layer and the reference Au/ n-6H–SiC/Ni Schottky diodes without interface layer to realize Schottky barrier height (SBH) modification in the Au/SiC Schottky diodes. The BH reduction has been succeeded by the PbS interlayer to modify the effective BH by influencing the space charge region of the SiC. The PbS thin layer on the SiC was formed by the vacuum evaporation. The SBH values of 0.97 and 0.89 eV for the samples with and without the interfacial PbS layer were obtained from the forward bias current–voltage ( I– V) characteristics. X-ray diffraction (XRD) study was carried out to determine the structural formation of the PbS on SiC. The reduction of the BH in the Au/PbS/ n-6H–SiC Schottky diodes has been attributed to the fact that the interface states have a net positive interface charge in metal/ n-type semiconductor contact, and thus the positive space charge Q sc in the Au/PbS/ n-6H–SiC Schottky diodes becomes smaller than if the interface state charges Q ss were absent. The experimental carrier concentration value of 4.73 × 10 17 cm −3 obtained from the forward and reverse bias capacitance–voltage characteristics for the Au/PbS/ n-6H–SiC contacts is lower than the value of 5.52 × 10 17 cm −3 obtained for the reference diode, and this is an evidence of the reduction of the BH by the modification of the space charge density of the SiC.

The electrical characteristics of Al/ p-InP Schottky contacts

In this study, it has been investigated the electrical characteristics of identically prepared Al/ p-InP Schottky diodes. The barrier heights (BHs) and ideality factors of all devices have been calculated from the electrical characteristics. Although the diodes were all identically prepared, there was a diode-to-diode variation: the effective barrier heights ranged from 0.83 ± 0.01 to 0.87 ± 0.01 eV, and the ideality factors ranged from 1.13 ± 0.02 to 1.21 ± 0.02. The barrier height vs. ideality factor plot has been plotted for the devices. Lateral homogeneous BH was calculated as a value of 0.86 eV from the observed linear correlation between BH and ideality factor, which can be explained by laterally inhomogeneities of BHs. The values of barrier height and free carrier concentration yielded from the reverse bias capacitance–voltage ( C– V) measurements ranged from 0.86 ± 0.04 to 1.00 ± 0.04 eV and from (3.47 ± 0.39) × 10 17 to (4.90 ± 0.39) × 10 17 cm −3, respectively. The mean barrier height and mean acceptor doping concentration from C– V characteristics have been calculated as 0.91 eV and 3.99 × 10 17 cm −3, respectively.

On barrier height inhomogeneities of Au and Cu/n-InP Schottky contacts

In this work, barrier height inhomogeneity and its origin are investigated for Au and Cu/n-InP metal/semiconductor contacts. The effective barrier height values of the Au and Cu/n-InP Schottky barrier diodes (SBDs) have been obtained as 0.480 and 0.404 eV from current–voltage ( I–V) characteristics using the thermionic emission theory. The barrier height values of the Au and Cu/n-InP SBDs have been obtained as 0.524 and 0.453 eV from the experimental reverse bias capacitance–voltage ( C–V) characteristics, respectively. The discrepancy between the barrier heights could be explained in terms of barrier height inhomogeneity approach. To investigate origin of the barrier height inhomogeneity, the interface atomic concentration and its distribution have been obtained by deep profile analysis using electron spectroscopy for chemical analysis (ESCA) data. The analysis shows that the interface is not abrupt. Thus, we could say lateral barrier height inhomogeneity could arise from the interface inhomogeneity.