Reo Circuits Research Articles

ReLo: a Dynamic Logic to Reason About Reo Circuits

Critical systems require high reliability and are present in many domains. They are systems in which failure may result in financial damage or even loss of lives. Standard techniques of software engineering are not enough to ensure the absence of unacceptable failures and/or that critical requirements are fulfilled. Reo is a component-based modelling language that aims to provide a framework to build software based on existing pieces of software, which has been used in a wide variety of domains. Its formal semantics provides grounds to certify that systems based on Reo models satisfy specific requirements (i.e., absence of deadlocks). Current logical approaches for reasoning over Reo require the conversion of formal semantics into a logical framework. ReLo is a dynamic logic that naturally subsumes Reo's semantics. It provides a means to reason over Reo circuits. This work extends ReLo by introducing the iteration operator, and soundness and completeness proofs for its axiomatization.

Interpreting Reo Circuits as PDL models

Reo is a coordination-based language with the proposal of connecting different systems and interfaces. It aims to develop communication between different systems with a high level of abstraction and without many restrictions. PDL is a multimodal logic tailored to reason about programs. It is proved to be sound, complete, decidable and has a simple Kripke semantics. This work intends to provide an interpretation of Reo circuits as PDL models. These are the first steps towards providing a dynamic logic tailored to reason directly about Reo circuits.

Connection models for the Internet-of-Things

The Internet-of-Things (IoT) is expected to swamp the world. In order to study and understand the emergent behaviour of connected things, effective support for their modelling is needed. At the heart of IoT are flexible and adaptive connection patterns between things, which can naturally be modelled by channel-based coordination primitives, and characteristics of connection failure probabilities, execution and waiting times, as well as resource consumption. The latter is especially important in light of severely limited power and computation budgets inside the things. In this paper, we tackle the IoT modelling challenge, based on a conservative extension of channel-based Reo circuits. We introduce a model called priced probabilistic timed constraint automaton, which combines models of probabilistic and timed aspects, and integrates pricing information. An expressive logic called priced probabilistic timed scheduled data stream logic is presented, so as to enable the specification and verification of properties, which characterize data-flow streams and prices. A small but illustrative IoT case demonstrates the principal benefits of the proposed approach.

Orchestrating web services using Reo: from circuits and behaviors to automatically generated code

We present a compositional construction of web services, using Reo and constraint automata as the main "glue" ingredients. Reo is a graphical and exogenous coordination language based on channels. We propose a framework that, taking as input the behavioral description of services (as constraint automata), their WSDL interfaces, and the description of their interaction in Reo, generates all the necessary Java code to orchestrate the services in practice. For each web service, we automatically generate a proxy that manages the communication between this service and the Reo circuit. Although we focus on web services, we can compose different kinds of service-oriented and component technologies at the same time (e.g., CORBA, RPC, WCF), by generating different proxies and connecting them to the same coordinator.

Symbolic execution of Reo circuits using constraint automata

Reo is a coordination language that can be used to model different systems. We propose a technique for symbolic execution of Reo circuits using the symbolic representation of data constraints in Constraint Automata. This technique enables us to obtain the relations among the data that pass through different nodes in a circuit from which we infer the coordination patterns of the circuit. Deadlocks, which may involve data values, can also be checked using reachability analysis. As an alternative to constructing the symbolic execution tree, we use regular expressions and their derivatives which we obtain from our deterministic finite automata. We show that there is an upper bound of one for unfolding the cycles in constraint automata which is enough to reveal the relations between symbolic representations of inputs and outputs. In the presence of feedback in a Reo circuit a number of substitutions are necessary to make the relationship between successive input/output values explicit. The number of these substitutions depends on the number of buffers in the Reo circuit, and can be found by static analysis. We illustrate our technique on a set of Reo circuits to show the extracted relations between inputs and outputs. We have implemented a tool to automate our proposed technique.

Synthesis of Reo circuits from scenario-based interaction specifications

It is difficult to construct correct models for distributed large-scale service-oriented applications. Typically, the behavior of such an application emerges from the interaction and collaboration of multiple components/services. On the other hand, each component, in general, takes part in multiple scenarios. Consequently, not only components, but also their interaction protocols are important in the development process for distributed systems. Coordination models and languages, like Reo, offer powerful “glue-code” to encode interaction protocols. In this paper we propose a novel synthesis technique, which can be used to generate Reo circuits directly from scenario specifications. Inspired by the way UML2.0 sequence diagrams can be algebraically composed, we define an algebraic framework for merging connectors generated from partial specifications by exploiting the algebraic structure of UML sequence diagrams.

Automated Analysis of Reo Circuits using Symbolic Execution

Reo is a coordination language that can be used to model different systems. We propose a technique for symbolic execution of Reo circuits using Constraint Automata and more specifically exploiting their data constraints. This technique enables us to obtain the relations among the data passing through different nodes in a circuit and also infer coordination patterns. As an alternative to constructing the symbolic execution tree, we propose an algorithm similar to the algorithms used for converting deterministic finite automata to regular expressions. Our technique can be used for analyzing data-dominated systems whereas the model checking approach is best suited for the study of control-dominated applications. Deadlocks, which may involve data values, can also be checked. We illustrate the technique on a set of data dominated circuits as well as a non-trivial critical section problem. A tool is implemented to automate the proposed technique.

Synthesis of Reo Circuits from Scenario-based Specifications

It is difficult to construct correct models for distributed large-scale service-oriented applications. Typically, the behavior of such an application emerges from the interaction and collaboration of multiple components/services. On the other hand, each component, in general, takes part in multiple scenarios. Consequently, not only components, but also their interaction protocols are important in the development process for distributed systems. Coordination models and languages, like Reo, offer powerful “glue-code” that encode the interaction protocols. In this paper we propose a novel synthesis technique, which can be used to generate Reo circuits directly from scenario specifications. Inspired by the way UML2.0 sequence diagrams can be algebraically composed, we define an algebraic framework for merging connectors generated from partial specifications by exploiting the algebraic structure of UML sequence diagrams.

Automated Mapping of Reo Circuits to Constraint Automata

A tool is developed in order to input Reo circuits and generate their corresponding constraint automata. The XML schemas for input and output are presented which establish a common interface for generating an integrated set of tools. Two heuristics in joining constraint automata are presented and experimental results are shown.