Reference Voltage Variation Research Articles

Integral Sliding Mode‐Composite Nonlinear Feedback Control Strategy for Microgrid Inverter Systems

To enhance the dynamic performance and robustness of the voltage control system of islanded microgrid inverters, a new control strategy combining integral sliding mode (ISM) control and composite nonlinear feedback (CNF) control is proposed. In ISM control, firstly, a new reaching law is designed to improve movement quality in the reaching phase by improving the power term and introducing the inverse tangent function. Then, to improve disturbance observation accuracy, a variable gain extended state observer is designed by improving the regulation mechanism of the state variables according to deviation control. Using the idea of variable damping, linear and nonlinear feedback are combined into CNF control. Specifically, linear feedback provides a small damping ratio for faster system response, while nonlinear feedback increases the damping ratio to improve steady‐state performance. Simulation results show that the integral sliding mode‐composite nonlinear feedback (ISM‐CNF) control strategy cam balances convergence speed and chattering better and achieves higher steady‐state accuracy than conventional strategies. Moreover, ISM‐CNF control has better robustness to reference voltage variations and disturbances caused by sudden load changes. Therefore, the ISM‐CNF control strategy can accomplish voltage control of islanded microgrid inverters quickly and steadily, effectively suppressing system disturbances and enhancing stability and power quality. © 2024 Institute of Electrical Engineers of Japan and Wiley Periodicals LLC.

An analytical design and analysis of a high gain switched inductor voltage multiplier cell power converter

The proposed modified higher gain boost converter employs switched Inductor and multiplier cell-based voltage boosting techniques, as the paper represents. This converter is modelled to enhance the static gain and efficiency. As the designed topology has an incessant source current at its input side, it is ideal for solar PV applications. With a power capacity of 100 W, the proposed topology is designed to work on 24 V source input and 200 V load/output voltage. The load voltage is maintained by a PI controller, which achieves the highest efficiency of 92% under rated load conditions. The converter’s transient performance with the controller is investigated under various situations, including supply voltage variation, reference voltage variation, and load power variation. Finally, the designed converter’s experimental model is created to evaluate the simulated and conceptual results.

Control and fault diagnosis for two-interleaved boost converter associated with to PEMFC

This paper presents an enhanced control and fast fault detection method, localisation and isolisation for a two-phase interleaved boost DC/DC converter specifically designed for fuel cell applications. Fuel cells are known for their rapidly changing output voltage and current due to fluctuating load demands. Conventional converters might not be able to respond fast enough to maintain stable operation under such conditions.The two-phase interleaved design offers significant advantages. such as reduced ripple current delivered by dividing the Input current, the converter significantly lowers input and current ripple compared to single-phase designs. Each phase handles a smaller portion (1/N) of the total current, leading to reduced stress on individual components and enhanced reliability and operating margins. Additionally, Interleaving minimizes conduction losses by dividing the current among multiple converter stages. This work presents a model of a two-phase interleaved boost DC/DC converter and implements a PI controller for its output voltage regulation. This control method guarantees good performance even under varying reference voltages and load conditions. The proposed algorithm addresses the challenge of open circuit switch failures by utilizing current slopes for swift fault detection and rapid corrective action. This ensures accurate reference tracking, desired dynamic response, and timely fault detection and localization. The entire system was rigorously tested using MATLAB/Simulink software under various conditions, including reference voltage and load variations, as well as open circuit switch faults. The results showcase the proposed system's superior performance in terms of: Dynamic performance: The system exhibits rapid response to changes in operating conditions. Fast fault detection, localization and isolation.

Performance Comparison of a DC–DC Boost Converter With Conventional and Non-linear SMC Controller in Dual Loop Structure

Generally, the control system confronts various control techniques in the dual-loop control concept. Most of the studies deal with two different controllers in their loops, which increases the problem of designing two distinct procedures with lengthened calculations. In this article, different control techniques like conventional proportional integral (PI), proportional integral derivative (PID), and nonlinear sliding mode control (SMC) have been discussed, and the implementation of SMC in the Dual loop control of a DC–DC Boost converter is presented. The converter’s dynamic behavior is observed by driving their analytical equations. The effective controller for the proposed converter is ascertained by their comparative analysis. The proposed concept is validated with MATLAB/Simulink and a hardware prototype. The controller’s response is compared for various disturbances. Here, dual-loop SMC is put forward in both loops and its competence is confirmed with a minimal settling period of 0.005 sec and a percentage overshoot of 0.2% during the startup conditions, whereas during the line disturbances a minimum peak time of 0.0001 sec is achieved with a settling time of 0.025 sec. Additionally, a nil percentage overshoot and a settling time of 0.02 sec with a 0.001 sec peak time are attained during the load variations. Furthermore, a settling time of 0.01 sec and a percentage overshoot of 0.8% is reached during the reference voltage variations. From the numerical analysis, it is contemplated that an appropriate selection of SMC controllers in both the outer and inner loop results in optimal performance of the converter during the closed loop operation. Finally, the SMC + SMC controller exhibits superior controlling action compared to PI + PI and PID + PID controllers.

Backpropagation Neural Network Adaptive Voltage Control of a High-Gain Transformerless DC/DC Boost Converter for solar applications

An artificial neural network (ANN) adaptive control method for high-gain transformerless DC-DC boost converter is designed in order to achieve better performance and robustness. An ANN controller have the ability to predict the duty cycle in each moment because it is already trained with a vast number of random values of input, output and reference voltages. In order to minimize the error of obtaining the most convenient duty cycle, a back-propagation algorithm has been used to train the neural network because it has the ability to deal with the weights constantly for the sake of diminishing the loss function which makes the ANN generates the fittest duty cycle. The control scheme has been done for a photovoltaic system and the simulation is done using Matlab/Simulink. Simulation results are given for irradiance, reference voltage and load variations. The results are designated to prove the effectiveness of the proposed control system.

Optimal Design of Voltage Reference Circuit and Ring Oscillator Circuit Using Multiobjective Differential Evolution Algorithm

This paper deals with the optimal design of different VLSI circuits, namely, the CMOS voltage reference circuit and the CMOS ring oscillator (RO). The optimization technique used here is the multiobjective differential evolution algorithm (MDEA). All the circuits are designed for 90 nm technology. The main objective of the CMOS voltage reference circuit is to minimize the voltage variation at the output. The targeted value of the reference voltage is 550 mV. A CMOS ring oscillator (RO) is designed depending on the performance parameters such as power consumption and phase noise. The optimal transistor sizing of each circuit is obtained from MDEA. Each circuit is implemented in SPICE by taking the optimal dimensions of the transistors, and the performance parameters are achieved. The designed voltage reference circuit achieves a reference voltage of 550 mV with 600 nW power dissipation. The reference voltage variation of 8.18% is observed due to temperature variation from −40°C to + 125°C. The MDEA-based optimal design of RO oscillates at 2.001 GHz frequency, has a phase noise of −87 dBc/Hz at 1 MHz offset frequency, and consumes 71 μW power. This work mainly aims to optimize the MOS transistors’ sizes using MDEA for better circuit performance parameters. SPICE simulation has been carried out by using the optimal values of MOS transistor sizes to exhibit the performance parameters of the circuit. Simulation results establish that design specifications are closely met. SPICE results show that MDEA is a better technique for the optimal design of the above-mentioned VLSI circuits.

Multiple inputs multi-phase interleaved boost converter for fuel cell systems applications

In this paper, a three inputs six-phase Interleaved Boost Converter (IBC) is proposed and designed for Fuel Cell (FC) systems, where the different Polymer Electrolyte Membrane Fuel Cells (PEMFC) systems are employed to validate. Considering that the selected converter is composed of three two-phase IBCs connecting in parallel, it shows many superiorities in topology, such as simple structure, high scalability/flexibility, easy maintenance and good fault-tolerant ability. The whole design process containing the selection of phase numbers, parameters design of the converter's components and steady-state operations analysis is focused in this paper. To further validate the correctness of the designed converter, a test bench is established based on dSPACE1104, where the issue of the implementation of six-PWM signals from dSPACE1104 is analyzed and a feasible solution is proposed. Last, experimental results are shown by performing the load disturbance rejection, the variable reference voltage and the PEMFC system's failure based on the designed Double-Loop Super-Twisting Sliding Mode (DL-STSM) controller.

Design of intelligence‐based optimized adaptive fuzzy PID controllers for a two chamber microbial fuel cell

AbstractThe output voltage of microbial fuel cells (MFCs) needs to be controlled effectively to improve the operating efficiency of MFC system against the load variations, disturbances, and uncertainties. The output voltage control is purposed to provide the MFC with an appropriate amount of fuel required to maintain the stability of output voltage. In the applications, the MFC output voltage can be requested to track the variable reference voltage or to track the constant output voltage under changing conditions such as load change. For this purpose, two adaptive fuzzy PID (FPID) controllers powered by optimization algorithms were designed in this study to keep the output voltage value of the MFC at the desired values. This study extends the previous works by using optimization algorithms, such as particle swarm optimization (PSO) and gray wolf optimization (GWO) algorithms, to adjust fuzzy logic parameters, which are used for tuning Proportional‐Integral‐Derivative (PID) controllers. The optimization‐based adaptive FPID controllers play an active role in efficient, fast, and robust tracking of the reference voltage value with its adaptive structure. The designed adaptive control algorithms were tested under different cases, which involve the variation of the reference voltage and load conditions. The results show that both of these controllers can effectively control the output voltage of a MFC by regulating the flow rate of the fuel. In addition, the performances of the designed controller strategies according to the results obtained vary according to the reference signal. While PSO‐based FPID gives more successful results for positive step changes, GWO‐based FPID gives more successful results for negative step changes. These two control strategies show more efficient, robust, successful, and faster performances compared to the traditional PID controller.

A Low-Power and Wide Dynamic Range Digital Pixel Sensor for Intrinsic Optical Imaging in Image-Guided Neurosurgery and Neocortical Epilepsy

Purpose: Determining the borders of brain tumors, seizure foci, and their elimination in patients with brain tumors is very important in preventing cancer recurrence. Multispectral Optical Intrinsic Signal Imaging (MS-OISI) image-guided neurosurgery using visible-Near-Infrared (NIR) wavelengths have shown great potential for image-guided neurosurgery. One of the main challenges is the need for low-power consumption, high-speed and above 100dB dynamic range to capture both visible and NIR photons. The overarching goal of this work is to create a Digital Pixel Sensor (DPS) as a Complementary Metal-Oxide-Semiconductor (CMOS) camera for MS-OISI of the brain in image-guided neurosurgery that has a wide dynamic range, low power consumption, and high speed.
 Materials and Methods: The general view of neurosurgical system, DPS, and circuit operation of conventional Pulsed Frequency Modulation (PFM) DPS are given first. The proposed PFM DPS and circuit implementation are shown, as well as simulation results obtained using a circuit simulator. Finally, a comparison with other similar works is given.
 Results: The proposed pixel simulation results show that the performance parameters such as dynamic range and power consumption has improved in comparison to similar works. However, due to its complicated circuitry, it has a low spatial resolution, which can be compensated.
 Conclusion: The image sensor is post-layout simulated in 0.18μm CMOS technology with a 1.3V supply voltage, resulting in 140dB dynamic range and 7.69μW power dissipation with a 11% fill factor. The key novelty for the proposed PFM DPS is: in-pixel Analog-to-Digital Conversion (ADC), using a low voltage and high-speed dynamic comparator. Furthermore, this work uses a self-reset mechanism, which eliminates the need for an external pulse source, as well as variable reference voltage, which eliminates the necessity for a global constant reference voltage. All of these features demonstrate the excellent potential of the proposed pixel for MS-OISI image-guided neurosurgery.

Memetic SSA tuned fractional PSS for low frequency power system oscillations

Memetic salp swarm algorithm (MSSA) is proposed in the present work to optimally set the gains of fractional power system stabilizer (FPSS) for damping angular speed variation in power system. The optimization is based on the objective of minimizing variation in rotor angular frequency subject to disturbance which is change in reference voltage applied to generator. A single generator system connected with infinite bus has been experimented in this work for sudden and random variations in reference voltage applied to generator. The power system stabilizer (PSS) is based on fractional lead-lag control actions and MSSA is employed to tune the controller gains. Eigen values are analyzed with proposed control and MSSA has been compared with PSO (Particle swarm optimization) and salp swarm algorithm (SSA). It is observed from system response that MSSA can effectively tune the PSS parameters for oscillation damping subject to critical disturbances like random reference voltage variations.

Transformerless Grid Connected Control of Wind Turbine Based on H-MMC

A high-power wind turbine has low rotational speed and a relatively low terminal voltage level. Thus, the wind energy conversion system (WECS) is commonly connected to the grid by an isolated boost transformer, which increases costs and room greatly. In this article, the hexagonal modular multilevel converter (H-MMC) is applied so that the high-power wind turbine can be directly connected to the medium-voltage ac grid. It has the advantages of transformerless grid connection and low ripples of capacitor voltages. As the bridge arm voltage of H-MMC contains both the low-frequency component induced by a wind turbine and the power frequency component induced by the grid, the voltage ripples of submodules (SMs) are reduced. Due to the large differences in the voltage level between the wind turbine and the grid, the low-amplitude-modulation voltage of the wind turbine side is easily obliterated by the high-amplitude-modulation voltage of the grid side, which will cause distortion of the bridge arm current. Therefore, auxiliary SMs with variable reference voltage are adopted to improve the tracking accuracy. The MATLAB/Simulink simulation and the RT-LAB hardware-in-the-loop experimental results verify the feasibility of the proposed topology and the effectiveness of the control strategy.

A Resistorless Low-Power Voltage Reference Based on Mutual Temperature Cancellation of VT and VTH

In this paper, a novel resistorless CMOS voltage reference with a sub-one-volt power supply is proposed and simulated in 90 nm CMOS technology. The thermal voltage obtained from ∆VBE is converted into a current (I) proportional to the square of temperature (T2) using a deep triode MOSFET as a resistor. A linear positive temperature coefficient part of the circuit is built by applying this current through a diode-connected MOSFET. VTH is also used as a negative temperature coefficient part. The reference voltage is obtained from the proper combination of these two parts. The proposed circuit is designed in the sub-threshold region to reduce power consumption. Moreover, using bulk biasing and an array of MOSFETs, a trimming circuit is adopted to compensate for the process-related reference voltage variation. The nominal output voltage reference is about 0.5 V with a temperature coefficient of 25.4 ppm/oC over a temperature range of 0 oC to 100 oC. The power supply noise attenuation of 87.5 dB is achieved without any filtering capacitor below 23 Hz at 1 V of Vdd.

DC/DC Power Converter Control-Based Deep Machine Learning Techniques: Real-Time Implementation

The recent advances in power plants and energy resources have extended the applications of buck-boost converters in the context of dc microgrids (MGs). However, the implementation of such interface systems in the MG applications is seriously threatened with instability issues imposed by the constant power loads (CPLs). The objective is that without the accurate modeling information of a dc MG system, to develop a new adaptive control methodology for voltage stabilization of the dc–dc converters feeding CPLs with low ripples. To achieve this goal, in this letter, the deep reinforcement learning (DRL) technique with the Actor–Critic architecture is incorporated into an ultralocal model (ULM) control scheme to address the destabilization effect of the CPLs under the reference voltage variations. In the suggested control approach, the feedback controller gains of the ULM controller are considered as the adjustable controller coefficients, which will be adaptively designed by the DRL technique through online learning of its neural networks (NNs). It is proved that the suggested scheme will ensure the rigorous stability of the power electronic system, for simultaneous effects of CPL and reference voltage changes, by adaptively adjusting the ULM controller gains. To appraise the merits and usefulness of the suggested adaptive methodology, some dSPACE MicroLabBox outcomes on a real-time testbed of the dc–dc converter feeding a CPL are presented.

Assessment of MOV Deterioration under Energized Conditions

Metal oxide varistors (MOVs) are widely used to protect electrical and electronic devices that are very vulnerable to surges due to the low insulation level of the equipment. MOVs deteriorate gradually due to manufacturing defects, mechanical and thermal stress, or repeated protective operations against surges. These defects result in the thermal runaway of MOV and finally lead to the explosion and electric fire of electrical and electronic devices due to a short circuit and a line-to-ground fault. Therefore, the reliable assessment of the condition of MOV deterioration is required for electrical and electronic equipment. However, when most accelerated degradation tests for the MOV have been performed to date, an 8/20 μs standard surge current is applied under de-energized conditions, which is unlike the actual operating environment. In this study, a surge generator was designed to apply a surge current to MOVs to monitor their deterioration. Three different types of leakage currents were measured to analyze the change rates of their electrical characteristics of MOVs by comparing them with the reference voltage variation. Furthermore, the condition assessment of MOV deterioration under energized and de-energized conditions was investigated.

Modeling and simulation of SEPIC controlled converter using PID controller

<p>The topology of SEPIC "Single-ended primary inductance converter" is considered as a suitable option for automotive power system where the value of the output voltage should be ranging between the low and high values of the input value of voltage. The main feature of the DC-DC converter is the stability of output voltage. This paper shows the SEPIC converter employing PID converter to be used in industrial applications. A SEPIC DC-DC converter can manage either step-down mode or step-up mode. The benefit of using this circuit is to supply a stable and controlled output voltage no matter how much the input voltage is. The simulated behaviors of the uncontrolled and controlled SEPIC converter are presented in this paper. The PID controller based on bat algorithm (BA) optimization method is used for searching of the best Proportional–Integral-Derivative (PID) gains. The solution has given very good performance and whatever the output reference voltage variation and load disturbance of the system.</p>

A charge‐sharing analog‐to‐digital converter with embedded downconversion using a variable reference voltage

SummaryIn the field of radio receivers, downconversion methods usually rely on one (or more) explicit mixing stage(s) before the analog‐to‐digital converter (ADC). These stages not only contribute to the overall power consumption but also have an impact on area and can compromise the converter's performance in terms of noise and linearity. As an alternative, we propose a receiver architecture that considers the ADC as both a quantizer and a downconverter block. This is achieved through the use of a variable reference signal (in this case, a voltage), as opposed to classic time‐invariant reference signals. When embedded into a charge‐sharing (CS) successive approximation register (SAR) ADC, this varying reference voltage is “saved” in the digital‐to‐analog converter (DAC) capacitor bank during the sampling phase, preventing any conversion errors. Furthermore, a phase‐locked loop (PLL) is used in order to provide an on‐chip solution for the generation of this variable reference voltage, which also removes the need for dedicated bandgap circuits and reference buffers. Post‐layout simulations of an 8‐bit 50 MS/s CS‐SAR ADC show that the proposed “embedded mixing” technique is able to downconvert a high‐frequency signal while also increasing the effective resolution by around 0.5 bits, when compared with a standard DC reference voltage.

High Efficient Solar Integrated an Isolated Dc-Dc Full-Bridge Converter for Electric Vehicle Battery Charging Application

In this paper, the power from a solar PV panel 20VDC, 12.5ADC is used for charging an electric vehicle battery (12V, 7Ah) with the help of an isolated dc-dc converter in an efficient manner. The power rating maintained in the system is around (200-250) W. The parasitic circuit analysis is carried out theoretically. The zero voltage transition (ZVT) technique is implemented at the inverter stage and an isolation transformer (1:1) is used for source-load isolation purposes. In order to achieve ZVT, a proper design procedure is followed and a pulse triggering technique is carried out at the switching element. The designed values of the parasitic elements are used in the Simulink tool. The open loop and closed loop system of the proposed converter are simulated in MATLAB Simulink package. In the open loop system, an irradiation analysis carried out similarly closed loop has reference voltage variation analysis in order to verify the system stability at the various operating condition. The problem of transients in open loop output is rectified in the closed loop operation. The MPP and PI control technique is initiated in the closed loop system for better performance. The MPP technique used is incremental conductance method for tracking maximum power from the PV array.

Comparison of the Performance of Photovoltaic Power Generation-Consumption System with Push-Pull Converter under the Effect of Five Different Types of Controllers

In this study, a dynamic system has been modeled to efficiently use a photovoltaic generation and control system (PVGCS) for driving of a medium power off-grid electric machine. The measures have been taken to respond to three different disturbing factors in this system. First, the photovoltaic panels selected for energy generation have a variable solar radiation effect. Second, the DC motor load at the system output is assumed to have a variable torque. Third, a variable reference voltage, which is determined even in the case of time-varying energy generation and consumption of the system, is followed with minimum error. For this purpose, a push-pull converter has been chosen as a highly flexible structure since it is predicted that it can provide stable and effective variable DC voltage at increasing and decreasing level required for DC motor. The control of the DC voltage at different levels to be provided by the push-pull converter is performed by PI, fuzzy logic, fuzzy-tuned PI, 2-DOF PI, and fractional PID logic whose coefficients are selected by appropriate methods, respectively. The system efficiency and stability under the influence of these five different advanced controllers are compared. In the case of two disturbing factors affecting the system, the difference values (errors) of the voltage generated by each selected controller with the reference voltage are determined comparatively. The studies were carried out by using dynamic system modeling in MATLAB-SIMULINK software. In addition, the results of this study proved which type of controllers is more successful in controlling systems with the second order and more instability factors and which of them responds to sudden changes in errors more quickly.

Design of a sub-1V CMOS reference voltage generator

In this paper a low complexity, sub-1V, reference voltage generator with low voltage sensitivity over PVT variation and high power supply rejection ratio (PSRR) is proposed. It consists of a traditional bandgap reference core where resistors are used for generating both the PTAT and CTAT currents, which are then added forming a temperature-independent current. A new 1 V modified folded cascode operational amplifier is proposed and used in the main bandgap’s loop resulting in low offset, high loop gain and adequate loop phase margin of 58.9°. The loop consists of only two inverting stages and the circuit can be integrated entirely without the need of external large capacitors for frequency compensation. A regulated cascode current source is employed for accurately mirroring of the core temperature-independent current to a resistive load, where the reference voltage is generated. The proposed circuit was simulated in SPECTRE achieving an output reference voltage variation of 3.62%, without trimming, over process variation corners with ±10% variation of the 1 V power supply voltage and within the industrial temperature range, from −40 °C to 125 °C. The temperature coefficient from −40 °C to 125 °C is 6.81 ppm/°C at 1 V at the typical process corner. The PSRR at 1 Hz and the output RMS noise within a bandwidth of 100 MHz are −69.85 dB and 279 μV RMS, respectively, at the typical process corner, at a supply voltage of 1 V and temperature of 27 °C. Typical power consumption is 452 μA at 1 V.

Impulse current withstanding capability of ZnO varistors with influence of varistor size

Through injecting 8/20 and 30/60 μs impulse currents to five kinds of ZnO varistors, the influence of the varistor size on the single impulse current withstanding capability of a ZnO varistor is investigated in this article. A comprehensive damage criterion of a varistor consisting of three aspects, namely, mechanical failure by visual inspection, abnormal saltation in voltage or current waveform, and over 5% variation in reference voltage or leakage current >50 μA is proposed here. The diameters of the ZnO varistor under test vary from 42 mm to 60 mm, and the heights vary from 22 mm to 31 mm. The obtained results show that, under the same impulse current waveform, the mean voltage and the mean energy density of ZnO varistor increase approximately, proportionally with increasing amplitude of impulse current density. Besides, the voltage withstanding capability per unit height of varistor varies from 4.408 to 4.940 kV/cm under 8/20 μs impulse current, and from 4.256 to 5.148 kV/cm under 30/60 μs impulse current. The current withstanding capability per unit area of the varistor varies from 2.134 to 3.842 kA/cm2 under 8/20 μs impulse current, and from 1.738 to 3.490 kA/cm2 under 30/60 μs impulse current. Moreover, the energy withstanding capability per unit volume of the varistor ranges from 206 to 421 J/cm3 under 8/20 μs impulse current, and from 311 to 752 J/cm3 under 30/60 μs impulse current. Furthermore, due to the fact that nonuniformity of the polycrystalline‐sintered body of ZnO varistors increases with the increasing varistor area, the normalized parameters, including the mean failure voltage, the failure current density, and the failure energy density, decrease with increasing varistor diameters. The normalized parameters proposed here are more effective ones to consider the effect of sizes on the withstanding capacity than the failure current, the failure voltage, and the failure energy. © 2019 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.