Reduced Voltage Stress Research Articles

A review on modulation techniques of Quasi-Z-source inverter for grid-connected photovoltaic systems

Photovoltaic (PV) is a promising way to meet the increasing global energy demand due to its sustainability, efficiency, and cost-effectiveness. For the wide-scale adoption of PV systems, converters with reliable input sources, stable control strategies and appropriate modulation techniques must be designed. In the literature, various modulation techniques have been developed that help to boost the voltage of the PV modules by implementing shoot-through (ST) in which the upper and lower switches of an inverter conduct simultaneously and short-circuit occurs. Various optimised modulation techniques have been implemented to enhance its performance. Among those, the quasi-Z-source inverter (qZSI) has attracted much attention due to its ability to achieve higher conversion ratios for grid-connected PV applications. In this paper, a detailed comparison of the modulation schemes for the qZSI PV systems has been done to understand the trade-off and select the most suitable approach. Upon the selection of the space vector modulation with unique switching sequences and rearranging upper ST and lower ST states, the inverter can achieve ST with reduced switching losses. Furthermore, a 600 VA three-phase grid-connected system utilizing a three-level neutral-point-clamped qZSI topology is modulated and simulated. It has been demonstrated that the constant boost control offers good performance in terms of reduced voltage stresses on switches, lower total harmonic distortion, and hence, higher efficiency.

A novel interleaved BIFRED-Zeta with intelligent MPPT for PV applications

ABSTRACT The current energy perspective postulates profound presence of Renewable Energy Sources (RESs), resulting in need for optimal DC-DC converter design to assure efficient power conversion and minimise losses. By minimising energy losses and improving power quality, an optimal converter design helps ensure a stable and reliable power supply from RESs, which is essential for meeting the growing demand for clean energy. Therefore, this research introduces an innovative Interleaved BIFRED-Zeta converter configuration, designed to meet all criteria associated with an optimal converter design. The interleaved architecture of converter allows the reduction of current ripples and voltage stress along with the improvement of efficiency. Furthermore, the absence of transformer in converter structure enables it to be simple, cost effective and less bulky. The Interleaved Boost Integrated Flyback Rectifier Energy Storage DC-DC (BIFRED)-Zeta converter duty cycle is adjusted continuously using Cascaded Artificial Neural Network (ANN) Maximum Power Point Tracking (MPPT) to further maximise Photovoltaics (PV) system power output. The capability of suggested converter design is demonstrated by the results obtained using simulation and laboratory prototype implementation. Thereby, a peak efficiency of 97.6% is estimated to be achieved using suggested converter design.

Hybrid switched‐capacitor‐based boost DC–DC converter with reduced voltage stress

AbstractThis article presents the new hybrid switched‐capacitor (SC)‐based transformerless DC–DC converter with a high step‐up capability and common ground features. The proposed hybrid SC‐based converter provides low voltage stress across semiconductor devices to utilize MOSFETs with lower Rdson and low voltage ratings. In addition, the diodes in SC cells with low voltage stress can reduce the reverse recovery power loss of the converter. Thus, the overall efficiency of the proposed hybrid SC‐based converter can be increased. The converter circuit, operating principle, and design guidelines of the proposed hybrid SC‐based converter are discussed. To confirm the performance of the proposed hybrid SC‐based converter, a detailed comparison study with the conventional hybrid SC converter is also presented. Finally, a laboratory prototype with 200 W and 25 to 200 V is set up to verify the effectiveness of the proposed hybrid SC‐based converter.

Analysis and Design of Integrated Boost-Luo Converter With Reduced Voltage Stress for Renewable Application

Analysis and Design of Integrated Boost-Luo Converter With Reduced Voltage Stress for Renewable Application

Design of a high voltage gain converter using coupled inductor with reduced voltage stress for photovoltaic energy based systems

This paper presents the design and analysis of a high voltage gain converter utilizing a coupled inductor with reduced voltage stress, specifically for photovoltaic energy-based systems. The proposed converter employs a two-winding coupled inductor and voltage multiplier cells to achieve an increase in output voltage while mitigating voltage stress across semiconductor components. Additionally, the voltage multiplier cells function as voltage clamps for the power switch, further enhancing the converter's performance. The converter features a single switch design, which simplifies control, reduces cost, and improves reliability. Key advantages of the converter include a low component count, a common ground between input and output ports, and high efficiency. The converter's performance is thoroughly investigated through mode analysis and steady-state analysis. Comparative evaluations with similar converters are conducted to highlight the benefits and performance of the proposed design. To validate the theoretical analysis, a 125 W prototype with 26 V input and 200 V output voltages operating at a 50 kHz switching frequency is developed, and experimental results are presented, demonstrating the effectiveness and practicality of the proposed high voltage gain converter.

Modelling and Simulation of Crisscross Switched Multilevel Inverter Using Cascaded Semi-Half-Bridge Cells

A new cascaded multilevel inverter (MLI) is presented. This MLI aims to use a lesser number of switches, achieve better modularity, and reduce voltage stress. The new structure can operate in symmetric and asymmetric modes, producing all odd and even voltage levels. It comprises semi-half-bridge cells connected in series with crisscross switches to generate target voltage levels for synthesizing the sinusoidal output waveform. An extended version of the proposed MLI topology cascades sub-inverters to generate more voltage levels with reduced standing voltage. Compared to the cascading H-bridge topology, the proposed MLI and its extended version use fewer semiconductor switches. The MATLAB R2013b-based simulation results, confirm the efficacy of the proposed MLI topology.

Real-time harmonics optimization of seven level converter for megawatt scale solar PV-utility integration

This paper presents a new single photovoltaic (PV) array fed cascaded H bridge (CHB) submodule based three-phase 10 MW solar photovoltaic (SPV) plant for medium voltage utility applications. Each submodule comprises of a single PV array, cascaded H bridge cells and line frequency transformers. A 10 MW seven level converter based solar PV plant is realised with four submodules feeding solar PV array power to 33 kV grid. In megawatt scale multilevel converters based configuration, semiconductor switches experience reduction in voltage stress and requirement of high switching frequency for gating for switches is eliminated. Moreover, an efficient single stage MPPT based decoupled controller is implemented with genetic algorithm inspired fundamental frequency switching. GA based optimization technique is used to calculate optimal switching angles in offline mode. Obtained switching angles are incorporated to achieve closed loop optimized decoupled control of SPV system. Lower order harmonics are eliminated and power is fed to grid at enhanced power quality. This large scale PV system is modelled in MATLAB-Simulink and simulated results are validated in real time.

Hybrid high step-up DC-DC converter based on quadratic and switched capacitor cells with reduced voltage stress across the switches

ABSTRACT In this paper, a high step-up DC-DC converter with high voltage gain is proposed. The propounded converter has a non-isolated configuration with a miscellany of three infrastructures, namely a {R1–1} switched quadratic cell, a switched capacitor (SC) cell and an auxiliary switch. The use of {R1–1} switched quadratic cell and SC improves the voltage gain of the converter and also reduces the voltage stresses of semiconductors. {R2–5} By adding an auxiliary switch, one degree of freedom is added to the output voltage gain control. Meanwhile, the efficiency is ameliorated, especially for high voltage gains. The duty cycle of the suggested structure is not only limited to changes but also can include a wide range of changes. In addition, the propounded structure provides higher voltage gains at lower duty cycles. Also, the voltage stress of semiconductor elements is reduced compared to the structures based on switched inductor/capacitor and quadratic converters. The principle of operation and steady-state analysis are discussed in detail. Also, a laboratory prototype is built to validate claim made. The results indicate that the use of an auxiliary switch helps to progress the voltage gain.

A Novel High-Gain Switched-Capacitor Multilevel Inverter with Reduced Components for Grid Integration

This paper introduces a novel Multi-Level Inverter (MLI) design which utilizes a single input and leverages capacitor voltages source to generate a four-fold increase in output voltage as the main problem that stays with the inverters is their low boost ability and efficiency while maintaining power quality at the same time. One capacitor is charged to match the input voltage magnitude, while the other two capacitors store twice this magnitude. Through a series-parallel combination with switching operations, all capacitors are effectively charged and discharged within each cycle, ensuring natural voltage balance. A comprehensive comparative analysis is conducted to highlight the advantages of this innovative approach, particularly in terms of component reduction and mitigation of voltage stress. Detailed assessment of power losses within the proposed circuit is undertaken, simulation studies are first carried out while extensive experimentation verifies its operational efficiency under diverse conditions such as varying modulation indices, loads, and supply-side fluctuations with an impressive maximum efficiency of 96.9 % at a 200 W power rating, our research contributes to advancing compact power converters, addressing crucial challenges in modern power electronics applications, and paving the way for enhanced performance and reliability in such systems.

Enhanced Four-Level Active Nested Neutral Point-Clamped Inverter

The classical four-level nested neutral point-clamped (4L NNPC) inverter-leg is a hybrid of the flying-capacitor and diode-clamped 4L-inverter-leg configurations. Though uniform reduced voltage stress (1/3 of input voltage) on constituting switches is evident in the 4L NNPC inverter-leg, trails of the drawbacks of the diode-clamping concept still exist. With the significantly rated off-the-shelf IGBT switch modules (6.5 kV, 1200 A), chances of deployment of the newly evolved Four-Level Nested T-Type inverter (4L NTTI) in certain applications is high. Compared with the classical 4L NNPC inverter, 4L NTTI involves a smaller number of power switches and low conduction losses. However, in 4L NTTI, two of the six active switches have a blocking voltage rating of 2/3 of the input voltage. Considering this limiting topological feature in 4L NTTI, a six-switch inverter-leg for the four-level active neutral point-clamped (4L ANNPC) inverter is presented in this paper. In the proposed 4L ANNPC inverter-leg, only one switch has a voltage stress of 2/3 of the input voltage. This ameliorated voltage stress translates to low-cost and -loss inverter implementation. The operational characteristics and competitiveness of the 4L ANNPC inverter are analyzed in detail and demonstrated with a prototype.

Design and validation of a DC–DC converter-based inductive power transfer system with increased efficiency and reduced voltage stress across switches

Research in wireless power transfer(WPT) focuses on improving efficiency, reducing energy consumption, improving safety, and increasing sustainability. It prioritises developing more efficient transmission technologies, such as high-frequency switching and resonant coupling, to enhance the system’s overall performance. However, high voltage stress across the semiconductor devices during switching operations at high frequencies can result in increased switching loss, leading to decreased overall efficiency of the WPT system. The switching loss can be minimised by reducing voltage stress, resulting in higher efficiency and improved energy transfer performance. This leads to more cost-effective WPT solutions without compromising performance or reliability by using lower-rated components and reducing the need for elaborate voltage clamping and protection circuits. Lowering voltage stress across switches can also help WPT systems comply with industry standards and regulations related to electrical safety, electromagnetic compatibility (EMC), and energy efficiency. Meeting these standards is essential for ensuring the widespread adoption and commercial success of WPT technology. In this article, a class ø2 inverter and a modified class-E rectifier is integrated and applied in a WPT system. The benefits of a Resonant class ø2 inverter are zero voltage switching(ZVS) and lower switch voltage stress as compared to its predecessors. Also, a resonant class E/F3 rectifier inductively coupled in the receiving stage reduces the peak voltage stress across the diode. The system shown here is tuned to achieve maximum overall transfer efficiency. The proposed class ø2-E/F3 combined WPT system operating at 50 kHz simulated in PSIM software yielded a dc-dc efficiency of 94.56 percent, and the peak voltage stress across switches is found to reduced (2.4–2.7 times the input voltage as compared to the existing topologies where it surges upto 3.6–4 times the input voltage). These are also validated in Typhoon HIL’s Real-Time Emulator HIL402. In addition to that, a machine learning algorithm based on an Artificial Neural Network is used to generate a model to predict the switching frequency for a specified output voltage and efficiency.

Designing of self balancing amplitude modulated five level inverter for reducing voltage stress gradients on converter switches for electric vehicles

The research article endeavors to explore the efficient multi-quadrant operations in Electric Vehicles (EV), which emphasizing among the renewable sources and Energy Storage Management Systems (ESMS). This coordination is facilitated through the latest advancements in converter circuits, aiming to enhance efficiency and performance in EV operations. The primary converting circuit, or inverter, is crucial in optimizing the utilization of energy sourced from renewable sources. The coordination among these systems along with the converter, produces harmonics, due to the shifting of operating modes in EV motors in quick sessions because of dynamic real-time road conditions. This research paper presents the design and implementation of Self Balancing Modulated Five-Level Inverter along with a powerful modulation technique and coordinated with the ESMS of electric car application. The proposed 5-Level inverter shows the reduction in torque distortions in an electric vehicle drives over conventional two-stage boost inverter (2SBI) circuits. The designed Five-Level Inverter (FLI) circuit characterized by reduced switching operations, shows a significant reduction in voltage stress gradients on switches and achieves self-balancing of voltages with reduced operating components. The developed three-phase boost single circuit named as SBAM-FLI is connected to the grid integrated renewable energy application and the system is tested at constant and variable torque conditions. A comparative analysis is conducted between the operation of self-balancing modulated FLI with 2SBI based on the obtained results and power loss analysis is performed for the performance evolution in EV applications. The proposed topology is adaptable to both the Trapezoidal and Sinusoidal Back EMF drive mechanisms, which shows significant improvement over conventional inverters. The experimental validation of proposed self-balancing modulated FLI design is presented in this research. The experimental setup was realized using Xilinx block sets and seamlessly integrated with the Basys-3 Artix-FPGA board, consequently, both the experimental and simulation outcomes of the proposed converter topology were validated and provides substantial impact on EV applications.

Single Active Switch Hybrid Dual Diode-Capacitor Boost Converter With Reduced Voltage Stress for High Voltage Gain Applications

Single Active Switch Hybrid Dual Diode-Capacitor Boost Converter With Reduced Voltage Stress for High Voltage Gain Applications

Design and Validation of efficient Z source breaker with voltage stress reduction for DC Microgrid

Design and Validation of efficient Z source breaker with voltage stress reduction for DC Microgrid

A non-isolated extended voltage gain quadratic boost converter with reduced device voltage stress and continuous input current

ABSTRACT This article presents an improved model of a high voltage gain DC-DC converter topology. The voltage gain of the proposed topology is extended using a newly structured cascaded boost converter with voltage doubler cells along with the Super Luo structure in the network. The ultimate aim is to improve the output voltage gain of the proposed converter to a higher level with a lower duty cycle. Additionally, the design considerations minimize the voltage stress of the components (diodes, capacitors, and semiconductor switches) compared to the conventional topology. Moreover, the proposed topology ensures a continuous input current to the structure. Mathematical modeling is developed using steady-state analysis, and the results are analyzed using the MATLAB/Simulink. Finally, the proposed converter provides a high gain, that is, 10, at a lower duty cycle of 0.32 with reduced voltage stress on the components.

A Common Grounded Voltage Quadrupler ASL/PSC Hybrid Converter With Reduced Voltage Stress

Active switched inductor (ASL) dc-dc converters have very high step-up voltage gain but practically they suffer from high voltage stress across switches because of the resonance caused by the mismatch among the inductor values and switch parameters. This paper presents a new hybrid dc-dc converter topology derived from ASL and passive switched capacitors (PSC). The proposed topology has high step up voltage gain over wide range of duty cycle. The resonance due to mismatch of parameters is eliminated. The proposed converter has low voltage stress, low current stress on circuit elements and common ground between input and output ports. The circuit configuration, operating principle and steady state analysis of the proposed converter are presented. The key performance parameters are compared with that of other high-gain dc-dc converters. A 300W laboratory prototype is developed and experimental verification is carried out for the voltage step-up from 30V to 400V. The closed-loop operation is also verified experimentally and results are presented.

Dual‐input step‐up switched‐capacitor multilevel inverter with reduced voltage stress on devices

SummaryThis paper proposes a single‐phase dual‐input step‐up switched‐capacitor multilevel inverter that employs three capacitors, 15 switches, and two diodes to provide 13 voltage levels and triple‐voltage boosting factor in its symmetric form and 37 levels with voltage boosting factor of 3.6 in its asymmetric version. This high boosting factor is accomplished without utilizing any transformer. For each output voltage level, there exists flow paths for both the positive and negative load current directions, which makes the proposed inverter capable of supplying any load type with variety of power factors (zero to unity). The voltage balancing of the capacitors takes place naturally, which tackles the need to auxiliary charge‐balancing circuits or control mechanisms. The proposed inverter can generate negative levels without the end‐side H‐bridge. Moreover, the voltage stress on the semiconductor devices is less than the peak output voltage. The increased number of levels and sinusoidal‐like waveform of the output voltage waveform enhances the quality and lowers the harmonic content of the load voltage and current waveforms, even for resistive loads. As the result, the load‐side filter can be downsized or removed. This paper employs the fundamental frequency method (FFM) as the switching technique, which is simple to implement and also operates the switches at low frequencies, leading to lower switching losses. The ascendancy of proposed inverter over similar counterparts has been investigated through comprehensive comparative analysis. Moreover, the correct performance of the proposed inverter at different modulation indices, and load types as well as during dynamic load changes has been verified by simulation and experimental analysis.

Seven-Level Common-Ground-Type Inverter With Reduced Voltage Stress

Seven-Level Common-Ground-Type Inverter With Reduced Voltage Stress

Novel Space-Vector PWM Schemes for Enhancing Efficiency and Decoupled Control in Quasi-Z-Source Inverters

This paper investigates the development of pulse width modulation (PWM) schemes for three-phase quasi-Z-source inverters (qZSIs). These inverters are notable for their voltage boost capability, built-in short-circuit protection, and continuous input current, making them suitable for low-voltage-fed applications like photovoltaic or fuel cell-based systems. Despite their advantages, qZSIs confront challenges such as increased control complexity and a larger number of passive components compared to traditional voltage source inverters (VSIs). In addition, most existing PWM schemes for qZSIs lack the capability for independent control of the amplitude modulation index and duty cycle, which is essential in closed-loop applications. This study introduces innovative space-vector PWM (SVPWM) schemes, addressing issues of independent control, synchronization, and unintentional short-circuiting in qZSIs. It evaluates several established continuous and discontinuous PWM schemes, and proposes two novel decoupled SVPWM-based schemes that integrate dead time and in which the shoot-through occurrence is synchronized with the beginning of the zero switching state. These novel schemes are designed to reduce switching losses and improve qZSI controllability. Experimental validation is conducted using a custom-developed electronic circuit board that enables the implementation of a range of PWM schemes, including the newly proposed ones. The obtained results indicate that the proposed PWM schemes can offer up to 6.8% greater efficiency and up to 7.5% reduced voltage stress compared to the closest competing PWM scheme from the literature. In addition, they contribute to reducing the electromagnetic interference and thermal stress of the related semiconductor switches.

A New Smart Grid Hybrid DC–DC Converter with Improved Voltage Gain and Synchronized Multiple Outputs

This paper introduces a new hybrid DC–DC converter with enhanced voltage gain and synchronized multiple output capabilities, specifically tailored for smart grid applications. The proposed converter is based on the integration of non-isolated Zeta and Mahafzah converters, comprising a single controlled switch, two diodes, three inductors, and two coupling capacitors. The primary objective of this novel hybrid converter is to improve voltage gain as compared to conventional Zeta and Mahafzah topologies. By achieving higher voltage gain at lower duty cycles, the converter effectively reduces voltage stress on semiconductor switches and output diodes, thereby enhancing overall performance and reliability. A comprehensive examination of the hybrid converter’s operating principle is presented, along with detailed calculations of duty cycle and switching losses. The paper also explores the converter’s application in smart grids, specifically in the context of renewable energy systems and electric vehicles. Two distinct scenarios are analyzed to evaluate the converter’s efficacy. Firstly, the converter is assessed as a DC–DC converter for renewable energy systems, highlighting its relevance in sustainable energy applications. Secondly, the converter is evaluated as an electric vehicle adapter, showcasing its potential in the transportation sector. To validate the converter’s performance, extensive simulations are carried out using MATLAB/SIMULINK with parameters set at 25 kW, 200 V, and 130 A. The simulation results demonstrate the converter’s ability to efficiently supply multiple loads with opposing energy flows, making it a promising technology for optimized grid management and energy distribution. Moreover, the paper investigates the total harmonic distortion (THD) of the grid current, focusing on its impact in smart grid environments. Notably, the new hybrid converter topology achieves a THD of 21.11% for the grid current, indicating its ability to effectively mitigate harmonics and improve power quality. Overall, this research introduces a cutting-edge hybrid DC–DC converter that enhances voltage gain and synchronizes multiple outputs, specifically catering to the requirements of smart grid applications. The findings underscore the converter’s potential to significantly contribute to the advancement of efficient and resilient power conversion technologies for smart grids, enabling seamless integration of renewable energy systems and electric vehicles into the grid.