Reconfigurable Mesh Architecture Research Articles

On Enforced Convergence of ACO and its Implementation on the Reconfigurable Mesh Architecture Using Size Reduction Tasks

In this paper we show that size reduction tasks can be used for executing iterative randomized metaheuristics on runtime reconfigurable architectures so that an improved throughput and better solution qualities are obtained compared to conventional architectures that do not allow runtime reconfiguration. In particular, the problem of executing ant colony optimization (ACO) algorithms on a dynamically reconfigurable mesh architecture is studied. It is shown how ACO can be implemented such that the convergence behavior of the algorithm can be used to dynamically reduce the size of the submesh that is needed for execution. Furthermore we propose a method to enforce the convergence of ACO leading to a faster reduction process. This increases the throughput of ACO algorithms on runtime reconfigurable meshes. The increased throughput is used for repeated runs of ACO algorithms on a given set of problem instances which significantly improves the obtained solution quality.

A residue number system on reconfigurable mesh with applications to prefix sums and approximate string matching

Several new number representations based on a residue number system are presented which use the smallest prime numbers as moduli and are suited for parallel computations on a reconfigurable mesh architecture. The bit model of linear reconfigurable mesh with exclusive write and unit-time delay for broadcasting on a subbus is assumed. It is shown how to convert in O(1) time any integer, ranging between 0 and n-1, from any commonly used representation to any new representation proposed in this paper (and vice versa) using an n/spl times/O(log/sup 2/ n/log log n) reconfigurable mesh. In particular, some of the previously known conversion techniques are improved. Moreover, as a byproduct, it is shown how to compute in O(1) time the Prefix Sums of n bits by a reconfigurable mesh having the above mentioned size, thus improving previously known results. Applications to the Prefix Sums of n h-bit integers and to Approximate String Matching with /spl alpha/ mismatches are also considered. The Summation and the Prefix Sums can be computed in O(1) time using O(h log N+log/sup 2/ N/log log N)/spl times/Nh and O(h/sup 2/+log/sup 2/ N/log(h+log N))/spl times/O(N(h+log N)) reconfigurable meshes, respectively. Moreover, it is shown for the first time how to find in O(1) time all the occurrences of a pattern of length m in a text of length n, allowing less than /spl alpha/ mismatches, using a reconfigurable mesh of size O(m log|/spl Sigma/|)/spl times/O (n(log|/spl Sigma/|+log/sup 2/ /spl alpha//log log /spl alpha/)), where the pattern and the text are strings over a finite alphabet /spl Sigma/ and /spl alpha/<m/spl les/n.

Efficient VLSI architectures for Columnsort

This paper presents novel very large scale integration (VLSI) architectures in support of an efficient implementation of Leighton's well-known Columnsort. The designs take advantage of reconfigurable bus architectures enhanced with simple shift switches. Our first main contribution is to show that Columnsort can be partitioned into two components: a hardware scheme involving the task of sorting arrays of small size and a hardware or software scheme that involves simple data movement tasks. Our second main contribution is to demonstrate that the dynamically reconfigurable mesh architecture can be exploited to obtain a small and efficient hardware sorter. The resulting architectures feature high regularity of circuitry, simplicity of control structure, and adaptability. Both theoretical analyses and simulation tests have shown that the proposed VLSI architectures for sorting are superior to existing designs in the context of sorting small and moderate size arrays.

2D object recognition on a reconfigurable mesh

This paper presents an approach to recognizing two-dimensional multiscale objects on a reconfigurable mesh architecture with horizontal and vertical broadcasting. The object models are described in terms of a convex/concave multiscale boundary decomposition that is represented by a tree structure. The problem of matching an observed object against a model is formulated as a tree matching problem. A parallel dynamic programming solution to this problem is presented that requires O(max( n, m)) time on n × m reconfigurable mesh, where n and m are the sizes of the two trees.

Time-Efficient Maze Routing Algorithms on Reconfigurable Mesh Architectures

The routing problem is one of the most widely studied problems in VLSI design. Maze-routing algorithms are used in VLSI routing and robot path planning. Efficiency of the parallel maze routing algorithms which were mostly based on C. Y. Lee's algorithm8is poor. In this paper, we propose time-efficient algorithms to solve the maze-routing problem on a reconfigurable mesh architecture. The constant-time algorithms presented include: (i) testing the existence of specific types of paths between two terminals, and (ii) finding an absolute shortest path (ASP) and a shortest duplex-path (SDP). In addition, a fast algorithm to find the single shortest path (SSP) is presented. The simulation results indicate that a large percentage of the shortest paths that exist between two randomly selected terminals fall into one of the categories studied in this paper.

Connected component labeling for binary images on a reconfigurable mesh architecture

Abstract We show how some existing component labeling algorithms for binary images could be speeded up by using the reconfigurable mesh architecture. Two algorithms are presented, the first one uses the ability of the reconfigurable mesh to perform certain operations in constant time, and the second one uses a bottom-up divide-and-conquer strategy. Both these algorithms have run times that are logarithmic functions of the image size.

Interval Graph Problems on Reconfigurable Meshes

A graph G is an interval graph if there is a one-one correspondence between its vertices and a family I of intervals, such that two vertices in G are adjacent if and only if their corresponding intervals overlap. In this context, the family I of intervals is referred to as an interval model of G. Recently, a powerful architecture called the reconfigurable mesh has been proposed: in essence, a reconfigurable mesh consists of a mesh-connected architecture augmented by a dynamically reconfigurable bus system. In this paper, we exploit the reconfigurable mesh architecture for the purpose of obtaining constant-time algorithms for a number of computational problems on interval graphs. These problems include finding a maximum size independent set, a minimum clique cover, a minimum size dominating set, a shortest path between any two vertices in G, the diameter and the center of G, as well as Breadth-First Search and Depth-First Search trees for G. Specifically, with an n-vertex interval graph specified by its interval model as input, all our algorithms run in constant time on a reconfigurable mesh of size n × n. INFORMS Journal on Computing, ISSN 1091-9856, was published as ORSA Journal on Computing from 1989 to 1995 under ISSN 0899-1499.

Constant-Time Tree Algorithms on Reconfigurable Meshes on Size n × n

Recently, an elegant and powerful architecture called the reconfigurable mesh has been proposed in the literature. In essence, a reconfigurable mesh consists of a mesh-connected architecture enhanced by the addition of a dynamic bus system whose configuration changes in response to computational and communication needs. In this paper we show that the reconfigurable mesh architecture can be exploited to yield very simple constant-time algorithms to solve a number of important computational problems involving trees. Specifically, we address the problem of generating the computation tree form of an arithmetic expression, the problem of reconstructing a binary tree from its preorder and inorder traversals, and the problem of reconstructing an ordered forest from its preorder and postorder traversals. We show that with an input of size n, all these problems find constant-time solutions on a reconfigurable mesh of size n × n.