Rapid Thermal Processing Conditions Research Articles

Well structure engineering to improve the responsivity of p-on-n SiPM developed at KAIST-NNFC

This paper describes the electrical and optical properties of the p-on-n silicon photomultiplier (SiPM) developed at KAIST-NNFC. In particular, we present a comparison of the new and old versions in terms of several SiPM characteristics to highlight the improvements achieved through internal structure engineering. The new-version sensors were fabricated on a 200 mm n-doped epitaxial silicon wafer with an abrupt p+/n junction structure identical to that used in the old-version sensors using 0.18μm CMOS technology. Based on the previous work, several changes were applied to the improved sensors, such as rapid thermal processing (RTP) conditions and ion implantation conditions for junction formation. In the work, we demonstrate that the reverse current is reduced by more than a factor of 104 with the modified RTP conditions. Furthermore, we show that the breakdown voltage is decreased by nearly 20% and the PDE in the blue-light regime is enhanced by nearly a factor of two as a result of internal structure engineering.

Effect of rapid thermal processing conditions on the properties of Cu2ZnSnS4 thin films and solar cell performance

In the present work, we have studied the effect of several sulphurization conditions on the properties of Cu2ZnSnS4 thin films obtained through rapid thermal processing (RTP) of multi-period precursors with 8 periods of Zn/SnS2/CuS. In this study we varied the heating rate, the maximum sulphurization temperature, the time at maximum temperature and the amount of evaporated sulphur. The samples were characterized through scanning electron microscopy, energy dispersive spectroscopy, Raman scattering spectroscopy, X-ray diffraction, photoluminescence and I–V measurements. We have observed that at heating rates above 0.5°C/s the samples delaminated severely. As a result further tests were carried out at 0.2°C/s heating rate. The morphological studies revealed that the samples sulphurized at higher temperatures, shorter times and higher amount of evaporated sulphur exhibited larger grain sizes. The structural analysis based on Raman scattering and XRD did not lead to a clear distinction between the samples. Photoluminescence spectroscopy studies showed an asymmetric broad band characteristic of CZTS, which occurs in the range of 1.0–1.4eV and a second band, on the high energy side of the previous one, peaking at around 1.41eV. The intensity of this latter band varies from sample to sample revealing substantial differences in their optical properties. This band appears to originate either from the surface of the absorber or from the CdS layer and has a clear correlation with cell efficiency. The higher the intensity of this band the lower the cell efficiency, presumably due to the increase in recombination resulting from CZTS surface decomposition and eventually from the CdS with modified optoelectronic properties. The cell results hint toward a detrimental effect of long sulphurization times and a positive effect of higher sulphur vapour pressure and higher sulphurization temperature. Solar cell efficiencies improved with increased grain size in the absorber layer. The highest cell efficiency obtained in this study was 3.1%.

Effects of rapid thermal process on the junction properties of aluminum rear emitter solar cells

N-type silicon with aluminum emitters for rear junctions was studied; aluminum back surface fields were replaced with n-type silicon wafers. Aluminum rear emitters for n-type silicon solar cells were studied with various rapid thermal processing conditions. With fast ramping-up and fast cooling, an aluminum rear junction was formed uniformly with low emitter recombination current. The effects of junction quality on solar cell efficiency were investigated.

Ni fully silicided gates for 45 nm CMOS applications

The Ni silicide phases and morphology in Ni fully silicided gates was investigated for varying deposited Ni to Si thickness ratios and rapid thermal processing conditions. The presence of NiSi 2, NiSi, Ni 3Si 2, Ni 2Si, Ni 31Si 12 and Ni 3Si as predominant phases was observed for increasing Ni to Si thickness ratios. In most samples, typically two of these phases were detected by X-ray diffraction. No secondary phases were detected on Ni 3Si samples (Ni to Si thickness ratio ∼1.7). For samples targeting NiSi as gate electrode, RBS and TEM analysis confirmed a layered structure with NiSi at the interface and a Ni-rich silicide layer (Ni 2Si, Ni 3Si 2) on top. Process conditions were determined for the formation of gate electrodes for NiSi, Ni 2Si and Ni 3Si. Only small changes in flat-band voltage or work function were found between these phases on SiO 2 or SiON for undoped samples. While significant changes in work function with dopants were observed for NiSi on SiO 2, little or no effects were found for NiSi on HfSiON (suggesting Fermi-level pinning) and for Ni 2Si on SiO 2. An increase of >300 mV was found from NiSi to Ni 3Si on HfSiON, suggesting unpinning of the Fermi level with the Ni-rich silicide.

Moisture Instability of Borophosphosilicate Glass and the Effects of Thermal Treatment

Borophosphosilicate glass films deposited by tetraethoxysilane‐ozone chemical vapor deposition are highly susceptible to atmospheric moisture absorption. Moisture diffuses into these oxides through the exposed surface and incorporates itself as surface adsorbed water, silanol, and phosphorous dihydroxide. Thermal treatments dehydrate the glass matrix by (i) driving off surface adsorbed water, (ii) causing pairs of silanol groups to react to form silicon dioxide, and (iii) causing doubly hydroxylated phosphorous atoms to form phosphorous‐oxygen double bonds. The residual stress and thickness of as‐deposited films change rapidly over time due to the moisture instability whereas these properties are stable in furnace densified films. Films treated under various rapid thermal processing conditions (temperatures from 700 to 900°C and times from 10 to 50 s) are chemically similar to each other but have different physical properties depending on the specific conditions of the cure. The degree of chemical and physical change that takes place in these films over time also depends on the specific cure conditions. Phosphorous hydration plays an important role in these changes which correlate more strongly with the cure temperature than the cure time. For all of the cure conditions studied, the postcure film density is a consistently good predictor of the subsequent film stability.

Depth profiling of Co/Ti – silicide films using total reflection X-ray fluorescence (TXRF) spectrometry combined with low energy ion beam etching (IBE) for sample preparation

Solid state phase epitaxy (SSPE) by rapid thermal processing (RTP) of Co/Ti double layers deposited on (100)-Si substrates is a common technique for the production of buried CoSi2-silicide conducting layers for microelectronics technology. The understanding of the processes during the SSPE silicide formation on the atomic scale needs the study of the elemental depth distributions with nanometer scale depth resolution of all multi-layer elemental constituents at different RTP conditions. A new experimental technique, the laterally resolved TXRF analysis line scan method across the bevelled section of the sample prepared by ex-situ ion beam sputter etching, was used to obtain the multi-element depth profiles. First results on the as evaporated Co/Ti (30 nm thick) double layer system prior to the RTP and on the final CoSi2/TixCoySiz-system (160 nm thickness) after the RTP were obtained.

Metal Alloy Characteristics in Rapid Thermal Process System Using a Tungsten Halogen Lamp

A rapid thermal processing (RTP) system operated below 500°C has been designed and constructed. It uses an optical pyrometer for measuring wafer temperature, in the sensing range from 2.0 µm to 2.4 µm. To remove the interference effect of IR emitted from lamps, an IR filter which uses water is adopted. The electrical characteristics of an alloy after RTP are superior to those of an alloy processed in a conventional furnace, from in the viewpoint of junction spiking, contact resistance and pn diode characteristics. The optimal RTP conditions for aluminium alloy is 425°C for 10 s. The reverse leakage current (at V=5 V) after RTP decreases from 44.9 nA/cm2 to 29.3 nA/cm2 in the p+n diode. Also, in the n+p diode, the leakage current decreases from 122 pA/cm2 to 85.3 pA/cm2.

Electrical and Physical Characterization of Tetraethylorlthosilicate‐ O 3 Borophosphosilicate Glass

The reflow properties of tetraethylorthosilicate‐ (TEOS‐) borophosphosilicate glass (BPSG) under furnace and rapid thermal processing conditions that we have studied show good void‐free, subquarter micron gapfill, and planarization. Thick BPSG films on reflow exhibit positive charge buildup at the oxide/Si interface that cause a shift in the flatband voltage. The amount of phosphorous in the BPSG film, the BPSG film thickness, and the BPSG deposition temperature determine the extent of this flatband shift. We observed a linear correlation of the flatband shift and the amount of carbon migration and pileup at the oxide/Si interface during reflow. Using current‐voltage, triangular voltage sweep, and secondary ion mass spectroscopy and field threshold voltage measurements, we demonstrate that under appropriate deposition conditions the flatband shift can be brought to negligible levels.

Rapid thermal diffusion of aluminum in silicon and its interaction with phosphorus

Aluminum diffusion profiles in silicon were produced under rapid thermal processing conditions using a Si-sandwich structure to avoid losses of aluminum by reaction with the quartz reactor. The impact of phosphorus on the diffusion behaviour of aluminum was investigated by predeposition of P into Al-diffused wafers and vice versa. Dopant profiles were determined by SIMS (Secondary-Ion-Mass Spectroscopy), electrochemical CV-and SRP (Spreading Resistance) analysis. The resulting profiles after Al predeposition at 1293 K exhibit high Al-surface concentrations up to the solid solubility limit of about 2×1025 m−3. It is shown that phosphorus has a great influence on the drivein behaviour of Al, leading to an accelerated Al diffusion in front of the P profile (enhanced Al diffusion caused by self-interstitial supersaturation) and an “up-hill migration” of Al in the high-concentration regime, which can be explained by field-assisted diffusion. A strong retardation of aluminum diffusion combined with concentrations well above the solidsolubility limit was observed during the Al predeposition into P-diffused wafers.

Rapid Thermal Oxidation of Heavily Doped Silicon for Advanced Solar Cell Processing

AbstractCrucial steps in solar cell processing such as emitter diffusion and surface oxide passivation have been carried out by rapid thermal processing (RTP). Rapid thermal diffusion (RTD) of boron into silicon from APCVD borosilicates has been studied. Rapid thermal oxidation (RTO) of the heavily B-doped surfaces of these shallow junctions (0.2 μm) has been studied in view of applicability of this technique in solar cell processing. These shallow diffusions have excellent lateral uniformity over large areas and have high surface concentrations depending on the APCVD deposition conditions and on RTP conditions. The surface passivating oxides resulting from the RTO are exceptionally thick in case of heavy boron diffused surfaces. RTO does not cause considerable drive-in of the diffused junction profiles. In the contrary, the thick RTO oxides considerably reduce the surface concentration, thereby reducing the heavy doping effects in the junctions, making them more suitable emitters for devices such as solar cells. p+nn+ solar cells have been fabricated on n-type CZ silicon wafers by RTD of boron followed by RTO. The cells result in conversion efficiencies as high as 16.2% The passivation effect of RTO oxides have been investigated by analysing RTO MOS capacitors and are compared to conventional furnace oxides.

Influence of Rapid Thermal Processing Conditions on the Characteristics of Sputter Deposited Titanium Nitride Thin Films

ABSTRACTSputter deposited TiN films are commonly used as diffusion barriers for an aluminum based metallization and as glue layers for tungsten films in ULSI device processing. TiN is also used in conjunction with Ti and/or a-Si for local interconnect and salicide processing. For the above applications, TiN films are also subjected to rapid thermal processing.This paper discusses these applications focusing on sub-half micron technologies where high aspect ratio contacts causes poor step coverage at the base of the contacts and compact design rule requirements pose an additional burden to Ti-silicide processes. Preferred grain orientation, microroughness, film stress, sheet resistance, diffusion barrier qualities and analytical spectroscopy techniques have been used to characterize the material modifications by RTP of Ti and Ti/TiN thin films.

Ripple Technique; a Novel Non-Contact Wafer Emissivity and Temperature Method for RTP

AbstractA novel wafer temperature and emissivity measurement technique for rapid thermal processing (RTP) is presented. The ‘Ripple Technique’ takes advantage of heating lamp AC ripple as the signature of the reflected component of the radiation from the wafer surface. This application of Optical Fiber Thermometry (OFT) allows high speed measurement of wafer surface temperatures and emissivities. This ‘Ripple Technique’ is discussed in theoretical and practical terms with wafer data presented. Results of both temperature and emissivity measurements are presented for RTP conditions with bare silicon wafers and filmed wafers.

A combination of rapid thermal processing and photochemical deposition for the growth of SiO2 suitable for InP device applications

A combination of ultraviolet and infrared lamps is used to obtain the growth of SiO2 on InP substrates at low temperature under rapid thermal processing conditions. Thorough infrared spectroscopy characterization of the dielectric layers shows that the ultraviolet-assisted growth process without mercury sensitization leads to good quality silica interspersed with oxygen-deficient inclusions. Rapid annealing improves them so as to be suitable for InP-based field-effect devices, with interface trap density around 5×1011 cm−2. A study of the interface trap density made with this technique shows the relevance of fast thermal processing, even at low growth temperatures, for the improvement of these devices.

The effects of dopant and impurity redistributions on WSi2 formation by rapid thermal processing

Thin-film samples of WSi2 were formed by sputter depositing tungsten metal directly onto chemically etched, p-type, B-doped, 5 Ω cm Si(100) wafers, followed by rapid thermal processing (RTP) in high vacuum at temperatures over 1100 °C. The resulting dopant and impurity elemental redistributions are studied by secondary ion mass spectroscopy. Boron, initially present both at the W/Si(100) interface as an impurity and in low concentration in the Si substrate, diffuses into the growing WSi2 film, eventually escaping into the vacuum. It is shown that RTP can be used to form high-quality, low-resistivity (∼30 μΩ cm) WSi2 films without total dopant out-diffusion. Oxygen is the major impurity in these samples and is gettered at the metal/Si(100) interface during RTP from the vacuum ambient. Removal of this interfacial oxide is needed for the growth of uniform, low-resistivity silicide films and can be done with RTP. Trace quantities of F, Cl, Na, K, C, and Cr have also been detected. Their origin and movement through the growing silicide films are also monitored as a function of RTP conditions.

Ultra-Shallow Diffused Emitter-Base Profiles Fabricated by Rapid Thermal Processing for High Speed Bipolar Devices

ABSTRACTThe development of next-generation high-speed bipolar devices depends critically on reproducible shallow dopant profiles, with base and emitter widths considerably less than 1000 Angstroms. Sequential diffusion of boron and arsenic from implanted polysilicon is a promising means of producing such shallow emitter-base profiles. The restricted thermal budget required to reproducibly form such shallow junctions severely limits the use of conventional furnaces. We report the formation of extremely shallow emitter-base profiles using rapid thermal processing (RTP) in a double-diffused polysilicon emitter process. Polysilicon was implanted with various doses of BF2 and subjected to a conventional furnace anneal at 900ºC. This process was followed by As implantation and furnace anneal at 900ºC or RTP at 10500C or 1100ºC. A range of emitter-base profiles was generated with emitter and base widths ranging from 350-800A. Emitter-base profiles were measured using low-energy Secondary Ion Mass Spectrometry (SIMS), after removal of the polysilicon to improve depth resolution. Deconvolution of the instrumental broadening function allowed extraction of base and emitter widths as well as the boron concentration in the base. Variation of the profiles is discussed as a function of anneal times and implant dose. Modified SUPREM III parameters are obtained for diffusivities under these RTP conditions. The implications for high speed bipolar device fabrication will be presented.

The Behavior of Polysilicon Thin Film Stress and Structure Under Rapid Thermal Processing Conditions

AbstractUndoped polysilicon layers deposited at 620 °C onto a silicon wafer induce a compressive stress of approximately 1 × 109 dynes/cm2 resulting in a bow of the wafer. This stress can be relieved by rapid annealing at temperatures above 1000 °C. A comparison with conventional furnace annealing reveals that the stress relaxation is a weak function of time and strongly depends on temperature. Rapid thermal processing also causes immediate rearrangement of the film structure, as observed by X-ray diffraction. Although both stress and film texture change with annealing, no conclusive relationship is observed.

Variations of electron traps in bulk n-GaAs by rapid thermal processing

Rapid thermal processing (RTP) using halogen lamps for liquid encapsulated Czochralski grown GaAs doped with Si has been studied by deep-level transient spectroscopy, capacitance-voltage, and photoluminescence measurements. RTP is performed at 700, 800, and 900 °C for 6 s with and without SiO2 encapsulation. Three electron traps ED1(Ec −0.26 eV), ED2(Ec −0.49 eV), and ED3(Ec −0.55 eV) are produced depending on RTP conditions. The trap ED1 is observed in all RTP samples, and its depth profiles vary with RTP conditions. The decrease of the shallow donor concentration occurs for RTP samples above 800 °C, especially for those without encapsulation. It is thought that these results, which are peculiar to the RTP method, are related to the production of As interstitials and As vacancies by the large thermal stress induced by the rapid heating for RTP. The decrease of the concentration of trap EL2(Ec −0.81 eV) is not observed with RTP as reported in the furnace processing. This is due to the effect of the short-time processing of RTP.

Structural and Electrical Properties of Heavily-Doped Rapid-thermal-Processed Polysilicon Emitters and Contacts on Silicon

ABSTRACTSupersaturated high-conductivity polycrystalline silicon (polysilicon) formed by rapid thermal processing (RTP) is a promising new material for emitters, contacts and diffusion sources in advanced high-speed bipolar and MOS IC technologies.A matrix of processing conditions was used to evaluate the effect of polysilicon thickness, implant dose, RTP conditions and the nature of the substrate on the dopant diffusion in both the polysilicon and single crystal substrate and also on the interface properties.Results of conductivity measurements, spreading resistance profiling (SRP), secondary ion mass spectroscopy (SIMS), transmission electron microscopy (TEM) and Rutherford backscattering spectroscopy (RBS)/channeling are presented. The results have proved the formation of shallow, defect-free junctions and epitaxial emitters with low series resistance and improved contact properties.

Rapid Thermal Annealing of Ni/Al/Si and Ni/Si Systems

AbstractThe effect of Rapid Thermal Annealing on phase formation and diffusion processes in the Ni(30 nm) /Al(10 nm)/Si system was studied and coxpared to a Ni(30 nm)/Si reference system. Heat treatments were carried out at temperatures between 400°C and 900°C for 2 seconds.The results obtained by means of TEM, AES and XRD indicated that the Ni/Al/Si system underwent a local melting in the intermediate Al layer at the Al/Si eutectic temperature (577°C). This reaction, due to the rapid melting process, resulted in formation of a unique layered-structure composed of a columnar polycrystalline layer (60 nm thick) of Ni2Si and NiSi adjacent to the Si substrate with relatively smooth interface and an outer layer of two separate polycrystalline films (both about 10 m thick) of Al3Ni (inside) and Ni(Al0.5Si0.5 ) (outside). Under the same rapid thermal processing conditions the Ni/Si reference system underwent a solid state reaction which resulted in the formation of a polycrystalline layer (60 nm thick) composed of Ni2Si and NiSi as well as NiSi2.

Activation and redistribution of implanted P and B in polycrystalline Si by rapid thermal processing

Rapid thermal processing (RTP) allows electrical activation of implanted semiconductors to be carried out at high temperature in times so short (∼10 s) that minimal dopant redistribution occurs. Use of RTP to activate implanted species in single-crystal Si is well documented, but relatively little has been reported for poly-Si. In this paper, we present measurements on 0.4 μm thick poly-Si films implanted with n-type (31P+) or p-type (11B+) dopants. RTP was carried out in vacuo (∼1×10−5 Torr) by exposing samples for 5–30 s to the blackbody radiation of a graphite heater at 1150–1300 °C. Dopant activation and redistribution following RTP was measured by spreading resistance and four-point probe. In poly-Si, unlike similarly implanted and rapidly annealed single-crystal Si, we find considerable redistribution for both dopants. For P, significant dopant loss occurred from the uncapped poly-Si surface; however, a thin (600 Å) SiO2 cap prevented this outdiffusion. For B, on the other hand, uncapped poly-Si surfaces exhibited minimal dopant loss. The time evolution of carrier concentration profiles depended both on implant dose and RTP conditions.