Radiation-induced Threshold Voltage Shift Research Articles

Research for radiation-hardened high-voltage SOI LDMOS

Based on the silicon-on-insulator (SOI) technology and radiation-hardened silicon gate (RSG) process, a radiation-hardened high-voltage lateral double-diffused MOSFET (LDMOS) device is presented in this paper. With the gate supply voltage of 30 V, the LDMOS device has a gate oxide thickness of 120 nm, and the RSG process is effective in reducing the total ionizing dose (TID) radiation-induced threshold voltage shift. The p-type ion implantation process and gate-enclosed layout topology are used to prevent radiation-induced leakage current through a parasitic path under the bird's beak and at the deep trench corner, and the device is compatible with high-voltage SOI CMOS process. In the proposed LDMOS, the total ionizing dose radiation degradation for the ON bias is more sensitive than the OFF bias. The experiment results show that the SOI LDMOS has a negative threshold voltage shift of 1.12 V, breakdown voltage of 135 V, and off-state leakage current of 0.92 pA/μm at an accumulated dose level of 100 krad (Si).

Analysis of TID Process, Geometry, and Bias Condition Dependence in 14-nm FinFETs and Implications for RF and SRAM Performance

Total ionizing dose results are provided, showing the effects of different threshold adjust implant processes and irradiation bias conditions of 14-nm FinFETs. Minimal radiation-induced threshold voltage shift across a variety of transistor types is observed. Off-state leakage current of nMOSFET transistors exhibits a strong gate bias dependence, indicating electrostatic gate control of the sub-fin region and the corresponding parasitic conduction path are the largest concern for radiation hardness in FinFET technology. The high- $V_{\textit {th}}$ transistors exhibit the best irradiation performance across all bias conditions, showing a reasonably small change in off-state leakage current and $V_{\textit {th}}$ , while the low- $V_{\textit {th}}$ transistors exhibit a larger change in off-state leakage current. The “ worst-case” bias condition during irradiation for both pull-down and pass-gate nMOSFETs in static random access memory is determined to be the on-state ( $V_{\textit {gs}}=V_{\textit {dd}}$ ). We find the nMOSFET pull-down and pass-gate transistors of the SRAM bit-cell show less radiation-induced degradation due to transistor geometry and channel doping differences than the low- $V_{\textit {th}}$ transistor. Near-threshold operation is presented as a methodology for reducing radiation-induced increases in off-state device leakage current. In a 14-nm FinFET technology, the modeling indicates devices with high channel stop doping show the most robust response to TID allowing stable operation of ring oscillators and the SRAM bit-cell with minimal shift in critical operating characteristics.

Total Ionizing Dose (TID) Effects in Ultra-Thin Body Ge-on-Insulator (GOI) Junctionless CMOSFETs With Recessed Source/Drain and Channel

Total ionizing dose (TID) effects in ultra-thin body Ge on Insulator (GOI) junctionless CMOSFETs with recessed source/drain and channel have been studied. 10-keV X-ray irradiation leads to net hole trapping at the top and bottom Ge/dielectric interfaces of both GOI NFETs and PFETs. The Ge channel thickness and post-oxidation processing can strongly affect the radiation response. Application of negative back-gate bias can moderate the radiation-induced threshold-voltage shifts.

Local Electro-Thermal Annealing for Repair of Total Ionizing Dose-Induced Damage in Gate-All-Around MOSFETs

A shift in threshold voltage caused by total ionizing dose (TID) is problematic in the MOSFET, especially in aerospace applications. Unlike traditional methods to minimize damage from TID, in this letter, a novel electro-thermal annealing method to cure the TID-induced damage is demonstrated for the first time. In this concept, the conventional hardening or shielding techniques are not used. In a gate-all-around MOSFET structure, dual gate electrodes were employed as an embedded nanowire heater to generate localized Joule heat, which can anneal insulating layers, including gate oxide and spacer. With the Joule heat, trapped positive charges produced by the TID were neutralized within 200 ms. A damaged device with a radiation-induced threshold voltage shift was repaired to the level of a fresh pristine device.

Using RADFET for the real-time measurement of gamma radiation dose rate

RADFETs (RADiation sensitive Field Effect Transistors) are integrating ionizing radiation dosimeters operating on the principle of conversion of radiation-induced threshold voltage shift into absorbed dose. However, one of the major drawbacks of RADFETs is the inability to provide the information on the dose rate in real-time using the conventional absorbed dose measurement technique. The real-time monitoring of dose rate and absorbed dose can be achieved with the current mode dosimeters such as PN and PIN diodes/photodiodes, but these dosimeters have some limitations as absorbed dose meters and hence they are often not a suitable replacement for RADFETs. In that sense, this paper investigates the possibility of using the RADFET as a real-time dose rate meter so that it could be applied for simultaneous online measurement of the dose rate and absorbed dose. A RADFET sample, manufactured by Tyndall National Institute, Cork, Ireland, was tested as a dose rate meter under gamma irradiation from a Co-60 source. The RADFET was configured as a PN junction, such that the drain, gate and source terminals were grounded, while the radiation-induced current was measured at the bulk terminal, whereby the bulk was successively biased with 0 , 10 , 20 and 30 V. In zero-bias mode the radiation-induced current was unstable, but in the biased mode the current response was stable for the investigated dose rates from 0.65 to 32.1 Gy h−1 and up to the total absorbed dose of 25 Gy. The current increased with the dose rate in accordance with the power law, whereas the sensitivity of the current read-out was linear with respect to the applied bias voltage. Comparison with previously analyzed PIN photodiodes has shown that the investigated RADFET is competitive with PIN photodiodes as a gamma radiation dose rate meter and therefore has the potential to be employed for the real-time monitoring of the dose rate and absorbed dose.

Total ionizing dose effect in 0.2 μm PDSOI NMOSFETs with shallow trench isolation

This paper presents the total ionizing dose radiation performance of 0.2μm PDSOI NMOS devices under different bias conditions. The hump effect is observed in the transfer characteristic of the back gate device instead of the front gate device after radiation. A STI bottom corner parasitic transistor model is proposed to explain this phenomenon. It also provides a simple way to extract the effective sheet charge density along the STI sidewall. Three-dimensional simulation was applied to explain the radiation effect. It shows that charge trapped in the shallow trench isolation, particularly at the bottom region of the trench oxide where the STI and the BOX are connected, is the dominant contributor to the off-state drain-to-source leakage current. The dimension of the transistor plays an important role on influencing the device’s performance after radiation. Larger off-state leakage current and radiation induced threshold voltage shift are reported in the narrow channel device than in the wide channel one. Different TID responses due to the STI process variation are also discussed.

Total ionizing dose effects on n-channel metal oxide semiconductor transistors with annular-gate and ring-gate layouts

Two-edged-gate, annular-gate and ring-gate N-channel metal oxide semiconductor (NMOS) transistors with two different values of gate oxide thickness (tox) are fabricated in a commercial 0.35 m complementary metal oxide semiconductor (CMOS) process. The tests for the total ionizing dose (TID) effects of the transistors are carried out with a total dose up to 2000 Gy(Si). The results show that the dependence of radiation-induced threshold voltage shift on tox is larger than the power-law tox3. The TID tolerance of the low voltage NMOS (tox=11 nm) is improved from 300 Gy(Si) to over 2000 Gy(Si) by the annular-gate or ring-gate layout. For the high voltage NMOS (tox=26 nm), the annular-gate or ring-gate layout can only mitigate the growth of the off-state leakage current when the total dose is less than 1000 Gy(Si). As radiation hardening techniques, the annular-gate and ring-gate layouts have similar effects, but the annular-gate layout is slightly more effective in terms of the radiation-induced threshold voltage shift and off-state leakage current increase. The test results are theoretically explained by examining and analyzing the experimental data.

A comparison of ionizing radiation damage in CMOS devices from 60Co gamma rays, electrons and protons

Radiation hardened CC4007RH and non-radiation hardened CC4011 devices were irradiated using 60Co gamma rays, 1 MeV electrons and 1–9 MeV protons to compare the ionizing radiation damage of the gamma rays with the charged particles. For all devices examined, with experimental uncertainty, the radiation induced threshold voltage shifts (ΔVth) generated by 60Co gamma rays are equal to that of 1 MeV electron and 1–7 MeV proton radiation under 0 gate bias condition. Under 5 V gate bias condition, the distinction of threshold voltage shifts (ΔVth) generated by 60Co gamma rays and 1 MeV electrons irradiation are not large, and the radiation damage for protons below 9 MeV is always less than that of 60Co gamma rays. The lower energy the proton has, the less serious the radiation damage becomes.

Radiation Effects in MOS Oxides

Electronic devices in space environments can contain numerous types of oxides and insulators. Ionizing radiation can induce significant charge buildup in these oxides and insulators leading to device degradation and failure. Electrons and protons in space can lead to radiation-induced total-dose effects. The two primary types of radiation-induced charge are oxide-trapped charge and interface-trap charge. These charges can cause large radiation-induced threshold voltage shifts and increases in leakage currents. Two alternate dielectrics that have been investigated for replacing silicon dioxide are hafnium oxides and reoxidized nitrided oxides (RNO). For advanced technologies, which may employ alternate dielectrics, radiation-induced voltage shifts in these insulators may be negligible. Radiation-induced charge buildup in parasitic field oxides and in SOI buried oxides can also lead to device degradation and failure. Indeed, for advanced commercial technologies, the total-dose hardness of ICs is normally dominated by radiation-induced charge buildup in either parasitic field oxides and/or SOI buried oxides. Heavy ions in space can also degrade the oxides in electronic devices through several different mechanisms including single-event gate rupture, reduction in device lifetime, and large voltage shifts in power MOSFETs.

The effect of 60Co (γ-ray) irradiation on the electrical characteristics of Au/SnO 2/n-Si (MIS) structures

The effect of 60Co (γ-ray) irradiation on the electrical properties of Au/SnO 2/n-Si (MIS) structures has been investigated using the capacitance–voltage ( C– V) and conductance–voltage ( G/ ω− V) measurements in the frequency range 1 kHz to 1 MHz at room temperature. The MIS structures were exposed to γ-rays at a dose rate of 2.12 kGy/h in water and the range of total dose was 0–500 kGy. It was found that the C– V and G/ ω− V curves were strongly influenced with both frequency and the presence of the dominant radiation-induced defects, and the series resistance was increased with increasing dose. Also, the radiation-induced threshold voltage shift (Δ V T) strongly depended on radiation dose and frequency, and the density of interface states N ss by Hill–Coleman method decreases with increasing radiation dose.

Low-frequency noise and radiation response of metal-oxide-semiconductor transistors with Al2O3/SiOxNy/Si(100) gate stacks

Low-frequency noise and irradiation response are studied for n-channel metal-oxide-semiconductor field-effect transistors with Al2O3/SiOxNy/Si(100) gate stacks. Radiation-induced threshold-voltage shifts and low-frequency noise increase with dose and decrease with postirradiation annealing. The border trap density in the gate dielectric inferred from the noise measurements is significantly higher than that typically observed in thermal SiO2. Similarly, the effective radiation-induced-hole trapping efficiency in Al2O3 gate dielectrics is significantly higher than for SiO2 gate dielectrics of comparable thickness. The low-frequency noise in these high-κ devices can be described well by a number fluctuation model.

Au/SnO2/n-Si (MOS) structures response to radiation and frequency

Metal–insulator–semiconductor (MOS) structures with insulator layer thickness of 290Å were irradiated using a 60Co (γ-ray) source and relationships of electrical properties of irradiated MOS structures to process-induced surface defects have been investigated both before and after γ-irradiation. The density of surface state distribution profiles of the sample Au/SnO2/n-Si (MOS) structures obtained from high–low frequency capacitance technique in depletion and weak inversion both before and after irradiation. The measurement capacitance and conductance are corrected for series resistance. Series resistance (Rs) of MOS structures were found both as function of voltage, frequency and radiation dose. The C(f)–V and G(f)–V curves have been found to be strongly influenced by the presence of a dominant radiation-induced defects. Results indicate interface-trap formation at high dose rates (irradiations) is reduced due to positive charge build-up in the semiconductor/insulator interfacial region (due to the trapping of holes) that reduces the flow rate of subsequent holes and protons from the bulk of the insulator to the Si/SnO2 interface. The series resistance decreases with increasing dose rate and frequency the radiation-induced flat-band voltage shift in 1 V. Results indicate the radiation-induced threshold voltage shift (ΔVT) strongly dependence on radiation dose rate and frequency.

Optimum laboratory radiation source for hardness assurance testing

Silicon-on-insulator (SOI) and bulk-silicon transistors were irradiated using X-ray, Co-60 gamma, and proton radiation sources. Co-60 gamma irradiation generates larger radiation-induced threshold voltage shifts (by a factor of two) in SOI buried oxides and in parasitic field oxides under low-field conditions than X-ray or proton irradiation. For all devices examined, the radiation-induced threshold voltage shifts generated by X-ray irradiation were equal to, within experimental uncertainty, the radiation-induced threshold voltage shifts generated by proton irradiation. The differences in threshold voltage shifts for the different radiation sources are attributed to differences in stopping power and consequently charge yield. The results suggest that for simulating proton-rich space environments, X-ray laboratory radiation sources are better suited for hardness assurance testing than Co-60 gamma radiation sources. Using Co-60 gamma sources for hardness assurance testing will result in more conservative estimates of device failure levels. Thus, our results do not preclude the use of Co-60 gamma radiation sources for hardness assurance testing for proton-rich environments. For electron-rich space environments, Co-60 gamma radiation sources may be better suited for hardness assurance testing.

Channel-length impact on radiation-induced threshold-voltage shift in N-MOSFET devices at low gamma ray radiation doses

SiO/sub 2/ gate dielectric and Si/SiO/sub 2/ interface are two important components which will shape the future of the MOSFETs and integrated circuits (IC's) technologies for ionizing radiation environment applications. This study discuss their size effects on irradiated NMOS device response. N-channel MOSFET's of different gate size were first irradiated with /sup 60/Co gamma rays source at several total doses (low doses). Then, they were investigated by using both voltage- and frequency-charge pumping (CP) methods. On one hand, all transistors reveal two radiation-induced oxide charge traps formation mechanisms, caused by low radiation total doses. Initially, there is a build-up of positive charge in the oxide layer, followed later by diminution of net positive charge (turn around effect), while the interface traps exhibit a linear increase with radiation doses. On the other hand, the total dose response is shown to depend on gate length of NMOS device.

A multibit ΣΔ modulator in floating-body SOS/SOI CMOS for extreme radiation environments

This paper presents the design of an experimental first-order /spl Sigma//spl Delta/ modulator with 4-bit internal quantization, fabricated in a 1.5-/spl mu/m space-qualified radiation-hard partially depleted silicon-on-sapphire (SOS) digital CMOS process. This converter architecture has been chosen partly to allow investigation into the design of a range of common analog functions with two key issues in mind: one of technology and one environmental. First, both the architecture and the circuit design are optimized using a variety of unconventional techniques to account for the influence of extreme bias-dependent, radiation-induced threshold-voltage shifts of up to 1 V, as well as poor 1/f device noise. Second, the circuitry is specially adapted to accommodate the floating-body behavior of this type of process, wherein drain conductance varies considerably with drain bias and frequency. The design techniques are directly applicable to very large-scale-integration silicon-on-insulator (SOI) design, where similar device physics are encountered. Notwithstanding the severe constraints on the design, the fabricated circuit provides 9.7 bits of dynamic range in a 63-kHz signal bandwidth, only degrading to 9.1 bits after 23 Mrad(Si) of total dose /spl gamma/ radiation.

Space charge limited degradation of bipolar oxides at low electric fields

P-type MOS capacitors fabricated in two bipolar processes were examined for ionizing radiation-induced threshold voltage shifts as a function of total dose, dose rate, temperature and bias. Hydrogen passivation of acceptor impurities near the Si surface was observed through decreases in the Si capacitance. The reduction in net electrically active dopants shifts the threshold voltage negative with total dose. The relative contribution of dopant passivation to the radiation-induced threshold voltage shift is most significant for irradiations performed under zero bias above 100/spl deg/C. For zero bias, dopant passivation and densities of radiation-induced interface traps and net positive oxide trapped charge all exhibit true dose rate and time dependent effects. A positive gate bias during irradiation eliminates the dose rate dependence. High dose rate irradiation at elevated temperatures enhances oxide degradation while simultaneously accelerating the annealing of damage. The enhancement in interface trap formation is greater than that of net positive oxide trapped charge and occurs over a greater range of temperatures. The temperature dependence of dopant passivation indicates that hydrogen transport through the oxides is accelerated with temperature. These results strongly suggest that metastably trapped charge in the oxide bulk reduces high dose rate degradation at room temperature by inhibiting the transport of holes and H/sup +/ ions.

Radiation response of fully-depleted MOS transistors fabricated in SIMOX

The total dose radiation response of radiation-resistant fully-depleted submicron n-MOS and p-MOS transistors fabricated in SIMOX is presented. The total ionizing dose radiation induced threshold voltage shifts under three different irradiation bias conditions, including the worst case (pass-gate) bias for n-MOS transistors are discussed. Total dose hard fully-depleted p-MOS transistors are experimentally demonstrated. The larger threshold voltage shifts of fully-depleted n-MOS transistors as compared to partially-depleted n-MOS transistors in an ionizing radiation environment are explained by a model coupling the radiation induced buried oxide charge to the top transistor. >

A simple trap-detrap model for accurate prediction of radiation induced threshold voltage shifts in radiation tolerant oxides for all static or time variant oxide fields

A highly accurate and simple physically based hole trapping-detrapping model that predicts radiation induced threshold voltage ( V t) shifts in radiation tolerant (hardened) oxides is presented. Excellent agreement with measured data is obtained for negative, zero, positive and non constant oxide fields for all doses. It is shown for the first time that the energy released from electron-hole pair recombination in the oxide during irradiation is responsible for the hole detrapping process. For high radiation doses and a fixed oxide electric field, a dynamic equilibrium is reached during irradiation where the hole trapping and detrapping rates become equal. This results in a saturation of the V t value. A change in oxide field during irradiation shifts the trapping-detrapping equilibrium concentration of trapped oxide charge resulting in a new value of saturated threshold voltage independent of previous radiation/bias history.

Fabrication of High Quality Mos Devices for Application in Hazardous Environments Based on Rtp Gate Dielectrics With in Situ Rtcvd of Polysilicon Gates

ABSTRACTProcess modules for MOS gate fabrication were developed which can be completed subsequently in one RTP reactor: atmospheric process sequences for gate oxides and oxynitrides as well as low pressure chemical vapor deposition of polysilicon (RTCVD). Prior to the Rapid Thermal Oxidation (RTO), the wafers were treated with a Rapid Thermal Cleaning process (RTC) in H2/Ar ambient. After the desoxidation step the RTO was done in O2/H2/Ar followed by an anneal (RTA) for the gate oxide or a nitridation in NH3 (RTN) and reoxidation for the oxynitrides, respectively. The polysilicon gate electrode was fabricated either by RTCVD in situ or in a conventional furnace reactor. The two-step RTCVD process resulted in a very good thickness uniformity for the polysilicon layers of 3% (3mm from the edge). The influence of the process variations on breakdown field, fixed oxide charge, interface state density, flatband voltage, and threshold voltage of the different types of gate dielectrics was investigated. The charges and voltages were determined by LF-HF CV measurements. In order to characterize the radiation tolerance of electronic devices, radiation induced flatband and threshold voltage shifts as well as the build up of interface charges were determined. The irradiation was performed at a Co - 60 gamma source. Breakdown fields in the range of 19 MV/cm, interface state densities of less than 109 eV−2cm−2, and radiation induced threshold voltage shifts below 0.1 V after 1.5 Mrad(Si) were obtained.

Fabrication of High Quality MOS Devices for Application in Hazardous Environments Based on RTP Gate Dielectrics with In Situ RTCVD of Polysilicon Gates

ABSTRACTProcess modules for MOS gate fabrication were developed which can be completed subsequently in one RTP reactor: atmospheric process sequences for gate oxides and oxynitrides as well as low pressure chemical vapor deposition of polysilicon (RTCVD). Prior to the Rapid Thermal Oxidation (RTO), the wafers were treated with a Rapid Thermal Cleaning process (RTC) in H2/Ar ambient. After the desoxidation step the RTO was done in O2/H2/Ar followed by an anneal (RTA) for the gate oxide or a nitridation in NH3 (RTN) and reoxidation for the oxynitrides, respectively. The polysilicon gate electrode was fabricated either by RTCVD in situ or in a conventional furnace reactor. The two-step RTCVD process resulted in a very good thickness uniformity for the polysilicon layers of 3% (3mm from the edge). The influence of the process variations on breakdown field, fixed oxide charge, interface state density, flatband voltage, and threshold voltage of the different types of gate dielectrics was investigated. The charges and voltages were determined by LF-HF CV measurements. In order to characterize the radiation tolerance of electronic devices, radiation induced flatband and threshold voltage shifts as well as the build up of interface charges were determined. The irradiation was performed at a Co - 60 gamma source. Breakdown fields in the range of 19 MV/cm, interface state densities of less than 109 eV−1cm−2, and radiation induced threshold voltage shifts below 0.1 V after 1.5 Mrad(Si) were obtained.