Quasi-cyclic Low-density Parity-check Research Articles

A Low-Complexity Security Scheme for Drone Communication Based on PUF and LDPC

Due to the limited payload and power of drones, the computational overhead, storage overhead and communication overhead that can be used for secure communication are restricted, making it difficult to apply some complex but fairly secure authentication protocols on drones. In this paper, we propose a low-complexity protocol for storing identity information in a resource-unconstrained device that does not require the UAV to store the information, thereby enhancing the UAV’s resistance to capture. The protocol in this paper mainly consists of quasi-cyclic low-density parity-check (QC-LDPC) codes, physical unclonable functions (PUFs) based on random-access memory (RAM), “XOR” operations, and hash computation. The protocol in this paper is an authentication architecture in which the drone is guided by the ground station to read its identity information, and the drone does not store any identity information in advance. The protocol is divided into two phases: 1. fuzzy authentication of fingerprint PUF and 2. uniqueness authentication accomplished while guiding the recovery of identity PUF. Recovering identity PUF in this paper, QC-LDPC is used as the error control module, and the optimization of bit-flip decoding significantly reduces the probability of decoding failure. After the comparative security analysis and comparative overhead analysis of this paper’s protocol, it can be concluded that this paper’s protocol can withstand common attacks (including attacks attempting to pass authentication, attacks attempting to interfere with authentication, and physical capture attacks), and the storage and communication overhead is small in the case of large time overhead.

Enhanced Non-Orthogonal Multiple Access Performance Using Channel Coding for High-Altitude Platform System (HAPS)

The high-altitude platform system (HAPS) is a promising technology for providing high-speed data transmission and coverage for remote areas. Still, it suffers from unpredictable channel transmission, especially in the Rician channel. To overcome the issue in transmission, we used one channel coding strategy, namely the quasi-cyclic low-density parity-check (QC-LDPC). This study aims to evaluate the performance of power domain non-orthogonal multiple access (PD-NOMA), which allows multiple users to share the same spectrum in a downlink communication system from HAPS to three ground stations. We simulated the system using MATLAB simulation with different power allocation coefficients for every ground station. The simulation results showed that QC-LDPC codes can significantly lower the signal-to-noise ratio (SNR) required to achieve the same bit error rate (BER) as uncoded NOMA, especially in scenarios with uneven power allocation. The average improvement of QC-LDPC over uncoded NOMA was 8.4% in SNR. However, we also observed that NOMA is prone to domino errors, where decoding errors in one ground station can propagate and degrade the performance of the subsequent ground station. Furthermore, we found that power allocation significantly impacts the system performance, while the location and power allocation of the second ground station have a minor effect. Based on these findings, we conclude that QC-LDPC can enhance system performance in scenarios with low received power and that power allocation is a crucial factor for NOMA systems with multiple ground stations.

Flexible and High-Efficiency LDPC Encoder Architecture for CCSDS Standard

Abstract The Consultative Committee for Space Data Systems (CCSDS) has adopted quasi-cyclic low-density parity-check (QC-LDPC) codes for use in near-Earth (C2) and deep space (AR4JA) communications. Existing encoder architectures for C2 codes, however, fall short in efficiency for high-throughput applications. This paper introduces a comprehensive approach combining algorithmic and architectural optimizations to enhance hardware usage efficiency (HUE) while offering flexibility. We propose an integrated inter-block and intra-block parallel (IIB-IBP) encoding algorithm that leverages the unique matrix structure to significantly enhance performance. Additionally, a matrix-specific command register pretreatment (MSCRP) technique is developed to effectively handle the special dimensions of the generator matrix. Furthermore, we detail an offline design process for the automated generation of the encoder core’s HDL description, facilitating fine-tuning of encoding parallelism, latency, FPGA resource utilization, and overall throughput. Hardware implementation on a Virtex XC5VLX110T FPGA demonstrates that our encoder reaches an impressive throughput of 10.6 Gb/s with only 2531 LUTs and 1040 FFs, achieving a HUE of 2.97 Mbps/logic unit. This performance marks a 70.6% increase in HUE when compared to state-of-the-art designs.

Girth Analysis of Quantum Quasi-Cyclic LDPC Codes

Girth Analysis of Quantum Quasi-Cyclic LDPC Codes

Efficient Construction of Quasi-Cyclic LDPC Codes With Multiple Lifting Sizes

Efficient Construction of Quasi-Cyclic LDPC Codes With Multiple Lifting Sizes

A Quasi-Cyclic LDPC Based Low Complexity and Area-Efficient Communication System for IEEE 802.11n

Low-density parity-check (LDPC) code, which has an excellent error-correcting performance that is close to the Shannon limit, is the most often used error correction code (ECC) for reliable and effective communication. Despite higher performance and lower decoding complexity, the main disadvantage of LDPC codes is their high encoding complexity. A significant problem is the VLSI implementation of the LDPC encoder and decoder. In this paper, structured LDPC codes—also known as quasi-cyclic low-density parity check codes—have been used since it is good bit error ratio (BER) performance and adaptable hardware execution characteristics. The Complete (Encoder-Channel-Decoder) communication system with a 1/2 code rate, 648 bits codeward length, and sub-block size of z = 27 has been constructed for the IEEE 802.11n wireless standard.

Feature of the forward error correction constructions for optical transport networks

Due to the rapid increase of network traffic in the last few years, many telecommunication operators have started transitions to 100G optical networks and beyond. However, high speed optical networks need more efficient Forward Error Correction (FEC) codes to deal with the optical impairments. Forward error correction is widely used in optical communications to improve error correction and extend optical transmission distance. It is also used to reduce optical transmitter power and system costs. In response to the rapid growth of optical communications, the ITU-T has started researching FEC coding and has recommended ITU-T G.709 and G.975.1. As optical transmission systems evolve towards longer transmission distance, greater capacity, and speeds of 100G and beyond a variety of unwanted effects are seriously affecting smooth evolution. In optical transport network, FEC is getting more and more important as spectral efficiency is increasing. As 100G system is commercialized, there are some trends in the evolution of FEC, for example overhead is increased from 7% to 20% or even more. High-performance FEC codes are therefore being developed so that higher net coding gain (NCG) and better error correction can be achieved. The Optical Internetworking Forum (OIF) suggests that soft-decision forward-error correction (SD-FEC) with a redundancy of 20% and beyond be used in a 100G DWDM coherent system. The use of advanced modulation formats is a promising solution for attaining such high data rates in optical networks. However, as a signal constellation grows in size, so does the optical signal to signal-to-noise ratio it requires to achieve a certain bit error rate (BER). This will degrade the error correction capability. Decoding is moving from hard to soft. Vendors are developing their own advanced codes instead of using codes recommended by ITU-T. Because different application systems have different decoding performance, latency, power and cost requirements, FEC systems with various transmission overhead, implementation complexity, burst-error correction ability and error floor are available in today’s market. Soft-decision FEC often uses turbo product codes and low density parity check (LDPC) codes. In research area, new codes such as LDPC codes and their different varieties are introduced into optical communication. Optimized codeword structure and decoding algorithm that provides low BER. LDPC codes can be very powerful, but their practical implementation for optical communications links at ultra-high data rates remains a challenge since the decoding of the code requires soft-decision bits about the received bits. A family of structured codes known as quasi-cyclic LDPC codes, whose common structural properties can be exploited by unified encoding and decoding architectures to reduce the complexity in implementation.

Jointly optimized quasi-cyclic LDPC codes for coded-cooperative wireless networks based on split labeling diversity

Jointly optimized quasi-cyclic LDPC codes for coded-cooperative wireless networks based on split labeling diversity

A cyclic‐shift based method for counting cycles of quasi‐cyclic LDPC codes

AbstractM. Fossorier proposed how to determine the necessary and sufficient conditions for the existence of cycles in the Tanner graph of quasi‐cyclic LDPC (QC‐LDPC) codes, which has been widely investigated in the study of LDPC codes. This paper presents some new necessary and sufficient conditions for the existence of cycles with arbitrary lengths and proposes a simple and novel method for counting cycles of QC‐LDPC codes based on the improved conditions. Numerical results show that, compared with the existing methods, the presented method is effective and feasible and can enumerate cycles of QC‐LDPC codes in a cyclic‐shift way.

Fast computation of cyclic convolutions and their applications in code-based asymmetric encryption schemes

The development of fast algorithms for key generation, encryption and decryption not only increases the efficiency of related operations. Such fast algorithms, for example, for asymmetric cryptosystems on quasi-cyclic codes, make it possible to experimentally study the dependence of decoding failure rate on code parameters for small security levels and to extrapolate these results to large values of security levels. In this article, we explore efficient cyclic convolution algorithms, specifically designed, among other things, for use in encoding and decoding algorithms for quasi-cyclic LDPC and MDPC codes. Corresponding convolutions operate on binary vectors, which can be either sparse or dense. The proposed algorithms achieve high speed by compactly storing sparse vectors, using hardware-supported XOR instructions, and replacing modulo operations with specialized loop transformations. These fast algorithms have potential applications not only in cryptography, but also in other areas where convolutions are used.

Design and Implementation of a Highly Efficient Quasi-Cyclic Low-Density Parity-Check Transceiving System Using an Overlapping Decoder.

The traditional LDPC encoding and decoding system is characterized by low throughput and high resource consumption, making it unsuitable for use in cost-efficient, energy-saving sensor networks. Aiming to optimize coding complexity and throughput, this paper proposes a combined design of a novel LDPC code structure and the corresponding overlapping decoding strategies. With regard to structure of LDPC code, a CCSDS-like quasi-cyclic parity check matrix (PCM) with uniform distribution of submatrices is constructed to maximize overlap depth and adapt the parallel decoding. In terms of reception decoding strategies, we use a modified 2-bit Min-Sum algorithm (MSA) that achieves a coding gain of 5 dB at a bit error rate of 10-6 compared to an uncoded BPSK, further mitigating resource consumption, and which only incurs a slight loss compared to the standard MSA. Moreover, a shift-register-based memory scheduling strategy is presented to fully utilize the quasi-cyclic characteristic and shorten the read/write latency. With proper overlap scheduling, the time consumption can be reduced by one third per iteration compared to the non-overlap algorithm. Simulation and implementation results demonstrate that our decoder can achieve a throughput up to 7.76 Gbps at a frequency of 156.25 MHz operating eight iterations, with a two-thirds resource consumption saving.

Improved underwater wireless optical communication using a passively mode-locked VECSEL

This paper presents improved underwater wireless optical communication (UWOC) based on a 490 nm passively mode-locked vertical-external-cavity surface-emitting laser (VECSEL) with the repetition rate of 1.46 GHz and the pulse width of 2.25 ps. After conducting a comprehensive evaluation of the performance characteristics of quasi-cyclic low-density parity-check (QC-LDPC) coding and pulse-position modulation (PPM) in relation to bit-error-rate (BER) and communication capacity across different signal-to-noise ratios (SNRs), a passively mode-locked VECSEL based UWOC system is designed and experimentally performed. The UWOC system employs the QC-LDPC encoding technique and PPM modulation scheme that are most suitable for the system. Compared with the case without QC-LDPC, the minimum received optical power with coding is improved by 3.5 dBm, and the SNR with coding is improved by 0.4 dB under condition of 256-PPM and forward error correction (FEC) threshold of 3.8×10−3. Meanwhile, compared with the UWOC system using a continuous-wave (CW) VECSEL as the light source, the attenuation coefficient of the UWOC system based on the mode-locked VECSEL is decreased by 0.04 m-1, and the BER of the mode-locked VECSEL based UWOC system is decreased by 0.3 dB.

Optimizing quasi-cyclic spatially coupled LDPC codes by eliminating harmful objects

It is well known that some harmful objects in the Tanner graph of low-density parity-check (LDPC) codes have a negative impact on their error correction performance under iterative message-passing decoding. Depending on the channel and the decoding algorithm, these harmful objects are different in nature and can be stopping sets, trapping sets, absorbing sets, or pseudocodewords. Differently from LDPC block codes, the design of spatially coupled LDPC codes must take into account the semi-infinite nature of the code, while still reducing the number of harmful objects as much as possible. We propose a general procedure, based on edge spreading, enabling the design of good quasi-cyclic spatially coupled LDPC (QC-SC-LDPC) codes. These codes are derived from quasi-cyclic LDPC (QC-LDPC) block codes and contain a considerably reduced number of harmful objects with respect to the original QC-LDPC block codes. We use an efficient way of enumerating harmful objects in QC-SC-LDPCCs to obtain a fast algorithm that spans the search space of potential candidates to select those minimizing the multiplicity of the target harmful objects. We validate the effectiveness of our method via numerical simulations, showing that the newly designed codes achieve better error rate performance than codes presented in previous literature.

Parity-Check Matrix Partitioning for Efficient Layered Decoding of QC-LDPC Codes

In this paper, we consider how to partition the parity-check matrices (PCMs) to reduce the hardware complexity and increase decoding throughput for the row layered decoding of quasi-cyclic low-density parity-check (QC-LDPC) codes. First, we formulate the PCM partitioning as an optimization problem, which targets to minimize the maximum column weight of each layer while maintaining a block cyclic shift property among different layers. As a result, we derive all the feasible solutions for the problem and propose a tight lower bound ω <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>LB</i></sub> on the minimum possible maximum column weight to evaluate a solution. Second, we define a metric called layer distance to measure the data dependency between consecutive layers and further illustrate how to identify the solutions with desired layer distance from those achieving the minimum value of ω <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>LB</i></sub> = 1, which is preferred to reduce computation delay. Next, we demonstrate that up-to-now, finding an optimal solution for the optimization problem with polynomial time complexity is unachievable. Therefore, both enumerative and greedy partition algorithms are proposed instead. After that, we modify the quasi-cyclic progressive edge-growth (QC-PEG) algorithm to directly construct PCMs that have a straightforward partition scheme to achieve ω <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>LB</i></sub> or the desired layer distance. Simulation results showed that the constructed codes have better error correction performance and achieve less average number of iterations than the underlying 5G LDPC codes.

Construction of protograph LDPC codes based on the convolution neural network

This paper presents an intelligent protograph construction algorithm. Protograph LDPC codes have shown excellent error correction performance and play an important role in wireless communications. Random search or manual construction are often used to obtain a good protograph, but the efficiency is not high enough and many experience and skills are needed. In this paper, a fast searching algorithm is proposed using the convolution neural network to predict the iterative decoding thresholds of protograph LDPC codes effectively. A special input data transformation rule is applied to provide stronger generalization ability. The proposed algorithm converges faster than other algorithms. The iterative decoding threshold of the constructed proto-graph surpasses greedy algorithm and random search by about 0.53 dB and 0.93 dB respectively under 100 times of density evolution. Simulation results show that quasi-cyclic LDPC (QC-LDPC) codes constructed from the proposed algorithm have competitive performance compared to other papers.

Deterministic Construction of Compressed Sensing Measurement Matrix with Arbitrary Sizes via QC-LDPC and Arithmetic Sequence Sets

It is of great significance to construct deterministic measurement matrices with good practical characteristics in Compressed Sensing (CS), including good reconstruction performance, low memory cost and low computing resources. Low-density-parity check (LDPC) codes and CS codes can be closely related. This paper presents a method of constructing compressed sensing measurement matrices based on quasi-cyclic (QC) LDPC codes and arithmetic sequence sets. The cyclic shift factor in each submatrix of QC-LDPC is determined by arithmetic sequence sets. Compared with random matrices, the proposed method has great advantages because it is generated based on a cyclic shift matrix, which requires less storage memory and lower computing resources. Because the restricted isometric property (RIP) is difficult to verify, mutual coherence and girth are used as computationally tractable indicators to evaluate the measurement matrix reconstruction performance. Compared with several typical matrices, the proposed measurement matrix has the minimum mutual coherence and superior reconstruction capability of CS signal according to one-dimensional (1D) signals and two-dimensional (2D) image simulation results. When the sampling rate is 0.2, the maximum (minimum) gain of peak signal-to-noise ratio (PSNR) and structural similarity index (SSIM) is up to 2.89 dB (0.33 dB) and 0.031 (0.016) while using 10 test images. Meanwhile, the reconstruction time is reduced by nearly half.

Optimized Design of Distributed Quasi-Cyclic LDPC Coded Spatial Modulation.

We propose a distributed quasi-cyclic low-density parity-check (QC-LDPC) coded spatial modulation (D-QC-LDPCC-SM) scheme with source, relay and destination nodes. At the source and relay, two distinct QC-LDPC codes are used. The relay chooses partial source information bits for further encoding, and a distributed code corresponding to each selection is generated at the destination. To construct the best code, the optimal information bit selection algorithm by exhaustive search in the relay is proposed. However, the exhaustive-based search algorithm has large complexity for QC-LDPC codes with long block length. Then, we develop another low-complexity information bit selection algorithm by partial search. Moreover, the iterative decoding algorithm based on the three-layer Tanner graph is proposed at the destination to carry out joint decoding for the received signal. The recently developed polar-coded cooperative SM (PCC-SM) scheme does not adopt a better encoding method at the relay, which motivates us to compare it with the proposed D-QC-LDPCC-SM scheme. Simulations exhibit that the proposed exhaustive-based and partial-based search algorithms outperform the random selection approach by 1 and 1.2 dB, respectively. Because the proposed D-QC-LDPCC-SM system uses the optimized algorithm to select the information bits for further encoding, it outperforms the PCC-SM scheme by 3.1 dB.

Energy-Efficient Backscatter-Assisted Coded Cooperative NOMA for B5G Wireless Communications

In this manuscript, we propose an alternating optimization framework to maximize the energy efficiency of a backscatter-enabled cooperative Non-orthogonal multiple access (NOMA) system by optimizing the transmit power of the source, power allocation coefficients (PAC), and power of the relay node under imperfect successive interference cancellation (SIC) decoding. A three-stage low-complexity energy-efficient alternating optimization algorithm is introduced which optimizes the transmit power, PAC, and relay power by considering the quality of service (QoS), power budget, and cooperation constraints. Subsequently, a joint channel coding framework is introduced to enhance the performance of far user which has no direct communication link with the base station (BS) and has bad channel conditions. In the destination node, the far user data is jointly decoded using a Sum-product algorithm (SPA) based joint iterative decoder realized by jointly-designed Quasi-cyclic Low-density parity-check (QC-LDPC) codes. Simulation results evince that the proposed backscatter-enabled cooperative NOMA system outperforms its counterpart by providing an efficient performance in terms of energy efficiency. Also, proposed jointly-designed QC-LDPC codes provide an excellent bit-error-rate (BER) performance by jointly decoding the far user data for considered BSC cooperative NOMA system with only a few decoding iterations.

Implementation of encoder and decoder for low-density parity-check codes in continuous-variable quantum key distribution on a field programmable gate array

Quantum key distribution (QKD) can provide an unconditionally secure communication encryption method. Continuous-variable QKD (CVQKD) requires extracting the key from the noisy channel, leading to higher requirements for the error-correcting codes used in multidimensional reconciliation. We extend the quasi-cyclic low-density parity-check of the radio design for the global 5G mobile communication technology standard to achieve error correction under lower signal-to-noise ratio on integrated hardware. A field programmable gate array (FPGA) chip is used to realize the approximate lower triangular matrix encoding algorithm, and the core module only has the circular shift register, which reduces the encoding complexity, improves the encoding efficiency, and reduces the hardware resource consumption. For extended super-long code words, the decoding algorithm requires additional hardware resources to implement, which the previous algorithm cannot meet. Therefore, we present a hardware implementation of offset minimum sum algorithm (OMSA), which can avoid operations of complex mathematical formula. The offset factor of OMSA reduce the error caused by the low accuracy of calculation on the hardware. The update of the decoding information is layered in a partially parallel way in the matrix to achieve the cross processing of node information. It speeds up the transmission of information between different nodes and the convergence of decoding algorithm of low-complexity parallel structure. Simulation results show that the maximum theoretical coordination efficiency is 85% when the code with block length is 69632 at a bit rate of 22/68 and the signal-to-noise ratio asymptotic threshold is 0.7. Using an FPGA, ∼0.1 frame error rate was achieved, but with a zero-bit error rate, the optimal achievable secret key rate is about 200 Kbps at 30-km distance theoretically. For a 200-MHz system clock on the successfully decoded block, 125 Gbps encoding throughput and 472 Kbps decoding throughput was achieved, better than the theoretical key rate of prototype of CVQKD.

Quasi-Cyclic LDPC Codes With Girth at Least Eight Based on Disjoint Difference Sets

A novel relationship between disjoint difference sets (DDS) and QC-LDPC codes without cycles of length up to six is established. Based on DDS with two sets, a class of column-weight-four QC-LDPC codes is constructed with girth at least eight. In the literature there are several explicit or semi-random methods which can yield column-weight-four QC-LDPC codes without 4-cycles and 6-cycles. Compared with these existing methods, the new DDS-based method is able to offer QC-LDPC codes with desirable decoding performance and flexible circulant sizes, and at the same time able to provide a large number of non-equivalent candidate codes. Moreover, by employing DDS with only one set, a class of column-weight-three QC-LDPC codes is constructed with short lengths and with girth at least eight.