Quantum Gate Library Research Articles

Quantum Circuit Synthesis using a New Quantum Logic Gate Library of NCV Quantum Gates

Since Controlled-Square-Root-of-NOT (CV, CV‡) gates are not permutative quantum gates, many existing methods cannot effectively synthesize optimal 3-qubit circuits directly using the NOT, CNOT, Controlled-Square-Root-of-NOT quantum gate library (NCV), and the key of effective methods is the mapping of NCV gates to four-valued quantum gates. Firstly, we use NCV gates to create the new quantum logic gate library, which can be directly used to get the solutions with smaller quantum costs efficiently. Further, we present a novel generic method which quickly and directly constructs this new optimal quantum logic gate library using CNOT and Controlled-Square-Root-of-NOT gates. Finally, we present several encouraging experiments using these new permutative gates, and give a careful analysis of the method, which introduces a new idea to quantum circuit synthesis.

Complexity of reversible circuits and their quantum implementations

We provide an extensive overview of upper bounds on the number of gates needed in reversible and quantum circuits. As reversible gate libraries we consider single-target gates, mixed-polarity multiple-controlled Toffoli gates, and the set consisting of the NOT, the CNOT, and the two-controlled Toffoli gate. As quantum gate libraries we consider the semi-classical NCV library (consisting of NOT, CNOT, and the square-root of NOT called V) as well as the universal and commonly used Clifford+T gate library. Besides a summary of known bounds, the paper provides several new and tighter bounds. Several synthesis approaches and mapping schemes were used to calculate the bounds.

FTQLS: Fault-Tolerant Quantum Logic Synthesis

Quantum computation can solve certain problems much faster than classical computation. However, quantum computations are more susceptible to errors than conventional digital computations. Thus, a fault-tolerant (FT) quantum circuit design is required for a practical implementation. Quantum circuits consist of a cascade of quantum gates. These gates are themselves realized using primitive quantum operations that are supported by the quantum physical machine description (PMD). As different quantum systems are associated with different Hamiltonians, they have different PMDs. In addition, the quantum cost for implementing a quantum operation may differ from one PMD to another. Thus, a quantum logic circuit needs to be realized with and optimized for the set of primitive quantum operations supported by the given PMD. In this paper, an FT quantum logic synthesis (FTQLS) methodology and tool is described for six different PMDs. A methodology, such as this, which can be targeted at multiple PMDs, has not been attempted before, to the best of our knowledge. The input to FTQLS is an unoptimized quantum circuit realized using a set of commonly used gates and its output is an optimized FT quantum circuit that only comprises of primitive quantum operations supported by the given PMD. FTQLS does technology mapping for different PMDs and then converts non-FT circuits to FT circuits. For technology mapping, it utilizes an optimized quantum gate library targeted at various PMDs that decomposes gates into primitive operations. Efficient conversion to FT circuits is done by integrating two quantum compilers and an FT cache table into FTQLS. For improving the synthesis results, an FT set of gates that is directly supported by each PMD is proposed. Quantum circuit optimization is done by utilizing quantum identity rules. The performance of FTQLS is evaluated using two cost metrics: number of primitive operations (#ops) and execution cycles on the critical path (#cycles). Experiment results show that the decrease in #ops varies between 58.1% and 87.0% and in #cycles between 42.8% and 76.4%, on an average, depending on the PMD.

Optimized Quantum Gate Library for Various Physical Machine Descriptions

Quantum logic circuits consist of a cascade of quantum gates. These gates are realized using primitive quantum operations that are supported by a quantum physical machine description (PMD). Since different quantum systems are associated with different Hamiltonians, a specific quantum operation may be more easily realizable in one quantum system than another. Thus, different quantum systems have different PMDs. Also, the quantum cost for implementing a quantum operation may differ from one PMD to another. Thus, a quantum logic circuit needs to be realized with and optimized for only the set of primitive quantum operations supported by the given PMD. Quantum logic design that can be targeted at multiple PMDs has not been attempted before, to the best of our knowledge. In this paper, we target quantum logic design with respect to the set of primitive quantum operations that are supported by six different PMDs: quantum dot, superconducting, ion trap, neutral atom, and two photonics systems. Our aim is to build a quantum gate library that targets these PMDs. This is akin to a cell library in traditional logic design that enables logic gates to be mapped to cells realizable in an underlying technology. To make our quantum gate library efficient in terms of the number of primitive quantum operations involved and the associated delay, we explore one- and two-qubit quantum identity rules that can help remove redundancies in the quantum gate implementation. We show that, using these identities, each gate in the library can be efficiently mapped to just the set of primitive operations supported by each of the six PMDs. Each mapping results in a different circuit structure and quantum cost, which is measured in terms of the number of primitive quantum operations and the number of execution cycles required. Thus, such a library provides the foundation for quantum logic synthesis, just like a cell library provides the foundation for technology-dependent logic synthesis (i.e., technology mapping) in traditional synthesis.

Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis

This paper proposes an approach to optimally synthesize quantum circuits by symbolic reachability analysis, where the primary inputs and outputs are basis binary and the internal signals can be nonbinary in a multiple-valued domain. The authors present an optimal synthesis method to minimize quantum cost and some speedup methods with nonoptimal quantum cost. The methods here are applicable to small reversible functions. Unlike previous works that use permutative reversible gates, a lower level library that includes nonpermutative quantum gates is used here. The proposed approach obtains the minimum cost quantum circuits for Miller gate, half adder, and full adder, which are better than previous results. This cost is minimum for any circuit using the set of quantum gates in this paper, where the control qubit of 2-qubit gates is always basis binary. In addition, the minimum quantum cost in the same manner for Fredkin, Peres, and Toffoli gates is proven. The method can also find the best conversion from an irreversible function to a reversible circuit as a byproduct of the generality of its formulation, thus synthesizing in principle arbitrary multi-output Boolean functions with quantum gate library. This paper constitutes the first successful experience of applying formal methods and satisfiability to quantum logic synthesis

Minimal universal two-qubit controlled-NOT-based circuits

We give quantum circuits that simulate an arbitrary two-qubit unitary operator up to global phase. For several quantum gate libraries we prove that gate counts are optimal in worst and average cases. Our lower and upper bounds compare favorably to previously published results. Temporary storage is not used because it tends to be expensive in physical implementations. For each gate library, best gate counts can be achieved by a single universal circuit. To compute gate parameters in universal circuits, we only use closed-form algebraic expressions, and in particular do not rely on matrix exponentials. Our algorithm has been coded in C++.

ACCELERATION OF QUANTUM ALGORITHMS USING THREE-QUBIT GATES

Quantum-circuit optimization is essential for any practical realization of quantum computation, in order to beat decoherence. We present a scheme for implementing the final stage in the compilation of quantum circuits, i.e. for finding the actual physical realizations of the individual modules in the quantum-gate library. We find that numerical optimization can be efficiently utilized in order to generate the appropriate control-parameter sequences which produce the desired three-qubit modules within the Josephson charge-qubit model. Our work suggests ways in which one can in fact considerably reduce the number of gates required to implement a given quantum circuit, hence diminishing idle time and significantly accelerating the execution of quantum algorithms.